hw/nvram/mac_nvram.c

   1 /*
   2  * PowerMac NVRAM emulation
   3  *
   4  * Copyright (c) 2005-2007 Fabrice Bellard
   5  * Copyright (c) 2007 Jocelyn Mayer
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a copy
   8  * of this software and associated documentation files (the "Software"), to deal
   9  * in the Software without restriction, including without limitation the rights
  10  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  11  * copies of the Software, and to permit persons to whom the Software is
  12  * furnished to do so, subject to the following conditions:
  13  *
  14  * The above copyright notice and this permission notice shall be included in
  15  * all copies or substantial portions of the Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  23  * THE SOFTWARE.
  24  */
  25
  26 #include "qemu/osdep.h"
  27 #include "qapi/error.h"
  28 #include "hw/nvram/chrp_nvram.h"
  29 #include "hw/nvram/mac_nvram.h"
  30 #include "hw/qdev-properties.h"
  31 #include "hw/qdev-properties-system.h"
  32 #include "sysemu/block-backend.h"
  33 #include "migration/vmstate.h"
  34 #include "qemu/cutils.h"
  35 #include "qemu/module.h"
  36 #include "qemu/error-report.h"
  37 #include "trace.h"
  38 #include <zlib.h>
  39
  40 #define DEF_SYSTEM_SIZE 0xc10
  41
  42 /* macio style NVRAM device */
  43 static void macio_nvram_writeb(void *opaque, hwaddr addr,
  44                                uint64_t value, unsigned size)
  45 {
  46     MacIONVRAMState *s = opaque;
  47
  48     addr = (addr >> s->it_shift) & (s->size - 1);
  49     trace_macio_nvram_write(addr, value);
  50     s->data[addr] = value;
  51     if (s->blk) {
  52         if (blk_pwrite(s->blk, addr, 1, &s->data[addr], 0) < 0) {
  53             error_report("%s: write of NVRAM data to backing store failed",
  54                          blk_name(s->blk));
  55         }
  56     }
  57 }
  58
  59 static uint64_t macio_nvram_readb(void *opaque, hwaddr addr,
  60                                   unsigned size)
  61 {
  62     MacIONVRAMState *s = opaque;
  63     uint32_t value;
  64
  65     addr = (addr >> s->it_shift) & (s->size - 1);
  66     value = s->data[addr];
  67     trace_macio_nvram_read(addr, value);
  68
  69     return value;
  70 }
  71
  72 static const MemoryRegionOps macio_nvram_ops = {
  73     .read = macio_nvram_readb,
  74     .write = macio_nvram_writeb,
  75     .valid.min_access_size = 1,
  76     .valid.max_access_size = 4,
  77     .impl.min_access_size = 1,
  78     .impl.max_access_size = 1,
  79     .endianness = DEVICE_BIG_ENDIAN,
  80 };
  81
  82 static const VMStateDescription vmstate_macio_nvram = {
  83     .name = "macio_nvram",
  84     .version_id = 1,
  85     .minimum_version_id = 1,
  86     .fields = (const VMStateField[]) {
  87         VMSTATE_VBUFFER_UINT32(data, MacIONVRAMState, 0, NULL, size),
  88         VMSTATE_END_OF_LIST()
  89     }
  90 };
  91
  92
  93 static void macio_nvram_reset(DeviceState *dev)
  94 {
  95 }
  96
  97 static void macio_nvram_realizefn(DeviceState *dev, Error **errp)
  98 {
  99     SysBusDevice *d = SYS_BUS_DEVICE(dev);
 100     MacIONVRAMState *s = MACIO_NVRAM(dev);
 101
 102     s->data = g_malloc0(s->size);
 103
 104     if (s->blk) {
 105         int64_t len = blk_getlength(s->blk);
 106         if (len < 0) {
 107             error_setg_errno(errp, -len,
 108                              "could not get length of nvram backing image");
 109             return;
 110         } else if (len != s->size) {
 111             error_setg_errno(errp, -len,
 112                              "invalid size nvram backing image");
 113             return;
 114         }
 115         if (blk_set_perm(s->blk, BLK_PERM_CONSISTENT_READ | BLK_PERM_WRITE,
 116                          BLK_PERM_ALL, errp) < 0) {
 117             return;
 118         }
 119         if (blk_pread(s->blk, 0, s->size, s->data, 0) < 0) {
 120             error_setg(errp, "can't read-nvram contents");
 121             return;
 122         }
 123     }
 124
 125     memory_region_init_io(&s->mem, OBJECT(s), &macio_nvram_ops, s,
 126                           "macio-nvram", s->size << s->it_shift);
 127     sysbus_init_mmio(d, &s->mem);
 128 }
 129
 130 static void macio_nvram_unrealizefn(DeviceState *dev)
 131 {
 132     MacIONVRAMState *s = MACIO_NVRAM(dev);
 133
 134     g_free(s->data);
 135 }
 136
 137 static Property macio_nvram_properties[] = {
 138     DEFINE_PROP_UINT32("size", MacIONVRAMState, size, 0),
 139     DEFINE_PROP_UINT32("it_shift", MacIONVRAMState, it_shift, 0),
 140     DEFINE_PROP_DRIVE("drive", MacIONVRAMState, blk),
 141     DEFINE_PROP_END_OF_LIST()
 142 };
 143
 144 static void macio_nvram_class_init(ObjectClass *oc, void *data)
 145 {
 146     DeviceClass *dc = DEVICE_CLASS(oc);
 147
 148     dc->realize = macio_nvram_realizefn;
 149     dc->unrealize = macio_nvram_unrealizefn;
 150     dc->reset = macio_nvram_reset;
 151     dc->vmsd = &vmstate_macio_nvram;
 152     device_class_set_props(dc, macio_nvram_properties);
 153     set_bit(DEVICE_CATEGORY_MISC, dc->categories);
 154 }
 155
 156 static const TypeInfo macio_nvram_type_info = {
 157     .name = TYPE_MACIO_NVRAM,
 158     .parent = TYPE_SYS_BUS_DEVICE,
 159     .instance_size = sizeof(MacIONVRAMState),
 160     .class_init = macio_nvram_class_init,
 161 };
 162
 163 static void macio_nvram_register_types(void)
 164 {
 165     type_register_static(&macio_nvram_type_info);
 166 }
 167
 168 /* Set up a system OpenBIOS NVRAM partition */
 169 static void pmac_format_nvram_partition_of(MacIONVRAMState *nvr, int off,
 170                                            int len)
 171 {
 172     int sysp_end;
 173
 174     /* OpenBIOS nvram variables partition */
 175     sysp_end = chrp_nvram_create_system_partition(&nvr->data[off],
 176                                                   DEF_SYSTEM_SIZE, len) + off;
 177
 178     /* Free space partition */
 179     chrp_nvram_create_free_partition(&nvr->data[sysp_end], len - sysp_end);
 180 }
 181
 182 #define OSX_NVRAM_SIGNATURE     (0x5A)
 183
 184 /* Set up a Mac OS X NVRAM partition */
 185 static void pmac_format_nvram_partition_osx(MacIONVRAMState *nvr, int off,
 186                                             int len)
 187 {
 188     uint32_t start = off;
 189     ChrpNvramPartHdr *part_header;
 190     unsigned char *data = &nvr->data[start];
 191
 192     /* empty partition */
 193     part_header = (ChrpNvramPartHdr *)data;
 194     part_header->signature = OSX_NVRAM_SIGNATURE;
 195     pstrcpy(part_header->name, sizeof(part_header->name), "wwwwwwwwwwww");
 196
 197     chrp_nvram_finish_partition(part_header, len);
 198
 199     /* Generation */
 200     stl_be_p(&data[20], 2);
 201
 202     /* Adler32 checksum */
 203     stl_be_p(&data[16], adler32(0, &data[20], len - 20));
 204 }
 205
 206 /* Set up NVRAM with OF and OSX partitions */
 207 void pmac_format_nvram_partition(MacIONVRAMState *nvr, int len)
 208 {
 209     /*
 210      * Mac OS X expects side "B" of the flash at the second half of NVRAM,
 211      * so we use half of the chip for OF and the other half for a free OSX
 212      * partition.
 213      */
 214     pmac_format_nvram_partition_of(nvr, 0, len / 2);
 215     pmac_format_nvram_partition_osx(nvr, len / 2, len / 2);
 216 }
 217 type_init(macio_nvram_register_types)