hw/net/fsl_etsec/etsec.h

   1 /*
   2  * QEMU Freescale eTSEC Emulator
   3  *
   4  * Copyright (c) 2011-2013 AdaCore
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24
  25 #ifndef ETSEC_H
  26 #define ETSEC_H
  27
  28 #include "hw/sysbus.h"
  29 #include "net/net.h"
  30 #include "hw/ptimer.h"
  31 #include "qom/object.h"
  32
  33 /* Buffer Descriptors */
  34
  35 typedef struct eTSEC_rxtx_bd {
  36     uint16_t flags;
  37     uint16_t length;
  38     uint32_t bufptr;
  39 } eTSEC_rxtx_bd;
  40
  41 #define BD_WRAP       (1 << 13)
  42 #define BD_INTERRUPT  (1 << 12)
  43 #define BD_LAST       (1 << 11)
  44
  45 #define BD_TX_READY     (1 << 15)
  46 #define BD_TX_PADCRC    (1 << 14)
  47 #define BD_TX_TC        (1 << 10)
  48 #define BD_TX_PREDEF    (1 << 9)
  49 #define BD_TX_HFELC     (1 << 7)
  50 #define BD_TX_CFRL      (1 << 6)
  51 #define BD_TX_RC_MASK   0xF
  52 #define BD_TX_RC_OFFSET 0x2
  53 #define BD_TX_TOEUN     (1 << 1)
  54 #define BD_TX_TR        (1 << 0)
  55
  56 #define BD_RX_EMPTY     (1 << 15)
  57 #define BD_RX_RO1       (1 << 14)
  58 #define BD_RX_FIRST     (1 << 10)
  59 #define BD_RX_MISS      (1 << 8)
  60 #define BD_RX_BROADCAST (1 << 7)
  61 #define BD_RX_MULTICAST (1 << 6)
  62 #define BD_RX_LG        (1 << 5)
  63 #define BD_RX_NO        (1 << 4)
  64 #define BD_RX_SH        (1 << 3)
  65 #define BD_RX_CR        (1 << 2)
  66 #define BD_RX_OV        (1 << 1)
  67 #define BD_RX_TR        (1 << 0)
  68
  69 /* Tx FCB flags */
  70 #define FCB_TX_VLN     (1 << 7)
  71 #define FCB_TX_IP      (1 << 6)
  72 #define FCB_TX_IP6     (1 << 5)
  73 #define FCB_TX_TUP     (1 << 4)
  74 #define FCB_TX_UDP     (1 << 3)
  75 #define FCB_TX_CIP     (1 << 2)
  76 #define FCB_TX_CTU     (1 << 1)
  77 #define FCB_TX_NPH     (1 << 0)
  78
  79 /* eTSEC */
  80
  81 /* Number of register in the device */
  82 #define ETSEC_REG_NUMBER 1024
  83
  84 typedef struct eTSEC_Register {
  85     const char *name;
  86     const char *desc;
  87     uint32_t    access;
  88     uint32_t    value;
  89 } eTSEC_Register;
  90
  91 struct eTSEC {
  92     SysBusDevice  busdev;
  93
  94     MemoryRegion  io_area;
  95
  96     eTSEC_Register regs[ETSEC_REG_NUMBER];
  97
  98     NICState *nic;
  99     NICConf   conf;
 100
 101     /* Tx */
 102
 103     uint8_t       *tx_buffer;
 104     uint32_t       tx_buffer_len;
 105     eTSEC_rxtx_bd  first_bd;
 106
 107     /* Rx */
 108
 109     uint8_t       *rx_buffer;
 110     uint32_t       rx_buffer_len;
 111     uint32_t       rx_remaining_data;
 112     uint8_t        rx_first_in_frame;
 113     uint8_t        rx_fcb_size;
 114     eTSEC_rxtx_bd  rx_first_bd;
 115     uint8_t        rx_fcb[10];
 116     uint32_t       rx_padding;
 117
 118     /* IRQs */
 119     qemu_irq     tx_irq;
 120     qemu_irq     rx_irq;
 121     qemu_irq     err_irq;
 122
 123
 124     uint16_t phy_status;
 125     uint16_t phy_control;
 126
 127     /* Polling */
 128     struct ptimer_state *ptimer;
 129
 130     /* Whether we should flush the rx queue when buffer becomes available. */
 131     bool need_flush;
 132 };
 133 typedef struct eTSEC eTSEC;
 134
 135 #define TYPE_ETSEC_COMMON "eTSEC"
 136 OBJECT_DECLARE_SIMPLE_TYPE(eTSEC, ETSEC_COMMON)
 137
 138 #define eTSEC_TRANSMIT 1
 139 #define eTSEC_RECEIVE  2
 140
 141 void etsec_update_irq(eTSEC *etsec);
 142
 143 void etsec_walk_tx_ring(eTSEC *etsec, int ring_nbr);
 144 void etsec_walk_rx_ring(eTSEC *etsec, int ring_nbr);
 145 ssize_t etsec_rx_ring_write(eTSEC *etsec, const uint8_t *buf, size_t size);
 146
 147 void etsec_write_miim(eTSEC          *etsec,
 148                       eTSEC_Register *reg,
 149                       uint32_t        reg_index,
 150                       uint32_t        value);
 151
 152 void etsec_miim_link_status(eTSEC *etsec, NetClientState *nc);
 153
 154 #endif /* ETSEC_H */