accel/tcg/tb-jmp-cache.h

   1 /*
   2  * The per-CPU TranslationBlock jump cache.
   3  *
   4  *  Copyright (c) 2003 Fabrice Bellard
   5  *
   6  * SPDX-License-Identifier: GPL-2.0-or-later
   7  */
   8
   9 #ifndef ACCEL_TCG_TB_JMP_CACHE_H
  10 #define ACCEL_TCG_TB_JMP_CACHE_H
  11
  12 #define TB_JMP_CACHE_BITS 12
  13 #define TB_JMP_CACHE_SIZE (1 << TB_JMP_CACHE_BITS)
  14
  15 /*
  16  * Invalidated in parallel; all accesses to 'tb' must be atomic.
  17  * A valid entry is read/written by a single CPU, therefore there is
  18  * no need for qatomic_rcu_read() and pc is always consistent with a
  19  * non-NULL value of 'tb'.  Strictly speaking pc is only needed for
  20  * CF_PCREL, but it's used always for simplicity.
  21  */
  22 struct CPUJumpCache {
  23     struct rcu_head rcu;
  24     struct {
  25         TranslationBlock *tb;
  26         vaddr pc;
  27     } array[TB_JMP_CACHE_SIZE];
  28 };
  29
  30 #endif /* ACCEL_TCG_TB_JMP_CACHE_H */