hw/riscv: Move sifive_u_prci model to hw/misc
[qemu/ar7.git] / include / hw / misc / imx7_snvs.h
blob255f8f26f90ff172bc585c66a9118a9c2d1cacd0
1 /*
2 * Copyright (c) 2017, Impinj, Inc.
4 * i.MX7 SNVS block emulation code
6 * Author: Andrey Smirnov <andrew.smirnov@gmail.com>
8 * This work is licensed under the terms of the GNU GPL, version 2 or later.
9 * See the COPYING file in the top-level directory.
12 #ifndef IMX7_SNVS_H
13 #define IMX7_SNVS_H
15 #include "qemu/bitops.h"
16 #include "hw/sysbus.h"
19 enum IMX7SNVSRegisters {
20 SNVS_LPCR = 0x38,
21 SNVS_LPCR_TOP = BIT(6),
22 SNVS_LPCR_DP_EN = BIT(5)
25 #define TYPE_IMX7_SNVS "imx7.snvs"
26 #define IMX7_SNVS(obj) OBJECT_CHECK(IMX7SNVSState, (obj), TYPE_IMX7_SNVS)
28 typedef struct IMX7SNVSState {
29 /* <private> */
30 SysBusDevice parent_obj;
32 MemoryRegion mmio;
33 } IMX7SNVSState;
35 #endif /* IMX7_SNVS_H */