riscv: sifive: Implement a model for SiFive FU540 OTP
[qemu/ar7.git] / bsd-user / sparc / target_signal.h
blob5b2abba40f25d3a165aeee4a9ff5bd97733e5709
1 #ifndef TARGET_SIGNAL_H
2 #define TARGET_SIGNAL_H
4 #include "cpu.h"
6 /* this struct defines a stack used during syscall handling */
8 typedef struct target_sigaltstack {
9 abi_ulong ss_sp;
10 abi_long ss_flags;
11 abi_ulong ss_size;
12 } target_stack_t;
15 #ifndef UREG_I6
16 #define UREG_I6 6
17 #endif
18 #ifndef UREG_FP
19 #define UREG_FP UREG_I6
20 #endif
22 static inline abi_ulong get_sp_from_cpustate(CPUSPARCState *state)
24 return state->regwptr[UREG_FP];
27 #endif /* TARGET_SIGNAL_H */