target-alpha/cpu.c

   1 /*
   2  * QEMU Alpha CPU
   3  *
   4  * Copyright (c) 2007 Jocelyn Mayer
   5  * Copyright (c) 2012 SUSE LINUX Products GmbH
   6  *
   7  * This library is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU Lesser General Public
   9  * License as published by the Free Software Foundation; either
  10  * version 2.1 of the License, or (at your option) any later version.
  11  *
  12  * This library is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  15  * Lesser General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU Lesser General Public
  18  * License along with this library; if not, see
  19  * <http://www.gnu.org/licenses/lgpl-2.1.html>
  20  */
  21
  22 #include "qemu/osdep.h"
  23 #include "qapi/error.h"
  24 #include "cpu.h"
  25 #include "qemu-common.h"
  26 #include "migration/vmstate.h"
  27 #include "exec/exec-all.h"
  28
  29
  30 static void alpha_cpu_set_pc(CPUState *cs, vaddr value)
  31 {
  32     AlphaCPU *cpu = ALPHA_CPU(cs);
  33
  34     cpu->env.pc = value;
  35 }
  36
  37 static bool alpha_cpu_has_work(CPUState *cs)
  38 {
  39     /* Here we are checking to see if the CPU should wake up from HALT.
  40        We will have gotten into this state only for WTINT from PALmode.  */
  41     /* ??? I'm not sure how the IPL state works with WTINT to keep a CPU
  42        asleep even if (some) interrupts have been asserted.  For now,
  43        assume that if a CPU really wants to stay asleep, it will mask
  44        interrupts at the chipset level, which will prevent these bits
  45        from being set in the first place.  */
  46     return cs->interrupt_request & (CPU_INTERRUPT_HARD
  47                                     | CPU_INTERRUPT_TIMER
  48                                     | CPU_INTERRUPT_SMP
  49                                     | CPU_INTERRUPT_MCHK);
  50 }
  51
  52 static void alpha_cpu_disas_set_info(CPUState *cpu, disassemble_info *info)
  53 {
  54     info->mach = bfd_mach_alpha_ev6;
  55     info->print_insn = print_insn_alpha;
  56 }
  57
  58 static void alpha_cpu_realizefn(DeviceState *dev, Error **errp)
  59 {
  60     CPUState *cs = CPU(dev);
  61     AlphaCPUClass *acc = ALPHA_CPU_GET_CLASS(dev);
  62     Error *local_err = NULL;
  63
  64     cpu_exec_realizefn(cs, &local_err);
  65     if (local_err != NULL) {
  66         error_propagate(errp, local_err);
  67         return;
  68     }
  69
  70     qemu_init_vcpu(cs);
  71
  72     acc->parent_realize(dev, errp);
  73 }
  74
  75 /* Sort alphabetically by type name. */
  76 static gint alpha_cpu_list_compare(gconstpointer a, gconstpointer b)
  77 {
  78     ObjectClass *class_a = (ObjectClass *)a;
  79     ObjectClass *class_b = (ObjectClass *)b;
  80     const char *name_a, *name_b;
  81
  82     name_a = object_class_get_name(class_a);
  83     name_b = object_class_get_name(class_b);
  84     return strcmp(name_a, name_b);
  85 }
  86
  87 static void alpha_cpu_list_entry(gpointer data, gpointer user_data)
  88 {
  89     ObjectClass *oc = data;
  90     CPUListState *s = user_data;
  91
  92     (*s->cpu_fprintf)(s->file, "  %s\n",
  93                       object_class_get_name(oc));
  94 }
  95
  96 void alpha_cpu_list(FILE *f, fprintf_function cpu_fprintf)
  97 {
  98     CPUListState s = {
  99         .file = f,
 100         .cpu_fprintf = cpu_fprintf,
 101     };
 102     GSList *list;
 103
 104     list = object_class_get_list(TYPE_ALPHA_CPU, false);
 105     list = g_slist_sort(list, alpha_cpu_list_compare);
 106     (*cpu_fprintf)(f, "Available CPUs:\n");
 107     g_slist_foreach(list, alpha_cpu_list_entry, &s);
 108     g_slist_free(list);
 109 }
 110
 111 /* Models */
 112
 113 #define TYPE(model) model "-" TYPE_ALPHA_CPU
 114
 115 typedef struct AlphaCPUAlias {
 116     const char *alias;
 117     const char *typename;
 118 } AlphaCPUAlias;
 119
 120 static const AlphaCPUAlias alpha_cpu_aliases[] = {
 121     { "21064",   TYPE("ev4") },
 122     { "21164",   TYPE("ev5") },
 123     { "21164a",  TYPE("ev56") },
 124     { "21164pc", TYPE("pca56") },
 125     { "21264",   TYPE("ev6") },
 126     { "21264a",  TYPE("ev67") },
 127 };
 128
 129 static ObjectClass *alpha_cpu_class_by_name(const char *cpu_model)
 130 {
 131     ObjectClass *oc = NULL;
 132     char *typename;
 133     int i;
 134
 135     if (cpu_model == NULL) {
 136         return NULL;
 137     }
 138
 139     oc = object_class_by_name(cpu_model);
 140     if (oc != NULL && object_class_dynamic_cast(oc, TYPE_ALPHA_CPU) != NULL &&
 141         !object_class_is_abstract(oc)) {
 142         return oc;
 143     }
 144
 145     for (i = 0; i < ARRAY_SIZE(alpha_cpu_aliases); i++) {
 146         if (strcmp(cpu_model, alpha_cpu_aliases[i].alias) == 0) {
 147             oc = object_class_by_name(alpha_cpu_aliases[i].typename);
 148             assert(oc != NULL && !object_class_is_abstract(oc));
 149             return oc;
 150         }
 151     }
 152
 153     typename = g_strdup_printf("%s-" TYPE_ALPHA_CPU, cpu_model);
 154     oc = object_class_by_name(typename);
 155     g_free(typename);
 156     if (oc != NULL && object_class_is_abstract(oc)) {
 157         oc = NULL;
 158     }
 159     return oc;
 160 }
 161
 162 AlphaCPU *cpu_alpha_init(const char *cpu_model)
 163 {
 164     AlphaCPU *cpu;
 165     ObjectClass *cpu_class;
 166
 167     cpu_class = alpha_cpu_class_by_name(cpu_model);
 168     if (cpu_class == NULL) {
 169         /* Default to ev67; no reason not to emulate insns by default.  */
 170         cpu_class = object_class_by_name(TYPE("ev67"));
 171     }
 172     cpu = ALPHA_CPU(object_new(object_class_get_name(cpu_class)));
 173
 174     object_property_set_bool(OBJECT(cpu), true, "realized", NULL);
 175
 176     return cpu;
 177 }
 178
 179 static void ev4_cpu_initfn(Object *obj)
 180 {
 181     AlphaCPU *cpu = ALPHA_CPU(obj);
 182     CPUAlphaState *env = &cpu->env;
 183
 184     env->implver = IMPLVER_2106x;
 185 }
 186
 187 static const TypeInfo ev4_cpu_type_info = {
 188     .name = TYPE("ev4"),
 189     .parent = TYPE_ALPHA_CPU,
 190     .instance_init = ev4_cpu_initfn,
 191 };
 192
 193 static void ev5_cpu_initfn(Object *obj)
 194 {
 195     AlphaCPU *cpu = ALPHA_CPU(obj);
 196     CPUAlphaState *env = &cpu->env;
 197
 198     env->implver = IMPLVER_21164;
 199 }
 200
 201 static const TypeInfo ev5_cpu_type_info = {
 202     .name = TYPE("ev5"),
 203     .parent = TYPE_ALPHA_CPU,
 204     .instance_init = ev5_cpu_initfn,
 205 };
 206
 207 static void ev56_cpu_initfn(Object *obj)
 208 {
 209     AlphaCPU *cpu = ALPHA_CPU(obj);
 210     CPUAlphaState *env = &cpu->env;
 211
 212     env->amask |= AMASK_BWX;
 213 }
 214
 215 static const TypeInfo ev56_cpu_type_info = {
 216     .name = TYPE("ev56"),
 217     .parent = TYPE("ev5"),
 218     .instance_init = ev56_cpu_initfn,
 219 };
 220
 221 static void pca56_cpu_initfn(Object *obj)
 222 {
 223     AlphaCPU *cpu = ALPHA_CPU(obj);
 224     CPUAlphaState *env = &cpu->env;
 225
 226     env->amask |= AMASK_MVI;
 227 }
 228
 229 static const TypeInfo pca56_cpu_type_info = {
 230     .name = TYPE("pca56"),
 231     .parent = TYPE("ev56"),
 232     .instance_init = pca56_cpu_initfn,
 233 };
 234
 235 static void ev6_cpu_initfn(Object *obj)
 236 {
 237     AlphaCPU *cpu = ALPHA_CPU(obj);
 238     CPUAlphaState *env = &cpu->env;
 239
 240     env->implver = IMPLVER_21264;
 241     env->amask = AMASK_BWX | AMASK_FIX | AMASK_MVI | AMASK_TRAP;
 242 }
 243
 244 static const TypeInfo ev6_cpu_type_info = {
 245     .name = TYPE("ev6"),
 246     .parent = TYPE_ALPHA_CPU,
 247     .instance_init = ev6_cpu_initfn,
 248 };
 249
 250 static void ev67_cpu_initfn(Object *obj)
 251 {
 252     AlphaCPU *cpu = ALPHA_CPU(obj);
 253     CPUAlphaState *env = &cpu->env;
 254
 255     env->amask |= AMASK_CIX | AMASK_PREFETCH;
 256 }
 257
 258 static const TypeInfo ev67_cpu_type_info = {
 259     .name = TYPE("ev67"),
 260     .parent = TYPE("ev6"),
 261     .instance_init = ev67_cpu_initfn,
 262 };
 263
 264 static const TypeInfo ev68_cpu_type_info = {
 265     .name = TYPE("ev68"),
 266     .parent = TYPE("ev67"),
 267 };
 268
 269 static void alpha_cpu_initfn(Object *obj)
 270 {
 271     CPUState *cs = CPU(obj);
 272     AlphaCPU *cpu = ALPHA_CPU(obj);
 273     CPUAlphaState *env = &cpu->env;
 274
 275     cs->env_ptr = env;
 276     tlb_flush(cs, 1);
 277
 278     alpha_translate_init();
 279
 280 #if defined(CONFIG_USER_ONLY)
 281     env->ps = PS_USER_MODE;
 282     cpu_alpha_store_fpcr(env, (FPCR_INVD | FPCR_DZED | FPCR_OVFD
 283                                | FPCR_UNFD | FPCR_INED | FPCR_DNOD
 284                                | FPCR_DYN_NORMAL));
 285 #endif
 286     env->lock_addr = -1;
 287     env->fen = 1;
 288 }
 289
 290 static void alpha_cpu_class_init(ObjectClass *oc, void *data)
 291 {
 292     DeviceClass *dc = DEVICE_CLASS(oc);
 293     CPUClass *cc = CPU_CLASS(oc);
 294     AlphaCPUClass *acc = ALPHA_CPU_CLASS(oc);
 295
 296     acc->parent_realize = dc->realize;
 297     dc->realize = alpha_cpu_realizefn;
 298
 299     cc->class_by_name = alpha_cpu_class_by_name;
 300     cc->has_work = alpha_cpu_has_work;
 301     cc->do_interrupt = alpha_cpu_do_interrupt;
 302     cc->cpu_exec_interrupt = alpha_cpu_exec_interrupt;
 303     cc->dump_state = alpha_cpu_dump_state;
 304     cc->set_pc = alpha_cpu_set_pc;
 305     cc->gdb_read_register = alpha_cpu_gdb_read_register;
 306     cc->gdb_write_register = alpha_cpu_gdb_write_register;
 307 #ifdef CONFIG_USER_ONLY
 308     cc->handle_mmu_fault = alpha_cpu_handle_mmu_fault;
 309 #else
 310     cc->do_unassigned_access = alpha_cpu_unassigned_access;
 311     cc->do_unaligned_access = alpha_cpu_do_unaligned_access;
 312     cc->get_phys_page_debug = alpha_cpu_get_phys_page_debug;
 313     dc->vmsd = &vmstate_alpha_cpu;
 314 #endif
 315     cc->disas_set_info = alpha_cpu_disas_set_info;
 316
 317     cc->gdb_num_core_regs = 67;
 318 }
 319
 320 static const TypeInfo alpha_cpu_type_info = {
 321     .name = TYPE_ALPHA_CPU,
 322     .parent = TYPE_CPU,
 323     .instance_size = sizeof(AlphaCPU),
 324     .instance_init = alpha_cpu_initfn,
 325     .abstract = true,
 326     .class_size = sizeof(AlphaCPUClass),
 327     .class_init = alpha_cpu_class_init,
 328 };
 329
 330 static void alpha_cpu_register_types(void)
 331 {
 332     type_register_static(&alpha_cpu_type_info);
 333     type_register_static(&ev4_cpu_type_info);
 334     type_register_static(&ev5_cpu_type_info);
 335     type_register_static(&ev56_cpu_type_info);
 336     type_register_static(&pca56_cpu_type_info);
 337     type_register_static(&ev6_cpu_type_info);
 338     type_register_static(&ev67_cpu_type_info);
 339     type_register_static(&ev68_cpu_type_info);
 340 }
 341
 342 type_init(alpha_cpu_register_types)