2 * Tiny Code Generator for QEMU
4 * Copyright (c) 2008 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25 /* define it to use liveness analysis (better code) */
26 #define USE_LIVENESS_ANALYSIS
27 #define USE_TCG_OPTIMIZATIONS
29 #include "qemu/osdep.h"
31 /* Define to jump the ELF file used to communicate with GDB. */
34 #include "qemu/cutils.h"
35 #include "qemu/host-utils.h"
36 #include "qemu/timer.h"
38 /* Note: the long term plan is to reduce the dependencies on the QEMU
39 CPU definitions. Currently they are used for qemu_ld/st
41 #define NO_CPU_IO_DEFS
44 #include "qemu/host-utils.h"
45 #include "qemu/timer.h"
46 #include "exec/cpu-common.h"
47 #include "exec/exec-all.h"
51 #if UINTPTR_MAX == UINT32_MAX
52 # define ELF_CLASS ELFCLASS32
54 # define ELF_CLASS ELFCLASS64
56 #ifdef HOST_WORDS_BIGENDIAN
57 # define ELF_DATA ELFDATA2MSB
59 # define ELF_DATA ELFDATA2LSB
65 /* Forward declarations for functions declared in tcg-target.inc.c and
67 static void tcg_target_init(TCGContext
*s
);
68 static void tcg_target_qemu_prologue(TCGContext
*s
);
69 static void patch_reloc(tcg_insn_unit
*code_ptr
, int type
,
70 intptr_t value
, intptr_t addend
);
72 /* The CIE and FDE header definitions will be common to all hosts. */
74 uint32_t len
__attribute__((aligned((sizeof(void *)))));
80 uint8_t return_column
;
83 typedef struct QEMU_PACKED
{
84 uint32_t len
__attribute__((aligned((sizeof(void *)))));
88 } DebugFrameFDEHeader
;
90 typedef struct QEMU_PACKED
{
92 DebugFrameFDEHeader fde
;
95 static void tcg_register_jit_int(void *buf
, size_t size
,
96 const void *debug_frame
,
97 size_t debug_frame_size
)
98 __attribute__((unused
));
100 /* Forward declarations for functions declared and used in tcg-target.inc.c. */
101 static int target_parse_constraint(TCGArgConstraint
*ct
, const char **pct_str
);
102 static void tcg_out_ld(TCGContext
*s
, TCGType type
, TCGReg ret
, TCGReg arg1
,
104 static void tcg_out_mov(TCGContext
*s
, TCGType type
, TCGReg ret
, TCGReg arg
);
105 static void tcg_out_movi(TCGContext
*s
, TCGType type
,
106 TCGReg ret
, tcg_target_long arg
);
107 static void tcg_out_op(TCGContext
*s
, TCGOpcode opc
, const TCGArg
*args
,
108 const int *const_args
);
109 static void tcg_out_st(TCGContext
*s
, TCGType type
, TCGReg arg
, TCGReg arg1
,
111 static bool tcg_out_sti(TCGContext
*s
, TCGType type
, TCGArg val
,
112 TCGReg base
, intptr_t ofs
);
113 static void tcg_out_call(TCGContext
*s
, tcg_insn_unit
*target
);
114 static int tcg_target_const_match(tcg_target_long val
, TCGType type
,
115 const TCGArgConstraint
*arg_ct
);
116 static void tcg_out_tb_init(TCGContext
*s
);
117 static bool tcg_out_tb_finalize(TCGContext
*s
);
120 static TCGRegSet tcg_target_available_regs
[2];
121 static TCGRegSet tcg_target_call_clobber_regs
;
123 #if TCG_TARGET_INSN_UNIT_SIZE == 1
124 static __attribute__((unused
)) inline void tcg_out8(TCGContext
*s
, uint8_t v
)
129 static __attribute__((unused
)) inline void tcg_patch8(tcg_insn_unit
*p
,
136 #if TCG_TARGET_INSN_UNIT_SIZE <= 2
137 static __attribute__((unused
)) inline void tcg_out16(TCGContext
*s
, uint16_t v
)
139 if (TCG_TARGET_INSN_UNIT_SIZE
== 2) {
142 tcg_insn_unit
*p
= s
->code_ptr
;
143 memcpy(p
, &v
, sizeof(v
));
144 s
->code_ptr
= p
+ (2 / TCG_TARGET_INSN_UNIT_SIZE
);
148 static __attribute__((unused
)) inline void tcg_patch16(tcg_insn_unit
*p
,
151 if (TCG_TARGET_INSN_UNIT_SIZE
== 2) {
154 memcpy(p
, &v
, sizeof(v
));
159 #if TCG_TARGET_INSN_UNIT_SIZE <= 4
160 static __attribute__((unused
)) inline void tcg_out32(TCGContext
*s
, uint32_t v
)
162 if (TCG_TARGET_INSN_UNIT_SIZE
== 4) {
165 tcg_insn_unit
*p
= s
->code_ptr
;
166 memcpy(p
, &v
, sizeof(v
));
167 s
->code_ptr
= p
+ (4 / TCG_TARGET_INSN_UNIT_SIZE
);
171 static __attribute__((unused
)) inline void tcg_patch32(tcg_insn_unit
*p
,
174 if (TCG_TARGET_INSN_UNIT_SIZE
== 4) {
177 memcpy(p
, &v
, sizeof(v
));
182 #if TCG_TARGET_INSN_UNIT_SIZE <= 8
183 static __attribute__((unused
)) inline void tcg_out64(TCGContext
*s
, uint64_t v
)
185 if (TCG_TARGET_INSN_UNIT_SIZE
== 8) {
188 tcg_insn_unit
*p
= s
->code_ptr
;
189 memcpy(p
, &v
, sizeof(v
));
190 s
->code_ptr
= p
+ (8 / TCG_TARGET_INSN_UNIT_SIZE
);
194 static __attribute__((unused
)) inline void tcg_patch64(tcg_insn_unit
*p
,
197 if (TCG_TARGET_INSN_UNIT_SIZE
== 8) {
200 memcpy(p
, &v
, sizeof(v
));
205 /* label relocation processing */
207 static void tcg_out_reloc(TCGContext
*s
, tcg_insn_unit
*code_ptr
, int type
,
208 TCGLabel
*l
, intptr_t addend
)
213 /* FIXME: This may break relocations on RISC targets that
214 modify instruction fields in place. The caller may not have
215 written the initial value. */
216 patch_reloc(code_ptr
, type
, l
->u
.value
, addend
);
218 /* add a new relocation entry */
219 r
= tcg_malloc(sizeof(TCGRelocation
));
223 r
->next
= l
->u
.first_reloc
;
224 l
->u
.first_reloc
= r
;
228 static void tcg_out_label(TCGContext
*s
, TCGLabel
*l
, tcg_insn_unit
*ptr
)
230 intptr_t value
= (intptr_t)ptr
;
233 tcg_debug_assert(!l
->has_value
);
235 for (r
= l
->u
.first_reloc
; r
!= NULL
; r
= r
->next
) {
236 patch_reloc(r
->ptr
, r
->type
, value
, r
->addend
);
240 l
->u
.value_ptr
= ptr
;
243 TCGLabel
*gen_new_label(void)
245 TCGContext
*s
= &tcg_ctx
;
246 TCGLabel
*l
= tcg_malloc(sizeof(TCGLabel
));
255 #include "tcg-target.inc.c"
257 /* pool based memory allocation */
258 void *tcg_malloc_internal(TCGContext
*s
, int size
)
263 if (size
> TCG_POOL_CHUNK_SIZE
) {
264 /* big malloc: insert a new pool (XXX: could optimize) */
265 p
= g_malloc(sizeof(TCGPool
) + size
);
267 p
->next
= s
->pool_first_large
;
268 s
->pool_first_large
= p
;
279 pool_size
= TCG_POOL_CHUNK_SIZE
;
280 p
= g_malloc(sizeof(TCGPool
) + pool_size
);
284 s
->pool_current
->next
= p
;
293 s
->pool_cur
= p
->data
+ size
;
294 s
->pool_end
= p
->data
+ p
->size
;
298 void tcg_pool_reset(TCGContext
*s
)
301 for (p
= s
->pool_first_large
; p
; p
= t
) {
305 s
->pool_first_large
= NULL
;
306 s
->pool_cur
= s
->pool_end
= NULL
;
307 s
->pool_current
= NULL
;
310 typedef struct TCGHelperInfo
{
317 #include "exec/helper-proto.h"
319 static const TCGHelperInfo all_helpers
[] = {
320 #include "exec/helper-tcg.h"
323 static int indirect_reg_alloc_order
[ARRAY_SIZE(tcg_target_reg_alloc_order
)];
325 void tcg_context_init(TCGContext
*s
)
327 int op
, total_args
, n
, i
;
329 TCGArgConstraint
*args_ct
;
331 GHashTable
*helper_table
;
333 memset(s
, 0, sizeof(*s
));
336 /* Count total number of arguments and allocate the corresponding
339 for(op
= 0; op
< NB_OPS
; op
++) {
340 def
= &tcg_op_defs
[op
];
341 n
= def
->nb_iargs
+ def
->nb_oargs
;
345 args_ct
= g_malloc(sizeof(TCGArgConstraint
) * total_args
);
346 sorted_args
= g_malloc(sizeof(int) * total_args
);
348 for(op
= 0; op
< NB_OPS
; op
++) {
349 def
= &tcg_op_defs
[op
];
350 def
->args_ct
= args_ct
;
351 def
->sorted_args
= sorted_args
;
352 n
= def
->nb_iargs
+ def
->nb_oargs
;
357 /* Register helpers. */
358 /* Use g_direct_hash/equal for direct pointer comparisons on func. */
359 s
->helpers
= helper_table
= g_hash_table_new(NULL
, NULL
);
361 for (i
= 0; i
< ARRAY_SIZE(all_helpers
); ++i
) {
362 g_hash_table_insert(helper_table
, (gpointer
)all_helpers
[i
].func
,
363 (gpointer
)&all_helpers
[i
]);
368 /* Reverse the order of the saved registers, assuming they're all at
369 the start of tcg_target_reg_alloc_order. */
370 for (n
= 0; n
< ARRAY_SIZE(tcg_target_reg_alloc_order
); ++n
) {
371 int r
= tcg_target_reg_alloc_order
[n
];
372 if (tcg_regset_test_reg(tcg_target_call_clobber_regs
, r
)) {
376 for (i
= 0; i
< n
; ++i
) {
377 indirect_reg_alloc_order
[i
] = tcg_target_reg_alloc_order
[n
- 1 - i
];
379 for (; i
< ARRAY_SIZE(tcg_target_reg_alloc_order
); ++i
) {
380 indirect_reg_alloc_order
[i
] = tcg_target_reg_alloc_order
[i
];
384 void tcg_prologue_init(TCGContext
*s
)
386 size_t prologue_size
, total_size
;
389 /* Put the prologue at the beginning of code_gen_buffer. */
390 buf0
= s
->code_gen_buffer
;
393 s
->code_gen_prologue
= buf0
;
395 /* Generate the prologue. */
396 tcg_target_qemu_prologue(s
);
398 flush_icache_range((uintptr_t)buf0
, (uintptr_t)buf1
);
400 /* Deduct the prologue from the buffer. */
401 prologue_size
= tcg_current_code_size(s
);
402 s
->code_gen_ptr
= buf1
;
403 s
->code_gen_buffer
= buf1
;
405 total_size
= s
->code_gen_buffer_size
- prologue_size
;
406 s
->code_gen_buffer_size
= total_size
;
408 /* Compute a high-water mark, at which we voluntarily flush the buffer
409 and start over. The size here is arbitrary, significantly larger
410 than we expect the code generation for any one opcode to require. */
411 s
->code_gen_highwater
= s
->code_gen_buffer
+ (total_size
- 1024);
413 tcg_register_jit(s
->code_gen_buffer
, total_size
);
416 if (qemu_loglevel_mask(CPU_LOG_TB_OUT_ASM
)) {
417 qemu_log("PROLOGUE: [size=%zu]\n", prologue_size
);
418 log_disas(buf0
, prologue_size
);
425 void tcg_func_start(TCGContext
*s
)
428 s
->nb_temps
= s
->nb_globals
;
430 /* No temps have been previously allocated for size or locality. */
431 memset(s
->free_temps
, 0, sizeof(s
->free_temps
));
434 s
->current_frame_offset
= s
->frame_start
;
436 #ifdef CONFIG_DEBUG_TCG
437 s
->goto_tb_issue_mask
= 0;
440 s
->gen_first_op_idx
= 0;
441 s
->gen_last_op_idx
= -1;
442 s
->gen_next_op_idx
= 0;
443 s
->gen_next_parm_idx
= 0;
445 s
->be
= tcg_malloc(sizeof(TCGBackendData
));
448 static inline int temp_idx(TCGContext
*s
, TCGTemp
*ts
)
450 ptrdiff_t n
= ts
- s
->temps
;
451 tcg_debug_assert(n
>= 0 && n
< s
->nb_temps
);
455 static inline TCGTemp
*tcg_temp_alloc(TCGContext
*s
)
457 int n
= s
->nb_temps
++;
458 tcg_debug_assert(n
< TCG_MAX_TEMPS
);
459 return memset(&s
->temps
[n
], 0, sizeof(TCGTemp
));
462 static inline TCGTemp
*tcg_global_alloc(TCGContext
*s
)
464 tcg_debug_assert(s
->nb_globals
== s
->nb_temps
);
466 return tcg_temp_alloc(s
);
469 static int tcg_global_reg_new_internal(TCGContext
*s
, TCGType type
,
470 TCGReg reg
, const char *name
)
474 if (TCG_TARGET_REG_BITS
== 32 && type
!= TCG_TYPE_I32
) {
478 ts
= tcg_global_alloc(s
);
479 ts
->base_type
= type
;
484 tcg_regset_set_reg(s
->reserved_regs
, reg
);
486 return temp_idx(s
, ts
);
489 void tcg_set_frame(TCGContext
*s
, TCGReg reg
, intptr_t start
, intptr_t size
)
492 s
->frame_start
= start
;
493 s
->frame_end
= start
+ size
;
494 idx
= tcg_global_reg_new_internal(s
, TCG_TYPE_PTR
, reg
, "_frame");
495 s
->frame_temp
= &s
->temps
[idx
];
498 TCGv_i32
tcg_global_reg_new_i32(TCGReg reg
, const char *name
)
500 TCGContext
*s
= &tcg_ctx
;
503 if (tcg_regset_test_reg(s
->reserved_regs
, reg
)) {
506 idx
= tcg_global_reg_new_internal(s
, TCG_TYPE_I32
, reg
, name
);
507 return MAKE_TCGV_I32(idx
);
510 TCGv_i64
tcg_global_reg_new_i64(TCGReg reg
, const char *name
)
512 TCGContext
*s
= &tcg_ctx
;
515 if (tcg_regset_test_reg(s
->reserved_regs
, reg
)) {
518 idx
= tcg_global_reg_new_internal(s
, TCG_TYPE_I64
, reg
, name
);
519 return MAKE_TCGV_I64(idx
);
522 int tcg_global_mem_new_internal(TCGType type
, TCGv_ptr base
,
523 intptr_t offset
, const char *name
)
525 TCGContext
*s
= &tcg_ctx
;
526 TCGTemp
*base_ts
= &s
->temps
[GET_TCGV_PTR(base
)];
527 TCGTemp
*ts
= tcg_global_alloc(s
);
528 int indirect_reg
= 0, bigendian
= 0;
529 #ifdef HOST_WORDS_BIGENDIAN
533 if (!base_ts
->fixed_reg
) {
535 base_ts
->indirect_base
= 1;
538 if (TCG_TARGET_REG_BITS
== 32 && type
== TCG_TYPE_I64
) {
539 TCGTemp
*ts2
= tcg_global_alloc(s
);
542 ts
->base_type
= TCG_TYPE_I64
;
543 ts
->type
= TCG_TYPE_I32
;
544 ts
->indirect_reg
= indirect_reg
;
545 ts
->mem_allocated
= 1;
546 ts
->mem_base
= base_ts
;
547 ts
->mem_offset
= offset
+ bigendian
* 4;
548 pstrcpy(buf
, sizeof(buf
), name
);
549 pstrcat(buf
, sizeof(buf
), "_0");
550 ts
->name
= strdup(buf
);
552 tcg_debug_assert(ts2
== ts
+ 1);
553 ts2
->base_type
= TCG_TYPE_I64
;
554 ts2
->type
= TCG_TYPE_I32
;
555 ts2
->indirect_reg
= indirect_reg
;
556 ts2
->mem_allocated
= 1;
557 ts2
->mem_base
= base_ts
;
558 ts2
->mem_offset
= offset
+ (1 - bigendian
) * 4;
559 pstrcpy(buf
, sizeof(buf
), name
);
560 pstrcat(buf
, sizeof(buf
), "_1");
561 ts2
->name
= strdup(buf
);
563 ts
->base_type
= type
;
565 ts
->indirect_reg
= indirect_reg
;
566 ts
->mem_allocated
= 1;
567 ts
->mem_base
= base_ts
;
568 ts
->mem_offset
= offset
;
571 return temp_idx(s
, ts
);
574 static int tcg_temp_new_internal(TCGType type
, int temp_local
)
576 TCGContext
*s
= &tcg_ctx
;
580 k
= type
+ (temp_local
? TCG_TYPE_COUNT
: 0);
581 idx
= find_first_bit(s
->free_temps
[k
].l
, TCG_MAX_TEMPS
);
582 if (idx
< TCG_MAX_TEMPS
) {
583 /* There is already an available temp with the right type. */
584 clear_bit(idx
, s
->free_temps
[k
].l
);
587 ts
->temp_allocated
= 1;
588 tcg_debug_assert(ts
->base_type
== type
);
589 tcg_debug_assert(ts
->temp_local
== temp_local
);
591 ts
= tcg_temp_alloc(s
);
592 if (TCG_TARGET_REG_BITS
== 32 && type
== TCG_TYPE_I64
) {
593 TCGTemp
*ts2
= tcg_temp_alloc(s
);
595 ts
->base_type
= type
;
596 ts
->type
= TCG_TYPE_I32
;
597 ts
->temp_allocated
= 1;
598 ts
->temp_local
= temp_local
;
600 tcg_debug_assert(ts2
== ts
+ 1);
601 ts2
->base_type
= TCG_TYPE_I64
;
602 ts2
->type
= TCG_TYPE_I32
;
603 ts2
->temp_allocated
= 1;
604 ts2
->temp_local
= temp_local
;
606 ts
->base_type
= type
;
608 ts
->temp_allocated
= 1;
609 ts
->temp_local
= temp_local
;
611 idx
= temp_idx(s
, ts
);
614 #if defined(CONFIG_DEBUG_TCG)
620 TCGv_i32
tcg_temp_new_internal_i32(int temp_local
)
624 idx
= tcg_temp_new_internal(TCG_TYPE_I32
, temp_local
);
625 return MAKE_TCGV_I32(idx
);
628 TCGv_i64
tcg_temp_new_internal_i64(int temp_local
)
632 idx
= tcg_temp_new_internal(TCG_TYPE_I64
, temp_local
);
633 return MAKE_TCGV_I64(idx
);
636 static void tcg_temp_free_internal(int idx
)
638 TCGContext
*s
= &tcg_ctx
;
642 #if defined(CONFIG_DEBUG_TCG)
644 if (s
->temps_in_use
< 0) {
645 fprintf(stderr
, "More temporaries freed than allocated!\n");
649 tcg_debug_assert(idx
>= s
->nb_globals
&& idx
< s
->nb_temps
);
651 tcg_debug_assert(ts
->temp_allocated
!= 0);
652 ts
->temp_allocated
= 0;
654 k
= ts
->base_type
+ (ts
->temp_local
? TCG_TYPE_COUNT
: 0);
655 set_bit(idx
, s
->free_temps
[k
].l
);
658 void tcg_temp_free_i32(TCGv_i32 arg
)
660 tcg_temp_free_internal(GET_TCGV_I32(arg
));
663 void tcg_temp_free_i64(TCGv_i64 arg
)
665 tcg_temp_free_internal(GET_TCGV_I64(arg
));
668 TCGv_i32
tcg_const_i32(int32_t val
)
671 t0
= tcg_temp_new_i32();
672 tcg_gen_movi_i32(t0
, val
);
676 TCGv_i64
tcg_const_i64(int64_t val
)
679 t0
= tcg_temp_new_i64();
680 tcg_gen_movi_i64(t0
, val
);
684 TCGv_i32
tcg_const_local_i32(int32_t val
)
687 t0
= tcg_temp_local_new_i32();
688 tcg_gen_movi_i32(t0
, val
);
692 TCGv_i64
tcg_const_local_i64(int64_t val
)
695 t0
= tcg_temp_local_new_i64();
696 tcg_gen_movi_i64(t0
, val
);
700 #if defined(CONFIG_DEBUG_TCG)
701 void tcg_clear_temp_count(void)
703 TCGContext
*s
= &tcg_ctx
;
707 int tcg_check_temp_count(void)
709 TCGContext
*s
= &tcg_ctx
;
710 if (s
->temps_in_use
) {
711 /* Clear the count so that we don't give another
712 * warning immediately next time around.
721 /* Note: we convert the 64 bit args to 32 bit and do some alignment
722 and endian swap. Maybe it would be better to do the alignment
723 and endian swap in tcg_reg_alloc_call(). */
724 void tcg_gen_callN(TCGContext
*s
, void *func
, TCGArg ret
,
725 int nargs
, TCGArg
*args
)
727 int i
, real_args
, nb_rets
, pi
, pi_first
;
728 unsigned sizemask
, flags
;
731 info
= g_hash_table_lookup(s
->helpers
, (gpointer
)func
);
733 sizemask
= info
->sizemask
;
735 #if defined(__sparc__) && !defined(__arch64__) \
736 && !defined(CONFIG_TCG_INTERPRETER)
737 /* We have 64-bit values in one register, but need to pass as two
738 separate parameters. Split them. */
739 int orig_sizemask
= sizemask
;
740 int orig_nargs
= nargs
;
743 TCGV_UNUSED_I64(retl
);
744 TCGV_UNUSED_I64(reth
);
746 TCGArg
*split_args
= __builtin_alloca(sizeof(TCGArg
) * nargs
* 2);
747 for (i
= real_args
= 0; i
< nargs
; ++i
) {
748 int is_64bit
= sizemask
& (1 << (i
+1)*2);
750 TCGv_i64 orig
= MAKE_TCGV_I64(args
[i
]);
751 TCGv_i32 h
= tcg_temp_new_i32();
752 TCGv_i32 l
= tcg_temp_new_i32();
753 tcg_gen_extr_i64_i32(l
, h
, orig
);
754 split_args
[real_args
++] = GET_TCGV_I32(h
);
755 split_args
[real_args
++] = GET_TCGV_I32(l
);
757 split_args
[real_args
++] = args
[i
];
764 #elif defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64
765 for (i
= 0; i
< nargs
; ++i
) {
766 int is_64bit
= sizemask
& (1 << (i
+1)*2);
767 int is_signed
= sizemask
& (2 << (i
+1)*2);
769 TCGv_i64 temp
= tcg_temp_new_i64();
770 TCGv_i64 orig
= MAKE_TCGV_I64(args
[i
]);
772 tcg_gen_ext32s_i64(temp
, orig
);
774 tcg_gen_ext32u_i64(temp
, orig
);
776 args
[i
] = GET_TCGV_I64(temp
);
779 #endif /* TCG_TARGET_EXTEND_ARGS */
781 pi_first
= pi
= s
->gen_next_parm_idx
;
782 if (ret
!= TCG_CALL_DUMMY_ARG
) {
783 #if defined(__sparc__) && !defined(__arch64__) \
784 && !defined(CONFIG_TCG_INTERPRETER)
785 if (orig_sizemask
& 1) {
786 /* The 32-bit ABI is going to return the 64-bit value in
787 the %o0/%o1 register pair. Prepare for this by using
788 two return temporaries, and reassemble below. */
789 retl
= tcg_temp_new_i64();
790 reth
= tcg_temp_new_i64();
791 s
->gen_opparam_buf
[pi
++] = GET_TCGV_I64(reth
);
792 s
->gen_opparam_buf
[pi
++] = GET_TCGV_I64(retl
);
795 s
->gen_opparam_buf
[pi
++] = ret
;
799 if (TCG_TARGET_REG_BITS
< 64 && (sizemask
& 1)) {
800 #ifdef HOST_WORDS_BIGENDIAN
801 s
->gen_opparam_buf
[pi
++] = ret
+ 1;
802 s
->gen_opparam_buf
[pi
++] = ret
;
804 s
->gen_opparam_buf
[pi
++] = ret
;
805 s
->gen_opparam_buf
[pi
++] = ret
+ 1;
809 s
->gen_opparam_buf
[pi
++] = ret
;
817 for (i
= 0; i
< nargs
; i
++) {
818 int is_64bit
= sizemask
& (1 << (i
+1)*2);
819 if (TCG_TARGET_REG_BITS
< 64 && is_64bit
) {
820 #ifdef TCG_TARGET_CALL_ALIGN_ARGS
821 /* some targets want aligned 64 bit args */
823 s
->gen_opparam_buf
[pi
++] = TCG_CALL_DUMMY_ARG
;
827 /* If stack grows up, then we will be placing successive
828 arguments at lower addresses, which means we need to
829 reverse the order compared to how we would normally
830 treat either big or little-endian. For those arguments
831 that will wind up in registers, this still works for
832 HPPA (the only current STACK_GROWSUP target) since the
833 argument registers are *also* allocated in decreasing
834 order. If another such target is added, this logic may
835 have to get more complicated to differentiate between
836 stack arguments and register arguments. */
837 #if defined(HOST_WORDS_BIGENDIAN) != defined(TCG_TARGET_STACK_GROWSUP)
838 s
->gen_opparam_buf
[pi
++] = args
[i
] + 1;
839 s
->gen_opparam_buf
[pi
++] = args
[i
];
841 s
->gen_opparam_buf
[pi
++] = args
[i
];
842 s
->gen_opparam_buf
[pi
++] = args
[i
] + 1;
848 s
->gen_opparam_buf
[pi
++] = args
[i
];
851 s
->gen_opparam_buf
[pi
++] = (uintptr_t)func
;
852 s
->gen_opparam_buf
[pi
++] = flags
;
854 i
= s
->gen_next_op_idx
;
855 tcg_debug_assert(i
< OPC_BUF_SIZE
);
856 tcg_debug_assert(pi
<= OPPARAM_BUF_SIZE
);
858 /* Set links for sequential allocation during translation. */
859 s
->gen_op_buf
[i
] = (TCGOp
){
860 .opc
= INDEX_op_call
,
868 /* Make sure the calli field didn't overflow. */
869 tcg_debug_assert(s
->gen_op_buf
[i
].calli
== real_args
);
871 s
->gen_last_op_idx
= i
;
872 s
->gen_next_op_idx
= i
+ 1;
873 s
->gen_next_parm_idx
= pi
;
875 #if defined(__sparc__) && !defined(__arch64__) \
876 && !defined(CONFIG_TCG_INTERPRETER)
877 /* Free all of the parts we allocated above. */
878 for (i
= real_args
= 0; i
< orig_nargs
; ++i
) {
879 int is_64bit
= orig_sizemask
& (1 << (i
+1)*2);
881 TCGv_i32 h
= MAKE_TCGV_I32(args
[real_args
++]);
882 TCGv_i32 l
= MAKE_TCGV_I32(args
[real_args
++]);
883 tcg_temp_free_i32(h
);
884 tcg_temp_free_i32(l
);
889 if (orig_sizemask
& 1) {
890 /* The 32-bit ABI returned two 32-bit pieces. Re-assemble them.
891 Note that describing these as TCGv_i64 eliminates an unnecessary
892 zero-extension that tcg_gen_concat_i32_i64 would create. */
893 tcg_gen_concat32_i64(MAKE_TCGV_I64(ret
), retl
, reth
);
894 tcg_temp_free_i64(retl
);
895 tcg_temp_free_i64(reth
);
897 #elif defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64
898 for (i
= 0; i
< nargs
; ++i
) {
899 int is_64bit
= sizemask
& (1 << (i
+1)*2);
901 TCGv_i64 temp
= MAKE_TCGV_I64(args
[i
]);
902 tcg_temp_free_i64(temp
);
905 #endif /* TCG_TARGET_EXTEND_ARGS */
908 static void tcg_reg_alloc_start(TCGContext
*s
)
912 for(i
= 0; i
< s
->nb_globals
; i
++) {
915 ts
->val_type
= TEMP_VAL_REG
;
917 ts
->val_type
= TEMP_VAL_MEM
;
920 for(i
= s
->nb_globals
; i
< s
->nb_temps
; i
++) {
922 if (ts
->temp_local
) {
923 ts
->val_type
= TEMP_VAL_MEM
;
925 ts
->val_type
= TEMP_VAL_DEAD
;
927 ts
->mem_allocated
= 0;
931 memset(s
->reg_to_temp
, 0, sizeof(s
->reg_to_temp
));
934 static char *tcg_get_arg_str_ptr(TCGContext
*s
, char *buf
, int buf_size
,
937 int idx
= temp_idx(s
, ts
);
939 if (idx
< s
->nb_globals
) {
940 pstrcpy(buf
, buf_size
, ts
->name
);
941 } else if (ts
->temp_local
) {
942 snprintf(buf
, buf_size
, "loc%d", idx
- s
->nb_globals
);
944 snprintf(buf
, buf_size
, "tmp%d", idx
- s
->nb_globals
);
949 static char *tcg_get_arg_str_idx(TCGContext
*s
, char *buf
,
950 int buf_size
, int idx
)
952 tcg_debug_assert(idx
>= 0 && idx
< s
->nb_temps
);
953 return tcg_get_arg_str_ptr(s
, buf
, buf_size
, &s
->temps
[idx
]);
956 /* Find helper name. */
957 static inline const char *tcg_find_helper(TCGContext
*s
, uintptr_t val
)
959 const char *ret
= NULL
;
961 TCGHelperInfo
*info
= g_hash_table_lookup(s
->helpers
, (gpointer
)val
);
969 static const char * const cond_name
[] =
971 [TCG_COND_NEVER
] = "never",
972 [TCG_COND_ALWAYS
] = "always",
973 [TCG_COND_EQ
] = "eq",
974 [TCG_COND_NE
] = "ne",
975 [TCG_COND_LT
] = "lt",
976 [TCG_COND_GE
] = "ge",
977 [TCG_COND_LE
] = "le",
978 [TCG_COND_GT
] = "gt",
979 [TCG_COND_LTU
] = "ltu",
980 [TCG_COND_GEU
] = "geu",
981 [TCG_COND_LEU
] = "leu",
982 [TCG_COND_GTU
] = "gtu"
985 static const char * const ldst_name
[] =
1001 static const char * const alignment_name
[(MO_AMASK
>> MO_ASHIFT
) + 1] = {
1003 [MO_UNALN
>> MO_ASHIFT
] = "un+",
1004 [MO_ALIGN
>> MO_ASHIFT
] = "",
1006 [MO_UNALN
>> MO_ASHIFT
] = "",
1007 [MO_ALIGN
>> MO_ASHIFT
] = "al+",
1009 [MO_ALIGN_2
>> MO_ASHIFT
] = "al2+",
1010 [MO_ALIGN_4
>> MO_ASHIFT
] = "al4+",
1011 [MO_ALIGN_8
>> MO_ASHIFT
] = "al8+",
1012 [MO_ALIGN_16
>> MO_ASHIFT
] = "al16+",
1013 [MO_ALIGN_32
>> MO_ASHIFT
] = "al32+",
1014 [MO_ALIGN_64
>> MO_ASHIFT
] = "al64+",
1017 void tcg_dump_ops(TCGContext
*s
)
1023 for (oi
= s
->gen_first_op_idx
; oi
>= 0; oi
= op
->next
) {
1024 int i
, k
, nb_oargs
, nb_iargs
, nb_cargs
;
1025 const TCGOpDef
*def
;
1029 op
= &s
->gen_op_buf
[oi
];
1031 def
= &tcg_op_defs
[c
];
1032 args
= &s
->gen_opparam_buf
[op
->args
];
1034 if (c
== INDEX_op_insn_start
) {
1035 qemu_log("%s ----", oi
!= s
->gen_first_op_idx
? "\n" : "");
1037 for (i
= 0; i
< TARGET_INSN_START_WORDS
; ++i
) {
1039 #if TARGET_LONG_BITS > TCG_TARGET_REG_BITS
1040 a
= ((target_ulong
)args
[i
* 2 + 1] << 32) | args
[i
* 2];
1044 qemu_log(" " TARGET_FMT_lx
, a
);
1046 } else if (c
== INDEX_op_call
) {
1047 /* variable number of arguments */
1048 nb_oargs
= op
->callo
;
1049 nb_iargs
= op
->calli
;
1050 nb_cargs
= def
->nb_cargs
;
1052 /* function name, flags, out args */
1053 qemu_log(" %s %s,$0x%" TCG_PRIlx
",$%d", def
->name
,
1054 tcg_find_helper(s
, args
[nb_oargs
+ nb_iargs
]),
1055 args
[nb_oargs
+ nb_iargs
+ 1], nb_oargs
);
1056 for (i
= 0; i
< nb_oargs
; i
++) {
1057 qemu_log(",%s", tcg_get_arg_str_idx(s
, buf
, sizeof(buf
),
1060 for (i
= 0; i
< nb_iargs
; i
++) {
1061 TCGArg arg
= args
[nb_oargs
+ i
];
1062 const char *t
= "<dummy>";
1063 if (arg
!= TCG_CALL_DUMMY_ARG
) {
1064 t
= tcg_get_arg_str_idx(s
, buf
, sizeof(buf
), arg
);
1069 qemu_log(" %s ", def
->name
);
1071 nb_oargs
= def
->nb_oargs
;
1072 nb_iargs
= def
->nb_iargs
;
1073 nb_cargs
= def
->nb_cargs
;
1076 for (i
= 0; i
< nb_oargs
; i
++) {
1080 qemu_log("%s", tcg_get_arg_str_idx(s
, buf
, sizeof(buf
),
1083 for (i
= 0; i
< nb_iargs
; i
++) {
1087 qemu_log("%s", tcg_get_arg_str_idx(s
, buf
, sizeof(buf
),
1091 case INDEX_op_brcond_i32
:
1092 case INDEX_op_setcond_i32
:
1093 case INDEX_op_movcond_i32
:
1094 case INDEX_op_brcond2_i32
:
1095 case INDEX_op_setcond2_i32
:
1096 case INDEX_op_brcond_i64
:
1097 case INDEX_op_setcond_i64
:
1098 case INDEX_op_movcond_i64
:
1099 if (args
[k
] < ARRAY_SIZE(cond_name
) && cond_name
[args
[k
]]) {
1100 qemu_log(",%s", cond_name
[args
[k
++]]);
1102 qemu_log(",$0x%" TCG_PRIlx
, args
[k
++]);
1106 case INDEX_op_qemu_ld_i32
:
1107 case INDEX_op_qemu_st_i32
:
1108 case INDEX_op_qemu_ld_i64
:
1109 case INDEX_op_qemu_st_i64
:
1111 TCGMemOpIdx oi
= args
[k
++];
1112 TCGMemOp op
= get_memop(oi
);
1113 unsigned ix
= get_mmuidx(oi
);
1115 if (op
& ~(MO_AMASK
| MO_BSWAP
| MO_SSIZE
)) {
1116 qemu_log(",$0x%x,%u", op
, ix
);
1118 const char *s_al
, *s_op
;
1119 s_al
= alignment_name
[(op
& MO_AMASK
) >> MO_ASHIFT
];
1120 s_op
= ldst_name
[op
& (MO_BSWAP
| MO_SSIZE
)];
1121 qemu_log(",%s%s,%u", s_al
, s_op
, ix
);
1131 case INDEX_op_set_label
:
1133 case INDEX_op_brcond_i32
:
1134 case INDEX_op_brcond_i64
:
1135 case INDEX_op_brcond2_i32
:
1136 qemu_log("%s$L%d", k
? "," : "", arg_label(args
[k
])->id
);
1142 for (; i
< nb_cargs
; i
++, k
++) {
1143 qemu_log("%s$0x%" TCG_PRIlx
, k
? "," : "", args
[k
]);
1150 /* we give more priority to constraints with less registers */
1151 static int get_constraint_priority(const TCGOpDef
*def
, int k
)
1153 const TCGArgConstraint
*arg_ct
;
1156 arg_ct
= &def
->args_ct
[k
];
1157 if (arg_ct
->ct
& TCG_CT_ALIAS
) {
1158 /* an alias is equivalent to a single register */
1161 if (!(arg_ct
->ct
& TCG_CT_REG
))
1164 for(i
= 0; i
< TCG_TARGET_NB_REGS
; i
++) {
1165 if (tcg_regset_test_reg(arg_ct
->u
.regs
, i
))
1169 return TCG_TARGET_NB_REGS
- n
+ 1;
1172 /* sort from highest priority to lowest */
1173 static void sort_constraints(TCGOpDef
*def
, int start
, int n
)
1175 int i
, j
, p1
, p2
, tmp
;
1177 for(i
= 0; i
< n
; i
++)
1178 def
->sorted_args
[start
+ i
] = start
+ i
;
1181 for(i
= 0; i
< n
- 1; i
++) {
1182 for(j
= i
+ 1; j
< n
; j
++) {
1183 p1
= get_constraint_priority(def
, def
->sorted_args
[start
+ i
]);
1184 p2
= get_constraint_priority(def
, def
->sorted_args
[start
+ j
]);
1186 tmp
= def
->sorted_args
[start
+ i
];
1187 def
->sorted_args
[start
+ i
] = def
->sorted_args
[start
+ j
];
1188 def
->sorted_args
[start
+ j
] = tmp
;
1194 void tcg_add_target_add_op_defs(const TCGTargetOpDef
*tdefs
)
1202 if (tdefs
->op
== (TCGOpcode
)-1)
1205 tcg_debug_assert((unsigned)op
< NB_OPS
);
1206 def
= &tcg_op_defs
[op
];
1207 #if defined(CONFIG_DEBUG_TCG)
1208 /* Duplicate entry in op definitions? */
1209 tcg_debug_assert(!def
->used
);
1212 nb_args
= def
->nb_iargs
+ def
->nb_oargs
;
1213 for(i
= 0; i
< nb_args
; i
++) {
1214 ct_str
= tdefs
->args_ct_str
[i
];
1215 /* Incomplete TCGTargetOpDef entry? */
1216 tcg_debug_assert(ct_str
!= NULL
);
1217 tcg_regset_clear(def
->args_ct
[i
].u
.regs
);
1218 def
->args_ct
[i
].ct
= 0;
1219 if (ct_str
[0] >= '0' && ct_str
[0] <= '9') {
1221 oarg
= ct_str
[0] - '0';
1222 tcg_debug_assert(oarg
< def
->nb_oargs
);
1223 tcg_debug_assert(def
->args_ct
[oarg
].ct
& TCG_CT_REG
);
1224 /* TCG_CT_ALIAS is for the output arguments. The input
1225 argument is tagged with TCG_CT_IALIAS. */
1226 def
->args_ct
[i
] = def
->args_ct
[oarg
];
1227 def
->args_ct
[oarg
].ct
= TCG_CT_ALIAS
;
1228 def
->args_ct
[oarg
].alias_index
= i
;
1229 def
->args_ct
[i
].ct
|= TCG_CT_IALIAS
;
1230 def
->args_ct
[i
].alias_index
= oarg
;
1233 if (*ct_str
== '\0')
1237 def
->args_ct
[i
].ct
|= TCG_CT_CONST
;
1241 if (target_parse_constraint(&def
->args_ct
[i
], &ct_str
) < 0) {
1242 fprintf(stderr
, "Invalid constraint '%s' for arg %d of operation '%s'\n",
1243 ct_str
, i
, def
->name
);
1251 /* TCGTargetOpDef entry with too much information? */
1252 tcg_debug_assert(i
== TCG_MAX_OP_ARGS
|| tdefs
->args_ct_str
[i
] == NULL
);
1254 /* sort the constraints (XXX: this is just an heuristic) */
1255 sort_constraints(def
, 0, def
->nb_oargs
);
1256 sort_constraints(def
, def
->nb_oargs
, def
->nb_iargs
);
1262 printf("%s: sorted=", def
->name
);
1263 for(i
= 0; i
< def
->nb_oargs
+ def
->nb_iargs
; i
++)
1264 printf(" %d", def
->sorted_args
[i
]);
1271 #if defined(CONFIG_DEBUG_TCG)
1273 for (op
= 0; op
< tcg_op_defs_max
; op
++) {
1274 const TCGOpDef
*def
= &tcg_op_defs
[op
];
1275 if (def
->flags
& TCG_OPF_NOT_PRESENT
) {
1276 /* Wrong entry in op definitions? */
1278 fprintf(stderr
, "Invalid op definition for %s\n", def
->name
);
1282 /* Missing entry in op definitions? */
1284 fprintf(stderr
, "Missing op definition for %s\n", def
->name
);
1295 void tcg_op_remove(TCGContext
*s
, TCGOp
*op
)
1297 int next
= op
->next
;
1298 int prev
= op
->prev
;
1301 s
->gen_op_buf
[next
].prev
= prev
;
1303 s
->gen_last_op_idx
= prev
;
1306 s
->gen_op_buf
[prev
].next
= next
;
1308 s
->gen_first_op_idx
= next
;
1311 memset(op
, -1, sizeof(*op
));
1313 #ifdef CONFIG_PROFILER
1318 #ifdef USE_LIVENESS_ANALYSIS
1319 /* liveness analysis: end of function: all temps are dead, and globals
1320 should be in memory. */
1321 static inline void tcg_la_func_end(TCGContext
*s
, uint8_t *dead_temps
,
1324 memset(dead_temps
, 1, s
->nb_temps
);
1325 memset(mem_temps
, 1, s
->nb_globals
);
1326 memset(mem_temps
+ s
->nb_globals
, 0, s
->nb_temps
- s
->nb_globals
);
1329 /* liveness analysis: end of basic block: all temps are dead, globals
1330 and local temps should be in memory. */
1331 static inline void tcg_la_bb_end(TCGContext
*s
, uint8_t *dead_temps
,
1336 memset(dead_temps
, 1, s
->nb_temps
);
1337 memset(mem_temps
, 1, s
->nb_globals
);
1338 for(i
= s
->nb_globals
; i
< s
->nb_temps
; i
++) {
1339 mem_temps
[i
] = s
->temps
[i
].temp_local
;
1343 /* Liveness analysis : update the opc_dead_args array to tell if a
1344 given input arguments is dead. Instructions updating dead
1345 temporaries are removed. */
1346 static void tcg_liveness_analysis(TCGContext
*s
)
1348 uint8_t *dead_temps
, *mem_temps
;
1349 int oi
, oi_prev
, nb_ops
;
1351 nb_ops
= s
->gen_next_op_idx
;
1352 s
->op_dead_args
= tcg_malloc(nb_ops
* sizeof(uint16_t));
1353 s
->op_sync_args
= tcg_malloc(nb_ops
* sizeof(uint8_t));
1355 dead_temps
= tcg_malloc(s
->nb_temps
);
1356 mem_temps
= tcg_malloc(s
->nb_temps
);
1357 tcg_la_func_end(s
, dead_temps
, mem_temps
);
1359 for (oi
= s
->gen_last_op_idx
; oi
>= 0; oi
= oi_prev
) {
1360 int i
, nb_iargs
, nb_oargs
;
1361 TCGOpcode opc_new
, opc_new2
;
1367 TCGOp
* const op
= &s
->gen_op_buf
[oi
];
1368 TCGArg
* const args
= &s
->gen_opparam_buf
[op
->args
];
1369 TCGOpcode opc
= op
->opc
;
1370 const TCGOpDef
*def
= &tcg_op_defs
[opc
];
1379 nb_oargs
= op
->callo
;
1380 nb_iargs
= op
->calli
;
1381 call_flags
= args
[nb_oargs
+ nb_iargs
+ 1];
1383 /* pure functions can be removed if their result is unused */
1384 if (call_flags
& TCG_CALL_NO_SIDE_EFFECTS
) {
1385 for (i
= 0; i
< nb_oargs
; i
++) {
1387 if (!dead_temps
[arg
] || mem_temps
[arg
]) {
1388 goto do_not_remove_call
;
1395 /* output args are dead */
1398 for (i
= 0; i
< nb_oargs
; i
++) {
1400 if (dead_temps
[arg
]) {
1401 dead_args
|= (1 << i
);
1403 if (mem_temps
[arg
]) {
1404 sync_args
|= (1 << i
);
1406 dead_temps
[arg
] = 1;
1410 if (!(call_flags
& TCG_CALL_NO_READ_GLOBALS
)) {
1411 /* globals should be synced to memory */
1412 memset(mem_temps
, 1, s
->nb_globals
);
1414 if (!(call_flags
& (TCG_CALL_NO_WRITE_GLOBALS
|
1415 TCG_CALL_NO_READ_GLOBALS
))) {
1416 /* globals should go back to memory */
1417 memset(dead_temps
, 1, s
->nb_globals
);
1420 /* record arguments that die in this helper */
1421 for (i
= nb_oargs
; i
< nb_iargs
+ nb_oargs
; i
++) {
1423 if (arg
!= TCG_CALL_DUMMY_ARG
) {
1424 if (dead_temps
[arg
]) {
1425 dead_args
|= (1 << i
);
1429 /* input arguments are live for preceding opcodes */
1430 for (i
= nb_oargs
; i
< nb_oargs
+ nb_iargs
; i
++) {
1432 dead_temps
[arg
] = 0;
1434 s
->op_dead_args
[oi
] = dead_args
;
1435 s
->op_sync_args
[oi
] = sync_args
;
1439 case INDEX_op_insn_start
:
1441 case INDEX_op_discard
:
1442 /* mark the temporary as dead */
1443 dead_temps
[args
[0]] = 1;
1444 mem_temps
[args
[0]] = 0;
1447 case INDEX_op_add2_i32
:
1448 opc_new
= INDEX_op_add_i32
;
1450 case INDEX_op_sub2_i32
:
1451 opc_new
= INDEX_op_sub_i32
;
1453 case INDEX_op_add2_i64
:
1454 opc_new
= INDEX_op_add_i64
;
1456 case INDEX_op_sub2_i64
:
1457 opc_new
= INDEX_op_sub_i64
;
1461 /* Test if the high part of the operation is dead, but not
1462 the low part. The result can be optimized to a simple
1463 add or sub. This happens often for x86_64 guest when the
1464 cpu mode is set to 32 bit. */
1465 if (dead_temps
[args
[1]] && !mem_temps
[args
[1]]) {
1466 if (dead_temps
[args
[0]] && !mem_temps
[args
[0]]) {
1469 /* Replace the opcode and adjust the args in place,
1470 leaving 3 unused args at the end. */
1471 op
->opc
= opc
= opc_new
;
1474 /* Fall through and mark the single-word operation live. */
1480 case INDEX_op_mulu2_i32
:
1481 opc_new
= INDEX_op_mul_i32
;
1482 opc_new2
= INDEX_op_muluh_i32
;
1483 have_opc_new2
= TCG_TARGET_HAS_muluh_i32
;
1485 case INDEX_op_muls2_i32
:
1486 opc_new
= INDEX_op_mul_i32
;
1487 opc_new2
= INDEX_op_mulsh_i32
;
1488 have_opc_new2
= TCG_TARGET_HAS_mulsh_i32
;
1490 case INDEX_op_mulu2_i64
:
1491 opc_new
= INDEX_op_mul_i64
;
1492 opc_new2
= INDEX_op_muluh_i64
;
1493 have_opc_new2
= TCG_TARGET_HAS_muluh_i64
;
1495 case INDEX_op_muls2_i64
:
1496 opc_new
= INDEX_op_mul_i64
;
1497 opc_new2
= INDEX_op_mulsh_i64
;
1498 have_opc_new2
= TCG_TARGET_HAS_mulsh_i64
;
1503 if (dead_temps
[args
[1]] && !mem_temps
[args
[1]]) {
1504 if (dead_temps
[args
[0]] && !mem_temps
[args
[0]]) {
1505 /* Both parts of the operation are dead. */
1508 /* The high part of the operation is dead; generate the low. */
1509 op
->opc
= opc
= opc_new
;
1512 } else if (have_opc_new2
&& dead_temps
[args
[0]]
1513 && !mem_temps
[args
[0]]) {
1514 /* The low part of the operation is dead; generate the high. */
1515 op
->opc
= opc
= opc_new2
;
1522 /* Mark the single-word operation live. */
1527 /* XXX: optimize by hardcoding common cases (e.g. triadic ops) */
1528 nb_iargs
= def
->nb_iargs
;
1529 nb_oargs
= def
->nb_oargs
;
1531 /* Test if the operation can be removed because all
1532 its outputs are dead. We assume that nb_oargs == 0
1533 implies side effects */
1534 if (!(def
->flags
& TCG_OPF_SIDE_EFFECTS
) && nb_oargs
!= 0) {
1535 for (i
= 0; i
< nb_oargs
; i
++) {
1537 if (!dead_temps
[arg
] || mem_temps
[arg
]) {
1542 tcg_op_remove(s
, op
);
1545 /* output args are dead */
1548 for (i
= 0; i
< nb_oargs
; i
++) {
1550 if (dead_temps
[arg
]) {
1551 dead_args
|= (1 << i
);
1553 if (mem_temps
[arg
]) {
1554 sync_args
|= (1 << i
);
1556 dead_temps
[arg
] = 1;
1560 /* if end of basic block, update */
1561 if (def
->flags
& TCG_OPF_BB_END
) {
1562 tcg_la_bb_end(s
, dead_temps
, mem_temps
);
1563 } else if (def
->flags
& TCG_OPF_SIDE_EFFECTS
) {
1564 /* globals should be synced to memory */
1565 memset(mem_temps
, 1, s
->nb_globals
);
1568 /* record arguments that die in this opcode */
1569 for (i
= nb_oargs
; i
< nb_oargs
+ nb_iargs
; i
++) {
1571 if (dead_temps
[arg
]) {
1572 dead_args
|= (1 << i
);
1575 /* input arguments are live for preceding opcodes */
1576 for (i
= nb_oargs
; i
< nb_oargs
+ nb_iargs
; i
++) {
1578 dead_temps
[arg
] = 0;
1580 s
->op_dead_args
[oi
] = dead_args
;
1581 s
->op_sync_args
[oi
] = sync_args
;
1588 /* dummy liveness analysis */
1589 static void tcg_liveness_analysis(TCGContext
*s
)
1591 int nb_ops
= s
->gen_next_op_idx
;
1593 s
->op_dead_args
= tcg_malloc(nb_ops
* sizeof(uint16_t));
1594 memset(s
->op_dead_args
, 0, nb_ops
* sizeof(uint16_t));
1595 s
->op_sync_args
= tcg_malloc(nb_ops
* sizeof(uint8_t));
1596 memset(s
->op_sync_args
, 0, nb_ops
* sizeof(uint8_t));
1600 #ifdef CONFIG_DEBUG_TCG
1601 static void dump_regs(TCGContext
*s
)
1607 for(i
= 0; i
< s
->nb_temps
; i
++) {
1609 printf(" %10s: ", tcg_get_arg_str_idx(s
, buf
, sizeof(buf
), i
));
1610 switch(ts
->val_type
) {
1612 printf("%s", tcg_target_reg_names
[ts
->reg
]);
1615 printf("%d(%s)", (int)ts
->mem_offset
,
1616 tcg_target_reg_names
[ts
->mem_base
->reg
]);
1618 case TEMP_VAL_CONST
:
1619 printf("$0x%" TCG_PRIlx
, ts
->val
);
1631 for(i
= 0; i
< TCG_TARGET_NB_REGS
; i
++) {
1632 if (s
->reg_to_temp
[i
] != NULL
) {
1634 tcg_target_reg_names
[i
],
1635 tcg_get_arg_str_ptr(s
, buf
, sizeof(buf
), s
->reg_to_temp
[i
]));
1640 static void check_regs(TCGContext
*s
)
1647 for (reg
= 0; reg
< TCG_TARGET_NB_REGS
; reg
++) {
1648 ts
= s
->reg_to_temp
[reg
];
1650 if (ts
->val_type
!= TEMP_VAL_REG
|| ts
->reg
!= reg
) {
1651 printf("Inconsistency for register %s:\n",
1652 tcg_target_reg_names
[reg
]);
1657 for (k
= 0; k
< s
->nb_temps
; k
++) {
1659 if (ts
->val_type
== TEMP_VAL_REG
&& !ts
->fixed_reg
1660 && s
->reg_to_temp
[ts
->reg
] != ts
) {
1661 printf("Inconsistency for temp %s:\n",
1662 tcg_get_arg_str_ptr(s
, buf
, sizeof(buf
), ts
));
1664 printf("reg state:\n");
1672 static void temp_allocate_frame(TCGContext
*s
, int temp
)
1675 ts
= &s
->temps
[temp
];
1676 #if !(defined(__sparc__) && TCG_TARGET_REG_BITS == 64)
1677 /* Sparc64 stack is accessed with offset of 2047 */
1678 s
->current_frame_offset
= (s
->current_frame_offset
+
1679 (tcg_target_long
)sizeof(tcg_target_long
) - 1) &
1680 ~(sizeof(tcg_target_long
) - 1);
1682 if (s
->current_frame_offset
+ (tcg_target_long
)sizeof(tcg_target_long
) >
1686 ts
->mem_offset
= s
->current_frame_offset
;
1687 ts
->mem_base
= s
->frame_temp
;
1688 ts
->mem_allocated
= 1;
1689 s
->current_frame_offset
+= sizeof(tcg_target_long
);
1692 static void temp_load(TCGContext
*, TCGTemp
*, TCGRegSet
, TCGRegSet
);
1694 /* Mark a temporary as free or dead. If 'free_or_dead' is negative,
1695 mark it free; otherwise mark it dead. */
1696 static void temp_free_or_dead(TCGContext
*s
, TCGTemp
*ts
, int free_or_dead
)
1698 if (ts
->fixed_reg
) {
1701 if (ts
->val_type
== TEMP_VAL_REG
) {
1702 s
->reg_to_temp
[ts
->reg
] = NULL
;
1704 ts
->val_type
= (free_or_dead
< 0
1706 || temp_idx(s
, ts
) < s
->nb_globals
1707 ? TEMP_VAL_MEM
: TEMP_VAL_DEAD
);
1710 /* Mark a temporary as dead. */
1711 static inline void temp_dead(TCGContext
*s
, TCGTemp
*ts
)
1713 temp_free_or_dead(s
, ts
, 1);
1716 /* Sync a temporary to memory. 'allocated_regs' is used in case a temporary
1717 registers needs to be allocated to store a constant. If 'free_or_dead'
1718 is non-zero, subsequently release the temporary; if it is positive, the
1719 temp is dead; if it is negative, the temp is free. */
1720 static void temp_sync(TCGContext
*s
, TCGTemp
*ts
,
1721 TCGRegSet allocated_regs
, int free_or_dead
)
1723 if (ts
->fixed_reg
) {
1726 if (!ts
->mem_coherent
) {
1727 if (!ts
->mem_allocated
) {
1728 temp_allocate_frame(s
, temp_idx(s
, ts
));
1730 if (ts
->indirect_reg
) {
1731 if (ts
->val_type
== TEMP_VAL_REG
) {
1732 tcg_regset_set_reg(allocated_regs
, ts
->reg
);
1734 temp_load(s
, ts
->mem_base
,
1735 tcg_target_available_regs
[TCG_TYPE_PTR
],
1738 switch (ts
->val_type
) {
1739 case TEMP_VAL_CONST
:
1740 /* If we're going to free the temp immediately, then we won't
1741 require it later in a register, so attempt to store the
1742 constant to memory directly. */
1744 && tcg_out_sti(s
, ts
->type
, ts
->val
,
1745 ts
->mem_base
->reg
, ts
->mem_offset
)) {
1748 temp_load(s
, ts
, tcg_target_available_regs
[ts
->type
],
1753 tcg_out_st(s
, ts
->type
, ts
->reg
,
1754 ts
->mem_base
->reg
, ts
->mem_offset
);
1764 ts
->mem_coherent
= 1;
1767 temp_free_or_dead(s
, ts
, free_or_dead
);
1771 /* free register 'reg' by spilling the corresponding temporary if necessary */
1772 static void tcg_reg_free(TCGContext
*s
, TCGReg reg
, TCGRegSet allocated_regs
)
1774 TCGTemp
*ts
= s
->reg_to_temp
[reg
];
1776 temp_sync(s
, ts
, allocated_regs
, -1);
1780 /* Allocate a register belonging to reg1 & ~reg2 */
1781 static TCGReg
tcg_reg_alloc(TCGContext
*s
, TCGRegSet desired_regs
,
1782 TCGRegSet allocated_regs
, bool rev
)
1784 int i
, n
= ARRAY_SIZE(tcg_target_reg_alloc_order
);
1789 tcg_regset_andnot(reg_ct
, desired_regs
, allocated_regs
);
1790 order
= rev
? indirect_reg_alloc_order
: tcg_target_reg_alloc_order
;
1792 /* first try free registers */
1793 for(i
= 0; i
< n
; i
++) {
1795 if (tcg_regset_test_reg(reg_ct
, reg
) && s
->reg_to_temp
[reg
] == NULL
)
1799 /* XXX: do better spill choice */
1800 for(i
= 0; i
< n
; i
++) {
1802 if (tcg_regset_test_reg(reg_ct
, reg
)) {
1803 tcg_reg_free(s
, reg
, allocated_regs
);
1811 /* Make sure the temporary is in a register. If needed, allocate the register
1812 from DESIRED while avoiding ALLOCATED. */
1813 static void temp_load(TCGContext
*s
, TCGTemp
*ts
, TCGRegSet desired_regs
,
1814 TCGRegSet allocated_regs
)
1818 switch (ts
->val_type
) {
1821 case TEMP_VAL_CONST
:
1822 reg
= tcg_reg_alloc(s
, desired_regs
, allocated_regs
, ts
->indirect_base
);
1823 tcg_out_movi(s
, ts
->type
, reg
, ts
->val
);
1824 ts
->mem_coherent
= 0;
1827 reg
= tcg_reg_alloc(s
, desired_regs
, allocated_regs
, ts
->indirect_base
);
1828 if (ts
->indirect_reg
) {
1829 tcg_regset_set_reg(allocated_regs
, reg
);
1830 temp_load(s
, ts
->mem_base
,
1831 tcg_target_available_regs
[TCG_TYPE_PTR
],
1834 tcg_out_ld(s
, ts
->type
, reg
, ts
->mem_base
->reg
, ts
->mem_offset
);
1835 ts
->mem_coherent
= 1;
1842 ts
->val_type
= TEMP_VAL_REG
;
1843 s
->reg_to_temp
[reg
] = ts
;
1846 /* Save a temporary to memory. 'allocated_regs' is used in case a
1847 temporary registers needs to be allocated to store a constant. */
1848 static void temp_save(TCGContext
*s
, TCGTemp
*ts
, TCGRegSet allocated_regs
)
1850 #ifdef USE_LIVENESS_ANALYSIS
1851 /* ??? Liveness does not yet incorporate indirect bases. */
1852 if (!ts
->indirect_base
) {
1853 /* The liveness analysis already ensures that globals are back
1854 in memory. Keep an tcg_debug_assert for safety. */
1855 tcg_debug_assert(ts
->val_type
== TEMP_VAL_MEM
|| ts
->fixed_reg
);
1859 temp_sync(s
, ts
, allocated_regs
, 1);
1862 /* save globals to their canonical location and assume they can be
1863 modified be the following code. 'allocated_regs' is used in case a
1864 temporary registers needs to be allocated to store a constant. */
1865 static void save_globals(TCGContext
*s
, TCGRegSet allocated_regs
)
1869 for (i
= 0; i
< s
->nb_globals
; i
++) {
1870 temp_save(s
, &s
->temps
[i
], allocated_regs
);
1874 /* sync globals to their canonical location and assume they can be
1875 read by the following code. 'allocated_regs' is used in case a
1876 temporary registers needs to be allocated to store a constant. */
1877 static void sync_globals(TCGContext
*s
, TCGRegSet allocated_regs
)
1881 for (i
= 0; i
< s
->nb_globals
; i
++) {
1882 TCGTemp
*ts
= &s
->temps
[i
];
1883 #ifdef USE_LIVENESS_ANALYSIS
1884 /* ??? Liveness does not yet incorporate indirect bases. */
1885 if (!ts
->indirect_base
) {
1886 tcg_debug_assert(ts
->val_type
!= TEMP_VAL_REG
1888 || ts
->mem_coherent
);
1892 temp_sync(s
, ts
, allocated_regs
, 0);
1896 /* at the end of a basic block, we assume all temporaries are dead and
1897 all globals are stored at their canonical location. */
1898 static void tcg_reg_alloc_bb_end(TCGContext
*s
, TCGRegSet allocated_regs
)
1902 for (i
= s
->nb_globals
; i
< s
->nb_temps
; i
++) {
1903 TCGTemp
*ts
= &s
->temps
[i
];
1904 if (ts
->temp_local
) {
1905 temp_save(s
, ts
, allocated_regs
);
1907 #ifdef USE_LIVENESS_ANALYSIS
1908 /* ??? Liveness does not yet incorporate indirect bases. */
1909 if (!ts
->indirect_base
) {
1910 /* The liveness analysis already ensures that temps are dead.
1911 Keep an tcg_debug_assert for safety. */
1912 tcg_debug_assert(ts
->val_type
== TEMP_VAL_DEAD
);
1920 save_globals(s
, allocated_regs
);
1923 #define IS_DEAD_ARG(n) ((dead_args >> (n)) & 1)
1924 #define NEED_SYNC_ARG(n) ((sync_args >> (n)) & 1)
1926 static void tcg_reg_alloc_movi(TCGContext
*s
, const TCGArg
*args
,
1927 uint16_t dead_args
, uint8_t sync_args
)
1930 tcg_target_ulong val
;
1932 ots
= &s
->temps
[args
[0]];
1935 if (ots
->fixed_reg
) {
1936 /* For fixed registers, we do not do any constant propagation. */
1937 tcg_out_movi(s
, ots
->type
, ots
->reg
, val
);
1941 /* The movi is not explicitly generated here. */
1942 if (ots
->val_type
== TEMP_VAL_REG
) {
1943 s
->reg_to_temp
[ots
->reg
] = NULL
;
1945 ots
->val_type
= TEMP_VAL_CONST
;
1947 ots
->mem_coherent
= 0;
1948 if (NEED_SYNC_ARG(0)) {
1949 temp_sync(s
, ots
, s
->reserved_regs
, IS_DEAD_ARG(0));
1950 } else if (IS_DEAD_ARG(0)) {
1955 static void tcg_reg_alloc_mov(TCGContext
*s
, const TCGOpDef
*def
,
1956 const TCGArg
*args
, uint16_t dead_args
,
1959 TCGRegSet allocated_regs
;
1961 TCGType otype
, itype
;
1963 tcg_regset_set(allocated_regs
, s
->reserved_regs
);
1964 ots
= &s
->temps
[args
[0]];
1965 ts
= &s
->temps
[args
[1]];
1967 /* Note that otype != itype for no-op truncation. */
1971 /* If the source value is not in a register, and we're going to be
1972 forced to have it in a register in order to perform the copy,
1973 then copy the SOURCE value into its own register first. That way
1974 we don't have to reload SOURCE the next time it is used. */
1975 if (((NEED_SYNC_ARG(0) || ots
->fixed_reg
) && ts
->val_type
!= TEMP_VAL_REG
)
1976 || ts
->val_type
== TEMP_VAL_MEM
) {
1977 temp_load(s
, ts
, tcg_target_available_regs
[itype
], allocated_regs
);
1980 if (IS_DEAD_ARG(0) && !ots
->fixed_reg
) {
1981 /* mov to a non-saved dead register makes no sense (even with
1982 liveness analysis disabled). */
1983 tcg_debug_assert(NEED_SYNC_ARG(0));
1984 /* The code above should have moved the temp to a register. */
1985 tcg_debug_assert(ts
->val_type
== TEMP_VAL_REG
);
1986 if (!ots
->mem_allocated
) {
1987 temp_allocate_frame(s
, args
[0]);
1989 if (ots
->indirect_reg
) {
1990 tcg_regset_set_reg(allocated_regs
, ts
->reg
);
1991 temp_load(s
, ots
->mem_base
,
1992 tcg_target_available_regs
[TCG_TYPE_PTR
],
1995 tcg_out_st(s
, otype
, ts
->reg
, ots
->mem_base
->reg
, ots
->mem_offset
);
1996 if (IS_DEAD_ARG(1)) {
2000 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
2001 /* propagate constant */
2002 if (ots
->val_type
== TEMP_VAL_REG
) {
2003 s
->reg_to_temp
[ots
->reg
] = NULL
;
2005 ots
->val_type
= TEMP_VAL_CONST
;
2007 if (IS_DEAD_ARG(1)) {
2011 /* The code in the first if block should have moved the
2012 temp to a register. */
2013 tcg_debug_assert(ts
->val_type
== TEMP_VAL_REG
);
2014 if (IS_DEAD_ARG(1) && !ts
->fixed_reg
&& !ots
->fixed_reg
) {
2015 /* the mov can be suppressed */
2016 if (ots
->val_type
== TEMP_VAL_REG
) {
2017 s
->reg_to_temp
[ots
->reg
] = NULL
;
2022 if (ots
->val_type
!= TEMP_VAL_REG
) {
2023 /* When allocating a new register, make sure to not spill the
2025 tcg_regset_set_reg(allocated_regs
, ts
->reg
);
2026 ots
->reg
= tcg_reg_alloc(s
, tcg_target_available_regs
[otype
],
2027 allocated_regs
, ots
->indirect_base
);
2029 tcg_out_mov(s
, otype
, ots
->reg
, ts
->reg
);
2031 ots
->val_type
= TEMP_VAL_REG
;
2032 ots
->mem_coherent
= 0;
2033 s
->reg_to_temp
[ots
->reg
] = ots
;
2034 if (NEED_SYNC_ARG(0)) {
2035 temp_sync(s
, ots
, allocated_regs
, 0);
2040 static void tcg_reg_alloc_op(TCGContext
*s
,
2041 const TCGOpDef
*def
, TCGOpcode opc
,
2042 const TCGArg
*args
, uint16_t dead_args
,
2045 TCGRegSet allocated_regs
;
2046 int i
, k
, nb_iargs
, nb_oargs
;
2049 const TCGArgConstraint
*arg_ct
;
2051 TCGArg new_args
[TCG_MAX_OP_ARGS
];
2052 int const_args
[TCG_MAX_OP_ARGS
];
2054 nb_oargs
= def
->nb_oargs
;
2055 nb_iargs
= def
->nb_iargs
;
2057 /* copy constants */
2058 memcpy(new_args
+ nb_oargs
+ nb_iargs
,
2059 args
+ nb_oargs
+ nb_iargs
,
2060 sizeof(TCGArg
) * def
->nb_cargs
);
2062 /* satisfy input constraints */
2063 tcg_regset_set(allocated_regs
, s
->reserved_regs
);
2064 for(k
= 0; k
< nb_iargs
; k
++) {
2065 i
= def
->sorted_args
[nb_oargs
+ k
];
2067 arg_ct
= &def
->args_ct
[i
];
2068 ts
= &s
->temps
[arg
];
2070 if (ts
->val_type
== TEMP_VAL_CONST
2071 && tcg_target_const_match(ts
->val
, ts
->type
, arg_ct
)) {
2072 /* constant is OK for instruction */
2074 new_args
[i
] = ts
->val
;
2078 temp_load(s
, ts
, arg_ct
->u
.regs
, allocated_regs
);
2080 if (arg_ct
->ct
& TCG_CT_IALIAS
) {
2081 if (ts
->fixed_reg
) {
2082 /* if fixed register, we must allocate a new register
2083 if the alias is not the same register */
2084 if (arg
!= args
[arg_ct
->alias_index
])
2085 goto allocate_in_reg
;
2087 /* if the input is aliased to an output and if it is
2088 not dead after the instruction, we must allocate
2089 a new register and move it */
2090 if (!IS_DEAD_ARG(i
)) {
2091 goto allocate_in_reg
;
2093 /* check if the current register has already been allocated
2094 for another input aliased to an output */
2096 for (k2
= 0 ; k2
< k
; k2
++) {
2097 i2
= def
->sorted_args
[nb_oargs
+ k2
];
2098 if ((def
->args_ct
[i2
].ct
& TCG_CT_IALIAS
) &&
2099 (new_args
[i2
] == ts
->reg
)) {
2100 goto allocate_in_reg
;
2106 if (tcg_regset_test_reg(arg_ct
->u
.regs
, reg
)) {
2107 /* nothing to do : the constraint is satisfied */
2110 /* allocate a new register matching the constraint
2111 and move the temporary register into it */
2112 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
,
2114 tcg_out_mov(s
, ts
->type
, reg
, ts
->reg
);
2118 tcg_regset_set_reg(allocated_regs
, reg
);
2122 /* mark dead temporaries and free the associated registers */
2123 for (i
= nb_oargs
; i
< nb_oargs
+ nb_iargs
; i
++) {
2124 if (IS_DEAD_ARG(i
)) {
2125 temp_dead(s
, &s
->temps
[args
[i
]]);
2129 if (def
->flags
& TCG_OPF_BB_END
) {
2130 tcg_reg_alloc_bb_end(s
, allocated_regs
);
2132 if (def
->flags
& TCG_OPF_CALL_CLOBBER
) {
2133 /* XXX: permit generic clobber register list ? */
2134 for (i
= 0; i
< TCG_TARGET_NB_REGS
; i
++) {
2135 if (tcg_regset_test_reg(tcg_target_call_clobber_regs
, i
)) {
2136 tcg_reg_free(s
, i
, allocated_regs
);
2140 if (def
->flags
& TCG_OPF_SIDE_EFFECTS
) {
2141 /* sync globals if the op has side effects and might trigger
2143 sync_globals(s
, allocated_regs
);
2146 /* satisfy the output constraints */
2147 tcg_regset_set(allocated_regs
, s
->reserved_regs
);
2148 for(k
= 0; k
< nb_oargs
; k
++) {
2149 i
= def
->sorted_args
[k
];
2151 arg_ct
= &def
->args_ct
[i
];
2152 ts
= &s
->temps
[arg
];
2153 if (arg_ct
->ct
& TCG_CT_ALIAS
) {
2154 reg
= new_args
[arg_ct
->alias_index
];
2156 /* if fixed register, we try to use it */
2158 if (ts
->fixed_reg
&&
2159 tcg_regset_test_reg(arg_ct
->u
.regs
, reg
)) {
2162 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
,
2165 tcg_regset_set_reg(allocated_regs
, reg
);
2166 /* if a fixed register is used, then a move will be done afterwards */
2167 if (!ts
->fixed_reg
) {
2168 if (ts
->val_type
== TEMP_VAL_REG
) {
2169 s
->reg_to_temp
[ts
->reg
] = NULL
;
2171 ts
->val_type
= TEMP_VAL_REG
;
2173 /* temp value is modified, so the value kept in memory is
2174 potentially not the same */
2175 ts
->mem_coherent
= 0;
2176 s
->reg_to_temp
[reg
] = ts
;
2183 /* emit instruction */
2184 tcg_out_op(s
, opc
, new_args
, const_args
);
2186 /* move the outputs in the correct register if needed */
2187 for(i
= 0; i
< nb_oargs
; i
++) {
2188 ts
= &s
->temps
[args
[i
]];
2190 if (ts
->fixed_reg
&& ts
->reg
!= reg
) {
2191 tcg_out_mov(s
, ts
->type
, ts
->reg
, reg
);
2193 if (NEED_SYNC_ARG(i
)) {
2194 temp_sync(s
, ts
, allocated_regs
, IS_DEAD_ARG(i
));
2195 } else if (IS_DEAD_ARG(i
)) {
2201 #ifdef TCG_TARGET_STACK_GROWSUP
2202 #define STACK_DIR(x) (-(x))
2204 #define STACK_DIR(x) (x)
2207 static void tcg_reg_alloc_call(TCGContext
*s
, int nb_oargs
, int nb_iargs
,
2208 const TCGArg
* const args
, uint16_t dead_args
,
2211 int flags
, nb_regs
, i
;
2215 intptr_t stack_offset
;
2216 size_t call_stack_size
;
2217 tcg_insn_unit
*func_addr
;
2219 TCGRegSet allocated_regs
;
2221 func_addr
= (tcg_insn_unit
*)(intptr_t)args
[nb_oargs
+ nb_iargs
];
2222 flags
= args
[nb_oargs
+ nb_iargs
+ 1];
2224 nb_regs
= ARRAY_SIZE(tcg_target_call_iarg_regs
);
2225 if (nb_regs
> nb_iargs
) {
2229 /* assign stack slots first */
2230 call_stack_size
= (nb_iargs
- nb_regs
) * sizeof(tcg_target_long
);
2231 call_stack_size
= (call_stack_size
+ TCG_TARGET_STACK_ALIGN
- 1) &
2232 ~(TCG_TARGET_STACK_ALIGN
- 1);
2233 allocate_args
= (call_stack_size
> TCG_STATIC_CALL_ARGS_SIZE
);
2234 if (allocate_args
) {
2235 /* XXX: if more than TCG_STATIC_CALL_ARGS_SIZE is needed,
2236 preallocate call stack */
2240 stack_offset
= TCG_TARGET_CALL_STACK_OFFSET
;
2241 for(i
= nb_regs
; i
< nb_iargs
; i
++) {
2242 arg
= args
[nb_oargs
+ i
];
2243 #ifdef TCG_TARGET_STACK_GROWSUP
2244 stack_offset
-= sizeof(tcg_target_long
);
2246 if (arg
!= TCG_CALL_DUMMY_ARG
) {
2247 ts
= &s
->temps
[arg
];
2248 temp_load(s
, ts
, tcg_target_available_regs
[ts
->type
],
2250 tcg_out_st(s
, ts
->type
, ts
->reg
, TCG_REG_CALL_STACK
, stack_offset
);
2252 #ifndef TCG_TARGET_STACK_GROWSUP
2253 stack_offset
+= sizeof(tcg_target_long
);
2257 /* assign input registers */
2258 tcg_regset_set(allocated_regs
, s
->reserved_regs
);
2259 for(i
= 0; i
< nb_regs
; i
++) {
2260 arg
= args
[nb_oargs
+ i
];
2261 if (arg
!= TCG_CALL_DUMMY_ARG
) {
2262 ts
= &s
->temps
[arg
];
2263 reg
= tcg_target_call_iarg_regs
[i
];
2264 tcg_reg_free(s
, reg
, allocated_regs
);
2266 if (ts
->val_type
== TEMP_VAL_REG
) {
2267 if (ts
->reg
!= reg
) {
2268 tcg_out_mov(s
, ts
->type
, reg
, ts
->reg
);
2273 tcg_regset_clear(arg_set
);
2274 tcg_regset_set_reg(arg_set
, reg
);
2275 temp_load(s
, ts
, arg_set
, allocated_regs
);
2278 tcg_regset_set_reg(allocated_regs
, reg
);
2282 /* mark dead temporaries and free the associated registers */
2283 for(i
= nb_oargs
; i
< nb_iargs
+ nb_oargs
; i
++) {
2284 if (IS_DEAD_ARG(i
)) {
2285 temp_dead(s
, &s
->temps
[args
[i
]]);
2289 /* clobber call registers */
2290 for (i
= 0; i
< TCG_TARGET_NB_REGS
; i
++) {
2291 if (tcg_regset_test_reg(tcg_target_call_clobber_regs
, i
)) {
2292 tcg_reg_free(s
, i
, allocated_regs
);
2296 /* Save globals if they might be written by the helper, sync them if
2297 they might be read. */
2298 if (flags
& TCG_CALL_NO_READ_GLOBALS
) {
2300 } else if (flags
& TCG_CALL_NO_WRITE_GLOBALS
) {
2301 sync_globals(s
, allocated_regs
);
2303 save_globals(s
, allocated_regs
);
2306 tcg_out_call(s
, func_addr
);
2308 /* assign output registers and emit moves if needed */
2309 for(i
= 0; i
< nb_oargs
; i
++) {
2311 ts
= &s
->temps
[arg
];
2312 reg
= tcg_target_call_oarg_regs
[i
];
2313 tcg_debug_assert(s
->reg_to_temp
[reg
] == NULL
);
2315 if (ts
->fixed_reg
) {
2316 if (ts
->reg
!= reg
) {
2317 tcg_out_mov(s
, ts
->type
, ts
->reg
, reg
);
2320 if (ts
->val_type
== TEMP_VAL_REG
) {
2321 s
->reg_to_temp
[ts
->reg
] = NULL
;
2323 ts
->val_type
= TEMP_VAL_REG
;
2325 ts
->mem_coherent
= 0;
2326 s
->reg_to_temp
[reg
] = ts
;
2327 if (NEED_SYNC_ARG(i
)) {
2328 temp_sync(s
, ts
, allocated_regs
, IS_DEAD_ARG(i
));
2329 } else if (IS_DEAD_ARG(i
)) {
2336 #ifdef CONFIG_PROFILER
2338 static int64_t tcg_table_op_count
[NB_OPS
];
2340 void tcg_dump_op_count(FILE *f
, fprintf_function cpu_fprintf
)
2344 for (i
= 0; i
< NB_OPS
; i
++) {
2345 cpu_fprintf(f
, "%s %" PRId64
"\n", tcg_op_defs
[i
].name
,
2346 tcg_table_op_count
[i
]);
2350 void tcg_dump_op_count(FILE *f
, fprintf_function cpu_fprintf
)
2352 cpu_fprintf(f
, "[TCG profiler not compiled]\n");
2357 int tcg_gen_code(TCGContext
*s
, TranslationBlock
*tb
)
2359 int i
, oi
, oi_next
, num_insns
;
2361 #ifdef CONFIG_PROFILER
2365 n
= s
->gen_last_op_idx
+ 1;
2367 if (n
> s
->op_count_max
) {
2368 s
->op_count_max
= n
;
2373 if (n
> s
->temp_count_max
) {
2374 s
->temp_count_max
= n
;
2380 if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP
)
2381 && qemu_log_in_addr_range(tb
->pc
))) {
2388 #ifdef CONFIG_PROFILER
2389 s
->opt_time
-= profile_getclock();
2392 #ifdef USE_TCG_OPTIMIZATIONS
2396 #ifdef CONFIG_PROFILER
2397 s
->opt_time
+= profile_getclock();
2398 s
->la_time
-= profile_getclock();
2401 tcg_liveness_analysis(s
);
2403 #ifdef CONFIG_PROFILER
2404 s
->la_time
+= profile_getclock();
2408 if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP_OPT
)
2409 && qemu_log_in_addr_range(tb
->pc
))) {
2410 qemu_log("OP after optimization and liveness analysis:\n");
2416 tcg_reg_alloc_start(s
);
2418 s
->code_buf
= tb
->tc_ptr
;
2419 s
->code_ptr
= tb
->tc_ptr
;
2424 for (oi
= s
->gen_first_op_idx
; oi
>= 0; oi
= oi_next
) {
2425 TCGOp
* const op
= &s
->gen_op_buf
[oi
];
2426 TCGArg
* const args
= &s
->gen_opparam_buf
[op
->args
];
2427 TCGOpcode opc
= op
->opc
;
2428 const TCGOpDef
*def
= &tcg_op_defs
[opc
];
2429 uint16_t dead_args
= s
->op_dead_args
[oi
];
2430 uint8_t sync_args
= s
->op_sync_args
[oi
];
2433 #ifdef CONFIG_PROFILER
2434 tcg_table_op_count
[opc
]++;
2438 case INDEX_op_mov_i32
:
2439 case INDEX_op_mov_i64
:
2440 tcg_reg_alloc_mov(s
, def
, args
, dead_args
, sync_args
);
2442 case INDEX_op_movi_i32
:
2443 case INDEX_op_movi_i64
:
2444 tcg_reg_alloc_movi(s
, args
, dead_args
, sync_args
);
2446 case INDEX_op_insn_start
:
2447 if (num_insns
>= 0) {
2448 s
->gen_insn_end_off
[num_insns
] = tcg_current_code_size(s
);
2451 for (i
= 0; i
< TARGET_INSN_START_WORDS
; ++i
) {
2453 #if TARGET_LONG_BITS > TCG_TARGET_REG_BITS
2454 a
= ((target_ulong
)args
[i
* 2 + 1] << 32) | args
[i
* 2];
2458 s
->gen_insn_data
[num_insns
][i
] = a
;
2461 case INDEX_op_discard
:
2462 temp_dead(s
, &s
->temps
[args
[0]]);
2464 case INDEX_op_set_label
:
2465 tcg_reg_alloc_bb_end(s
, s
->reserved_regs
);
2466 tcg_out_label(s
, arg_label(args
[0]), s
->code_ptr
);
2469 tcg_reg_alloc_call(s
, op
->callo
, op
->calli
, args
,
2470 dead_args
, sync_args
);
2473 /* Sanity check that we've not introduced any unhandled opcodes. */
2474 if (def
->flags
& TCG_OPF_NOT_PRESENT
) {
2477 /* Note: in order to speed up the code, it would be much
2478 faster to have specialized register allocator functions for
2479 some common argument patterns */
2480 tcg_reg_alloc_op(s
, def
, opc
, args
, dead_args
, sync_args
);
2483 #ifdef CONFIG_DEBUG_TCG
2486 /* Test for (pending) buffer overflow. The assumption is that any
2487 one operation beginning below the high water mark cannot overrun
2488 the buffer completely. Thus we can test for overflow after
2489 generating code without having to check during generation. */
2490 if (unlikely((void *)s
->code_ptr
> s
->code_gen_highwater
)) {
2494 tcg_debug_assert(num_insns
>= 0);
2495 s
->gen_insn_end_off
[num_insns
] = tcg_current_code_size(s
);
2497 /* Generate TB finalization at the end of block */
2498 if (!tcg_out_tb_finalize(s
)) {
2502 /* flush instruction cache */
2503 flush_icache_range((uintptr_t)s
->code_buf
, (uintptr_t)s
->code_ptr
);
2505 return tcg_current_code_size(s
);
2508 #ifdef CONFIG_PROFILER
2509 void tcg_dump_info(FILE *f
, fprintf_function cpu_fprintf
)
2511 TCGContext
*s
= &tcg_ctx
;
2512 int64_t tb_count
= s
->tb_count
;
2513 int64_t tb_div_count
= tb_count
? tb_count
: 1;
2514 int64_t tot
= s
->interm_time
+ s
->code_time
;
2516 cpu_fprintf(f
, "JIT cycles %" PRId64
" (%0.3f s at 2.4 GHz)\n",
2518 cpu_fprintf(f
, "translated TBs %" PRId64
" (aborted=%" PRId64
" %0.1f%%)\n",
2519 tb_count
, s
->tb_count1
- tb_count
,
2520 (double)(s
->tb_count1
- s
->tb_count
)
2521 / (s
->tb_count1
? s
->tb_count1
: 1) * 100.0);
2522 cpu_fprintf(f
, "avg ops/TB %0.1f max=%d\n",
2523 (double)s
->op_count
/ tb_div_count
, s
->op_count_max
);
2524 cpu_fprintf(f
, "deleted ops/TB %0.2f\n",
2525 (double)s
->del_op_count
/ tb_div_count
);
2526 cpu_fprintf(f
, "avg temps/TB %0.2f max=%d\n",
2527 (double)s
->temp_count
/ tb_div_count
, s
->temp_count_max
);
2528 cpu_fprintf(f
, "avg host code/TB %0.1f\n",
2529 (double)s
->code_out_len
/ tb_div_count
);
2530 cpu_fprintf(f
, "avg search data/TB %0.1f\n",
2531 (double)s
->search_out_len
/ tb_div_count
);
2533 cpu_fprintf(f
, "cycles/op %0.1f\n",
2534 s
->op_count
? (double)tot
/ s
->op_count
: 0);
2535 cpu_fprintf(f
, "cycles/in byte %0.1f\n",
2536 s
->code_in_len
? (double)tot
/ s
->code_in_len
: 0);
2537 cpu_fprintf(f
, "cycles/out byte %0.1f\n",
2538 s
->code_out_len
? (double)tot
/ s
->code_out_len
: 0);
2539 cpu_fprintf(f
, "cycles/search byte %0.1f\n",
2540 s
->search_out_len
? (double)tot
/ s
->search_out_len
: 0);
2544 cpu_fprintf(f
, " gen_interm time %0.1f%%\n",
2545 (double)s
->interm_time
/ tot
* 100.0);
2546 cpu_fprintf(f
, " gen_code time %0.1f%%\n",
2547 (double)s
->code_time
/ tot
* 100.0);
2548 cpu_fprintf(f
, "optim./code time %0.1f%%\n",
2549 (double)s
->opt_time
/ (s
->code_time
? s
->code_time
: 1)
2551 cpu_fprintf(f
, "liveness/code time %0.1f%%\n",
2552 (double)s
->la_time
/ (s
->code_time
? s
->code_time
: 1) * 100.0);
2553 cpu_fprintf(f
, "cpu_restore count %" PRId64
"\n",
2555 cpu_fprintf(f
, " avg cycles %0.1f\n",
2556 s
->restore_count
? (double)s
->restore_time
/ s
->restore_count
: 0);
2559 void tcg_dump_info(FILE *f
, fprintf_function cpu_fprintf
)
2561 cpu_fprintf(f
, "[TCG profiler not compiled]\n");
2565 #ifdef ELF_HOST_MACHINE
2566 /* In order to use this feature, the backend needs to do three things:
2568 (1) Define ELF_HOST_MACHINE to indicate both what value to
2569 put into the ELF image and to indicate support for the feature.
2571 (2) Define tcg_register_jit. This should create a buffer containing
2572 the contents of a .debug_frame section that describes the post-
2573 prologue unwind info for the tcg machine.
2575 (3) Call tcg_register_jit_int, with the constructed .debug_frame.
2578 /* Begin GDB interface. THE FOLLOWING MUST MATCH GDB DOCS. */
2585 struct jit_code_entry
{
2586 struct jit_code_entry
*next_entry
;
2587 struct jit_code_entry
*prev_entry
;
2588 const void *symfile_addr
;
2589 uint64_t symfile_size
;
2592 struct jit_descriptor
{
2594 uint32_t action_flag
;
2595 struct jit_code_entry
*relevant_entry
;
2596 struct jit_code_entry
*first_entry
;
2599 void __jit_debug_register_code(void) __attribute__((noinline
));
2600 void __jit_debug_register_code(void)
2605 /* Must statically initialize the version, because GDB may check
2606 the version before we can set it. */
2607 struct jit_descriptor __jit_debug_descriptor
= { 1, 0, 0, 0 };
2609 /* End GDB interface. */
2611 static int find_string(const char *strtab
, const char *str
)
2613 const char *p
= strtab
+ 1;
2616 if (strcmp(p
, str
) == 0) {
2623 static void tcg_register_jit_int(void *buf_ptr
, size_t buf_size
,
2624 const void *debug_frame
,
2625 size_t debug_frame_size
)
2627 struct __attribute__((packed
)) DebugInfo
{
2634 uintptr_t cu_low_pc
;
2635 uintptr_t cu_high_pc
;
2638 uintptr_t fn_low_pc
;
2639 uintptr_t fn_high_pc
;
2648 struct DebugInfo di
;
2653 struct ElfImage
*img
;
2655 static const struct ElfImage img_template
= {
2657 .e_ident
[EI_MAG0
] = ELFMAG0
,
2658 .e_ident
[EI_MAG1
] = ELFMAG1
,
2659 .e_ident
[EI_MAG2
] = ELFMAG2
,
2660 .e_ident
[EI_MAG3
] = ELFMAG3
,
2661 .e_ident
[EI_CLASS
] = ELF_CLASS
,
2662 .e_ident
[EI_DATA
] = ELF_DATA
,
2663 .e_ident
[EI_VERSION
] = EV_CURRENT
,
2665 .e_machine
= ELF_HOST_MACHINE
,
2666 .e_version
= EV_CURRENT
,
2667 .e_phoff
= offsetof(struct ElfImage
, phdr
),
2668 .e_shoff
= offsetof(struct ElfImage
, shdr
),
2669 .e_ehsize
= sizeof(ElfW(Shdr
)),
2670 .e_phentsize
= sizeof(ElfW(Phdr
)),
2672 .e_shentsize
= sizeof(ElfW(Shdr
)),
2673 .e_shnum
= ARRAY_SIZE(img
->shdr
),
2674 .e_shstrndx
= ARRAY_SIZE(img
->shdr
) - 1,
2675 #ifdef ELF_HOST_FLAGS
2676 .e_flags
= ELF_HOST_FLAGS
,
2679 .e_ident
[EI_OSABI
] = ELF_OSABI
,
2687 [0] = { .sh_type
= SHT_NULL
},
2688 /* Trick: The contents of code_gen_buffer are not present in
2689 this fake ELF file; that got allocated elsewhere. Therefore
2690 we mark .text as SHT_NOBITS (similar to .bss) so that readers
2691 will not look for contents. We can record any address. */
2693 .sh_type
= SHT_NOBITS
,
2694 .sh_flags
= SHF_EXECINSTR
| SHF_ALLOC
,
2696 [2] = { /* .debug_info */
2697 .sh_type
= SHT_PROGBITS
,
2698 .sh_offset
= offsetof(struct ElfImage
, di
),
2699 .sh_size
= sizeof(struct DebugInfo
),
2701 [3] = { /* .debug_abbrev */
2702 .sh_type
= SHT_PROGBITS
,
2703 .sh_offset
= offsetof(struct ElfImage
, da
),
2704 .sh_size
= sizeof(img
->da
),
2706 [4] = { /* .debug_frame */
2707 .sh_type
= SHT_PROGBITS
,
2708 .sh_offset
= sizeof(struct ElfImage
),
2710 [5] = { /* .symtab */
2711 .sh_type
= SHT_SYMTAB
,
2712 .sh_offset
= offsetof(struct ElfImage
, sym
),
2713 .sh_size
= sizeof(img
->sym
),
2715 .sh_link
= ARRAY_SIZE(img
->shdr
) - 1,
2716 .sh_entsize
= sizeof(ElfW(Sym
)),
2718 [6] = { /* .strtab */
2719 .sh_type
= SHT_STRTAB
,
2720 .sh_offset
= offsetof(struct ElfImage
, str
),
2721 .sh_size
= sizeof(img
->str
),
2725 [1] = { /* code_gen_buffer */
2726 .st_info
= ELF_ST_INFO(STB_GLOBAL
, STT_FUNC
),
2731 .len
= sizeof(struct DebugInfo
) - 4,
2733 .ptr_size
= sizeof(void *),
2735 .cu_lang
= 0x8001, /* DW_LANG_Mips_Assembler */
2737 .fn_name
= "code_gen_buffer"
2740 1, /* abbrev number (the cu) */
2741 0x11, 1, /* DW_TAG_compile_unit, has children */
2742 0x13, 0x5, /* DW_AT_language, DW_FORM_data2 */
2743 0x11, 0x1, /* DW_AT_low_pc, DW_FORM_addr */
2744 0x12, 0x1, /* DW_AT_high_pc, DW_FORM_addr */
2745 0, 0, /* end of abbrev */
2746 2, /* abbrev number (the fn) */
2747 0x2e, 0, /* DW_TAG_subprogram, no children */
2748 0x3, 0x8, /* DW_AT_name, DW_FORM_string */
2749 0x11, 0x1, /* DW_AT_low_pc, DW_FORM_addr */
2750 0x12, 0x1, /* DW_AT_high_pc, DW_FORM_addr */
2751 0, 0, /* end of abbrev */
2752 0 /* no more abbrev */
2754 .str
= "\0" ".text\0" ".debug_info\0" ".debug_abbrev\0"
2755 ".debug_frame\0" ".symtab\0" ".strtab\0" "code_gen_buffer",
2758 /* We only need a single jit entry; statically allocate it. */
2759 static struct jit_code_entry one_entry
;
2761 uintptr_t buf
= (uintptr_t)buf_ptr
;
2762 size_t img_size
= sizeof(struct ElfImage
) + debug_frame_size
;
2763 DebugFrameHeader
*dfh
;
2765 img
= g_malloc(img_size
);
2766 *img
= img_template
;
2768 img
->phdr
.p_vaddr
= buf
;
2769 img
->phdr
.p_paddr
= buf
;
2770 img
->phdr
.p_memsz
= buf_size
;
2772 img
->shdr
[1].sh_name
= find_string(img
->str
, ".text");
2773 img
->shdr
[1].sh_addr
= buf
;
2774 img
->shdr
[1].sh_size
= buf_size
;
2776 img
->shdr
[2].sh_name
= find_string(img
->str
, ".debug_info");
2777 img
->shdr
[3].sh_name
= find_string(img
->str
, ".debug_abbrev");
2779 img
->shdr
[4].sh_name
= find_string(img
->str
, ".debug_frame");
2780 img
->shdr
[4].sh_size
= debug_frame_size
;
2782 img
->shdr
[5].sh_name
= find_string(img
->str
, ".symtab");
2783 img
->shdr
[6].sh_name
= find_string(img
->str
, ".strtab");
2785 img
->sym
[1].st_name
= find_string(img
->str
, "code_gen_buffer");
2786 img
->sym
[1].st_value
= buf
;
2787 img
->sym
[1].st_size
= buf_size
;
2789 img
->di
.cu_low_pc
= buf
;
2790 img
->di
.cu_high_pc
= buf
+ buf_size
;
2791 img
->di
.fn_low_pc
= buf
;
2792 img
->di
.fn_high_pc
= buf
+ buf_size
;
2794 dfh
= (DebugFrameHeader
*)(img
+ 1);
2795 memcpy(dfh
, debug_frame
, debug_frame_size
);
2796 dfh
->fde
.func_start
= buf
;
2797 dfh
->fde
.func_len
= buf_size
;
2800 /* Enable this block to be able to debug the ELF image file creation.
2801 One can use readelf, objdump, or other inspection utilities. */
2803 FILE *f
= fopen("/tmp/qemu.jit", "w+b");
2805 if (fwrite(img
, img_size
, 1, f
) != img_size
) {
2806 /* Avoid stupid unused return value warning for fwrite. */
2813 one_entry
.symfile_addr
= img
;
2814 one_entry
.symfile_size
= img_size
;
2816 __jit_debug_descriptor
.action_flag
= JIT_REGISTER_FN
;
2817 __jit_debug_descriptor
.relevant_entry
= &one_entry
;
2818 __jit_debug_descriptor
.first_entry
= &one_entry
;
2819 __jit_debug_register_code();
2822 /* No support for the feature. Provide the entry point expected by exec.c,
2823 and implement the internal function we declared earlier. */
2825 static void tcg_register_jit_int(void *buf
, size_t size
,
2826 const void *debug_frame
,
2827 size_t debug_frame_size
)
2831 void tcg_register_jit(void *buf
, size_t buf_size
)
2834 #endif /* ELF_HOST_MACHINE */