4 * Copyright (c) 2003 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
27 #define NO_CPU_IO_DEFS
32 #include "qemu-timer.h"
34 /* code generation context */
37 uint16_t gen_opc_buf
[OPC_BUF_SIZE
];
38 TCGArg gen_opparam_buf
[OPPARAM_BUF_SIZE
];
40 target_ulong gen_opc_pc
[OPC_BUF_SIZE
];
41 uint16_t gen_opc_icount
[OPC_BUF_SIZE
];
42 uint8_t gen_opc_instr_start
[OPC_BUF_SIZE
];
44 /* XXX: suppress that */
45 unsigned long code_gen_max_block_size(void)
47 static unsigned long max
;
50 max
= TCG_MAX_OP_SIZE
;
51 #define DEF(s, n, copy_size) max = copy_size > max? copy_size : max;
60 void cpu_gen_init(void)
62 tcg_context_init(&tcg_ctx
);
63 tcg_set_frame(&tcg_ctx
, TCG_AREG0
, offsetof(CPUState
, temp_buf
),
64 CPU_TEMP_BUF_NLONGS
* sizeof(long));
67 /* return non zero if the very first instruction is invalid so that
68 the virtual CPU can trigger an exception.
70 '*gen_code_size_ptr' contains the size of the generated code (host
73 int cpu_gen_code(CPUState
*env
, TranslationBlock
*tb
, int *gen_code_size_ptr
)
75 TCGContext
*s
= &tcg_ctx
;
76 uint8_t *gen_code_buf
;
78 #ifdef CONFIG_PROFILER
82 #ifdef CONFIG_PROFILER
83 s
->tb_count1
++; /* includes aborted translations because of
85 ti
= profile_getclock();
89 gen_intermediate_code(env
, tb
);
91 /* generate machine code */
92 gen_code_buf
= tb
->tc_ptr
;
93 tb
->tb_next_offset
[0] = 0xffff;
94 tb
->tb_next_offset
[1] = 0xffff;
95 s
->tb_next_offset
= tb
->tb_next_offset
;
96 #ifdef USE_DIRECT_JUMP
97 s
->tb_jmp_offset
= tb
->tb_jmp_offset
;
100 s
->tb_jmp_offset
= NULL
;
101 s
->tb_next
= tb
->tb_next
;
104 #ifdef CONFIG_PROFILER
106 s
->interm_time
+= profile_getclock() - ti
;
107 s
->code_time
-= profile_getclock();
109 gen_code_size
= tcg_gen_code(s
, gen_code_buf
);
110 *gen_code_size_ptr
= gen_code_size
;
111 #ifdef CONFIG_PROFILER
112 s
->code_time
+= profile_getclock();
113 s
->code_in_len
+= tb
->size
;
114 s
->code_out_len
+= gen_code_size
;
118 if (qemu_loglevel_mask(CPU_LOG_TB_OUT_ASM
)) {
119 qemu_log("OUT: [size=%d]\n", *gen_code_size_ptr
);
120 log_disas(tb
->tc_ptr
, *gen_code_size_ptr
);
128 /* The cpu state corresponding to 'searched_pc' is restored.
130 int cpu_restore_state(TranslationBlock
*tb
,
131 CPUState
*env
, unsigned long searched_pc
,
134 TCGContext
*s
= &tcg_ctx
;
136 unsigned long tc_ptr
;
137 #ifdef CONFIG_PROFILER
141 #ifdef CONFIG_PROFILER
142 ti
= profile_getclock();
146 gen_intermediate_code_pc(env
, tb
);
149 /* Reset the cycle counter to the start of the block. */
150 env
->icount_decr
.u16
.low
+= tb
->icount
;
151 /* Clear the IO flag. */
155 /* find opc index corresponding to search_pc */
156 tc_ptr
= (unsigned long)tb
->tc_ptr
;
157 if (searched_pc
< tc_ptr
)
160 s
->tb_next_offset
= tb
->tb_next_offset
;
161 #ifdef USE_DIRECT_JUMP
162 s
->tb_jmp_offset
= tb
->tb_jmp_offset
;
165 s
->tb_jmp_offset
= NULL
;
166 s
->tb_next
= tb
->tb_next
;
168 j
= tcg_gen_code_search_pc(s
, (uint8_t *)tc_ptr
, searched_pc
- tc_ptr
);
171 /* now find start of instruction before */
172 while (gen_opc_instr_start
[j
] == 0)
174 env
->icount_decr
.u16
.low
-= gen_opc_icount
[j
];
176 gen_pc_load(env
, tb
, searched_pc
, j
, puc
);
178 #ifdef CONFIG_PROFILER
179 s
->restore_time
+= profile_getclock() - ti
;