| blob | 7df81c1f22c9599c9a5b47312f53136e70c54370 |
1 #
2 # OpenRISC instruction decode definitions.
3 #
4 # Copyright (c) 2018 Richard Henderson <rth@twiddle.net>
5 #
6 # This library is free software; you can redistribute it and/or
7 # modify it under the terms of the GNU Lesser General Public
8 # License as published by the Free Software Foundation; either
9 # version 2.1 of the License, or (at your option) any later version.
10 #
11 # This library is distributed in the hope that it will be useful,
12 # but WITHOUT ANY WARRANTY; without even the implied warranty of
13 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 # Lesser General Public License for more details.
15 #
16 # You should have received a copy of the GNU Lesser General Public
17 # License along with this library; if not, see <http://www.gnu.org/licenses/>.
18 #
20 &dab d a b
21 &da d a
22 &ab a b
23 &dal d a l
24 &ai a i
26 ####
27 # System Instructions
28 ####
30 l_sys 001000 0000000000 k:16
31 l_trap 001000 0100000000 k:16
32 l_msync 001000 1000000000 00000000 00000000
33 l_psync 001000 1010000000 00000000 00000000
34 l_csync 001000 1100000000 00000000 00000000
36 l_rfe 001001 ----- ----- -------- --------
38 ####
39 # Branch Instructions
40 ####
42 l_j 000000 n:s26
43 l_jal 000001 n:s26
44 l_bnf 000011 n:s26
45 l_bf 000100 n:s26
47 l_jr 010001 ---------- b:5 -----------
48 l_jalr 010010 ---------- b:5 -----------
50 ####
51 # Memory Instructions
52 ####
54 &load d a i
55 @load ...... d:5 a:5 i:s16 &load
57 %store_i 21:s5 0:11
58 &store a b i
59 @store ...... ..... a:5 b:5 ........... &store i=%store_i
61 l_lwa 011011 ..... ..... ........ ........ @load
62 l_lwz 100001 ..... ..... ........ ........ @load
63 l_lws 100010 ..... ..... ........ ........ @load
64 l_lbz 100011 ..... ..... ........ ........ @load
65 l_lbs 100100 ..... ..... ........ ........ @load
66 l_lhz 100101 ..... ..... ........ ........ @load
67 l_lhs 100110 ..... ..... ........ ........ @load
69 l_swa 110011 ..... ..... ..... ........... @store
70 l_sw 110101 ..... ..... ..... ........... @store
71 l_sb 110110 ..... ..... ..... ........... @store
72 l_sh 110111 ..... ..... ..... ........... @store
74 ####
75 # Immediate Operand Instructions
76 ####
78 %mtspr_k 21:5 0:11
80 &rri d a i
81 &rrk d a k
82 @rri ...... d:5 a:5 i:s16 &rri
83 @rrk ...... d:5 a:5 k:16 &rrk
85 l_nop 000101 01--- ----- k:16
87 l_addi 100111 ..... ..... ........ ........ @rri
88 l_addic 101000 ..... ..... ........ ........ @rri
89 l_andi 101001 ..... ..... ........ ........ @rrk
90 l_ori 101010 ..... ..... ........ ........ @rrk
91 l_xori 101011 ..... ..... ........ ........ @rri
92 l_muli 101100 ..... ..... ........ ........ @rri
94 l_mfspr 101101 ..... ..... ........ ........ @rrk
95 l_mtspr 110000 ..... a:5 b:5 ........... k=%mtspr_k
97 l_maci 010011 ----- a:5 i:s16
99 l_movhi 000110 d:5 ----0 k:16
100 l_macrc 000110 d:5 ----1 00000000 00000000
102 ####
103 # Arithmetic Instructions
104 ####
106 l_exths 111000 d:5 a:5 ----- - 0000 -- 1100
107 l_extbs 111000 d:5 a:5 ----- - 0001 -- 1100
108 l_exthz 111000 d:5 a:5 ----- - 0010 -- 1100
109 l_extbz 111000 d:5 a:5 ----- - 0011 -- 1100
111 l_add 111000 d:5 a:5 b:5 - 00 ---- 0000
112 l_addc 111000 d:5 a:5 b:5 - 00 ---- 0001
113 l_sub 111000 d:5 a:5 b:5 - 00 ---- 0010
114 l_and 111000 d:5 a:5 b:5 - 00 ---- 0011
115 l_or 111000 d:5 a:5 b:5 - 00 ---- 0100
116 l_xor 111000 d:5 a:5 b:5 - 00 ---- 0101
117 l_cmov 111000 d:5 a:5 b:5 - 00 ---- 1110
118 l_ff1 111000 d:5 a:5 ----- - 00 ---- 1111
119 l_fl1 111000 d:5 a:5 ----- - 01 ---- 1111
121 l_sll 111000 d:5 a:5 b:5 - 0000 -- 1000
122 l_srl 111000 d:5 a:5 b:5 - 0001 -- 1000
123 l_sra 111000 d:5 a:5 b:5 - 0010 -- 1000
124 l_ror 111000 d:5 a:5 b:5 - 0011 -- 1000
126 l_mul 111000 d:5 a:5 b:5 - 11 ---- 0110
127 l_mulu 111000 d:5 a:5 b:5 - 11 ---- 1011
128 l_div 111000 d:5 a:5 b:5 - 11 ---- 1001
129 l_divu 111000 d:5 a:5 b:5 - 11 ---- 1010
131 l_muld 111000 ----- a:5 b:5 - 11 ---- 0111
132 l_muldu 111000 ----- a:5 b:5 - 11 ---- 1100
134 l_mac 110001 ----- a:5 b:5 ------- 0001
135 l_macu 110001 ----- a:5 b:5 ------- 0011
136 l_msb 110001 ----- a:5 b:5 ------- 0010
137 l_msbu 110001 ----- a:5 b:5 ------- 0100
139 l_slli 101110 d:5 a:5 -------- 00 l:6
140 l_srli 101110 d:5 a:5 -------- 01 l:6
141 l_srai 101110 d:5 a:5 -------- 10 l:6
142 l_rori 101110 d:5 a:5 -------- 11 l:6
144 ####
145 # Compare Instructions
146 ####
148 l_sfeq 111001 00000 a:5 b:5 -----------
149 l_sfne 111001 00001 a:5 b:5 -----------
150 l_sfgtu 111001 00010 a:5 b:5 -----------
151 l_sfgeu 111001 00011 a:5 b:5 -----------
152 l_sfltu 111001 00100 a:5 b:5 -----------
153 l_sfleu 111001 00101 a:5 b:5 -----------
154 l_sfgts 111001 01010 a:5 b:5 -----------
155 l_sfges 111001 01011 a:5 b:5 -----------
156 l_sflts 111001 01100 a:5 b:5 -----------
157 l_sfles 111001 01101 a:5 b:5 -----------
159 l_sfeqi 101111 00000 a:5 i:s16
160 l_sfnei 101111 00001 a:5 i:s16
161 l_sfgtui 101111 00010 a:5 i:s16
162 l_sfgeui 101111 00011 a:5 i:s16
163 l_sfltui 101111 00100 a:5 i:s16
164 l_sfleui 101111 00101 a:5 i:s16
165 l_sfgtsi 101111 01010 a:5 i:s16
166 l_sfgesi 101111 01011 a:5 i:s16
167 l_sfltsi 101111 01100 a:5 i:s16
168 l_sflesi 101111 01101 a:5 i:s16
170 ####
171 # FP Instructions
172 ####
174 lf_add_s 110010 d:5 a:5 b:5 --- 00000000
175 lf_sub_s 110010 d:5 a:5 b:5 --- 00000001
176 lf_mul_s 110010 d:5 a:5 b:5 --- 00000010
177 lf_div_s 110010 d:5 a:5 b:5 --- 00000011
178 lf_rem_s 110010 d:5 a:5 b:5 --- 00000110
179 lf_madd_s 110010 d:5 a:5 b:5 --- 00000111
181 lf_itof_s 110010 d:5 a:5 00000 --- 00000100
182 lf_ftoi_s 110010 d:5 a:5 00000 --- 00000101
184 lf_sfeq_s 110010 ----- a:5 b:5 --- 00001000
185 lf_sfne_s 110010 ----- a:5 b:5 --- 00001001
186 lf_sfgt_s 110010 ----- a:5 b:5 --- 00001010
187 lf_sfge_s 110010 ----- a:5 b:5 --- 00001011
188 lf_sflt_s 110010 ----- a:5 b:5 --- 00001100
189 lf_sfle_s 110010 ----- a:5 b:5 --- 00001101