2 * QEMU sPAPR IOMMU (TCE) code
4 * Copyright (c) 2010 David Gibson, IBM Corporation <dwg@au1.ibm.com>
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
19 #include "qemu/osdep.h"
21 #include "sysemu/kvm.h"
24 #include "sysemu/dma.h"
25 #include "exec/address-spaces.h"
28 #include "hw/ppc/spapr.h"
29 #include "hw/ppc/spapr_vio.h"
40 #define IOMMU_PAGE_SIZE(shift) (1ULL << (shift))
41 #define IOMMU_PAGE_MASK(shift) (~(IOMMU_PAGE_SIZE(shift) - 1))
43 static QLIST_HEAD(spapr_tce_tables
, sPAPRTCETable
) spapr_tce_tables
;
45 sPAPRTCETable
*spapr_tce_find_by_liobn(target_ulong liobn
)
49 if (liobn
& 0xFFFFFFFF00000000ULL
) {
50 hcall_dprintf("Request for out-of-bounds LIOBN 0x" TARGET_FMT_lx
"\n",
55 QLIST_FOREACH(tcet
, &spapr_tce_tables
, list
) {
56 if (tcet
->liobn
== (uint32_t)liobn
) {
64 static IOMMUAccessFlags
spapr_tce_iommu_access_flags(uint64_t tce
)
66 switch (tce
& SPAPR_TCE_RW
) {
73 default: /* SPAPR_TCE_RW */
78 /* Called from RCU critical section */
79 static IOMMUTLBEntry
spapr_tce_translate_iommu(MemoryRegion
*iommu
, hwaddr addr
,
82 sPAPRTCETable
*tcet
= container_of(iommu
, sPAPRTCETable
, iommu
);
85 .target_as
= &address_space_memory
,
88 .addr_mask
= ~(hwaddr
)0,
92 if ((addr
>> tcet
->page_shift
) < tcet
->nb_table
) {
93 /* Check if we are in bound */
94 hwaddr page_mask
= IOMMU_PAGE_MASK(tcet
->page_shift
);
96 tce
= tcet
->table
[addr
>> tcet
->page_shift
];
97 ret
.iova
= addr
& page_mask
;
98 ret
.translated_addr
= tce
& page_mask
;
99 ret
.addr_mask
= ~page_mask
;
100 ret
.perm
= spapr_tce_iommu_access_flags(tce
);
102 trace_spapr_iommu_xlate(tcet
->liobn
, addr
, ret
.iova
, ret
.perm
,
108 static int spapr_tce_table_post_load(void *opaque
, int version_id
)
110 sPAPRTCETable
*tcet
= SPAPR_TCE_TABLE(opaque
);
113 spapr_vio_set_bypass(tcet
->vdev
, tcet
->bypass
);
119 static const VMStateDescription vmstate_spapr_tce_table
= {
120 .name
= "spapr_iommu",
122 .minimum_version_id
= 2,
123 .post_load
= spapr_tce_table_post_load
,
124 .fields
= (VMStateField
[]) {
126 VMSTATE_UINT32_EQUAL(liobn
, sPAPRTCETable
),
127 VMSTATE_UINT32_EQUAL(nb_table
, sPAPRTCETable
),
130 VMSTATE_BOOL(bypass
, sPAPRTCETable
),
131 VMSTATE_VARRAY_UINT32(table
, sPAPRTCETable
, nb_table
, 0, vmstate_info_uint64
, uint64_t),
133 VMSTATE_END_OF_LIST()
137 static MemoryRegionIOMMUOps spapr_iommu_ops
= {
138 .translate
= spapr_tce_translate_iommu
,
141 static int spapr_tce_table_realize(DeviceState
*dev
)
143 sPAPRTCETable
*tcet
= SPAPR_TCE_TABLE(dev
);
144 uint64_t window_size
= (uint64_t)tcet
->nb_table
<< tcet
->page_shift
;
146 if (kvm_enabled() && !(window_size
>> 32)) {
147 tcet
->table
= kvmppc_create_spapr_tce(tcet
->liobn
,
154 size_t table_size
= tcet
->nb_table
* sizeof(uint64_t);
155 tcet
->table
= g_malloc0(table_size
);
158 trace_spapr_iommu_new_table(tcet
->liobn
, tcet
, tcet
->table
, tcet
->fd
);
160 memory_region_init_iommu(&tcet
->iommu
, OBJECT(dev
), &spapr_iommu_ops
,
162 (uint64_t)tcet
->nb_table
<< tcet
->page_shift
);
164 QLIST_INSERT_HEAD(&spapr_tce_tables
, tcet
, list
);
166 vmstate_register(DEVICE(tcet
), tcet
->liobn
, &vmstate_spapr_tce_table
,
172 void spapr_tce_set_need_vfio(sPAPRTCETable
*tcet
, bool need_vfio
)
174 size_t table_size
= tcet
->nb_table
* sizeof(uint64_t);
177 if (need_vfio
== tcet
->need_vfio
) {
183 /* FIXME: We don't support transition back to KVM accelerated
188 tcet
->need_vfio
= true;
191 /* Table is already in userspace, nothing to be do */
195 newtable
= g_malloc(table_size
);
196 memcpy(newtable
, tcet
->table
, table_size
);
198 kvmppc_remove_spapr_tce(tcet
->table
, tcet
->fd
, tcet
->nb_table
);
201 tcet
->table
= newtable
;
204 sPAPRTCETable
*spapr_tce_new_table(DeviceState
*owner
, uint32_t liobn
,
213 if (spapr_tce_find_by_liobn(liobn
)) {
214 fprintf(stderr
, "Attempted to create TCE table with duplicate"
215 " LIOBN 0x%x\n", liobn
);
223 tcet
= SPAPR_TCE_TABLE(object_new(TYPE_SPAPR_TCE_TABLE
));
225 tcet
->bus_offset
= bus_offset
;
226 tcet
->page_shift
= page_shift
;
227 tcet
->nb_table
= nb_table
;
228 tcet
->need_vfio
= need_vfio
;
230 snprintf(tmp
, sizeof(tmp
), "tce-table-%x", liobn
);
231 object_property_add_child(OBJECT(owner
), tmp
, OBJECT(tcet
), NULL
);
233 object_property_set_bool(OBJECT(tcet
), true, "realized", NULL
);
238 static void spapr_tce_table_unrealize(DeviceState
*dev
, Error
**errp
)
240 sPAPRTCETable
*tcet
= SPAPR_TCE_TABLE(dev
);
242 QLIST_REMOVE(tcet
, list
);
244 if (!kvm_enabled() ||
245 (kvmppc_remove_spapr_tce(tcet
->table
, tcet
->fd
,
246 tcet
->nb_table
) != 0)) {
251 MemoryRegion
*spapr_tce_get_iommu(sPAPRTCETable
*tcet
)
256 static void spapr_tce_reset(DeviceState
*dev
)
258 sPAPRTCETable
*tcet
= SPAPR_TCE_TABLE(dev
);
259 size_t table_size
= tcet
->nb_table
* sizeof(uint64_t);
261 memset(tcet
->table
, 0, table_size
);
264 static target_ulong
put_tce_emu(sPAPRTCETable
*tcet
, target_ulong ioba
,
268 hwaddr page_mask
= IOMMU_PAGE_MASK(tcet
->page_shift
);
269 unsigned long index
= (ioba
- tcet
->bus_offset
) >> tcet
->page_shift
;
271 if (index
>= tcet
->nb_table
) {
272 hcall_dprintf("spapr_vio_put_tce on out-of-bounds IOBA 0x"
273 TARGET_FMT_lx
"\n", ioba
);
277 tcet
->table
[index
] = tce
;
279 entry
.target_as
= &address_space_memory
,
280 entry
.iova
= ioba
& page_mask
;
281 entry
.translated_addr
= tce
& page_mask
;
282 entry
.addr_mask
= ~page_mask
;
283 entry
.perm
= spapr_tce_iommu_access_flags(tce
);
284 memory_region_notify_iommu(&tcet
->iommu
, entry
);
289 static target_ulong
h_put_tce_indirect(PowerPCCPU
*cpu
,
290 sPAPRMachineState
*spapr
,
291 target_ulong opcode
, target_ulong
*args
)
294 target_ulong liobn
= args
[0];
295 target_ulong ioba
= args
[1];
296 target_ulong ioba1
= ioba
;
297 target_ulong tce_list
= args
[2];
298 target_ulong npages
= args
[3];
299 target_ulong ret
= H_PARAMETER
, tce
= 0;
300 sPAPRTCETable
*tcet
= spapr_tce_find_by_liobn(liobn
);
301 CPUState
*cs
= CPU(cpu
);
302 hwaddr page_mask
, page_size
;
308 if ((npages
> 512) || (tce_list
& SPAPR_TCE_PAGE_MASK
)) {
312 page_mask
= IOMMU_PAGE_MASK(tcet
->page_shift
);
313 page_size
= IOMMU_PAGE_SIZE(tcet
->page_shift
);
316 for (i
= 0; i
< npages
; ++i
, ioba
+= page_size
) {
317 tce
= ldq_be_phys(cs
->as
, tce_list
+ i
* sizeof(target_ulong
));
319 ret
= put_tce_emu(tcet
, ioba
, tce
);
325 /* Trace last successful or the first problematic entry */
327 if (SPAPR_IS_PCI_LIOBN(liobn
)) {
328 trace_spapr_iommu_pci_indirect(liobn
, ioba1
, tce_list
, i
, tce
, ret
);
330 trace_spapr_iommu_indirect(liobn
, ioba1
, tce_list
, i
, tce
, ret
);
335 static target_ulong
h_stuff_tce(PowerPCCPU
*cpu
, sPAPRMachineState
*spapr
,
336 target_ulong opcode
, target_ulong
*args
)
339 target_ulong liobn
= args
[0];
340 target_ulong ioba
= args
[1];
341 target_ulong tce_value
= args
[2];
342 target_ulong npages
= args
[3];
343 target_ulong ret
= H_PARAMETER
;
344 sPAPRTCETable
*tcet
= spapr_tce_find_by_liobn(liobn
);
345 hwaddr page_mask
, page_size
;
351 if (npages
> tcet
->nb_table
) {
355 page_mask
= IOMMU_PAGE_MASK(tcet
->page_shift
);
356 page_size
= IOMMU_PAGE_SIZE(tcet
->page_shift
);
359 for (i
= 0; i
< npages
; ++i
, ioba
+= page_size
) {
360 ret
= put_tce_emu(tcet
, ioba
, tce_value
);
365 if (SPAPR_IS_PCI_LIOBN(liobn
)) {
366 trace_spapr_iommu_pci_stuff(liobn
, ioba
, tce_value
, npages
, ret
);
368 trace_spapr_iommu_stuff(liobn
, ioba
, tce_value
, npages
, ret
);
374 static target_ulong
h_put_tce(PowerPCCPU
*cpu
, sPAPRMachineState
*spapr
,
375 target_ulong opcode
, target_ulong
*args
)
377 target_ulong liobn
= args
[0];
378 target_ulong ioba
= args
[1];
379 target_ulong tce
= args
[2];
380 target_ulong ret
= H_PARAMETER
;
381 sPAPRTCETable
*tcet
= spapr_tce_find_by_liobn(liobn
);
384 hwaddr page_mask
= IOMMU_PAGE_MASK(tcet
->page_shift
);
388 ret
= put_tce_emu(tcet
, ioba
, tce
);
390 if (SPAPR_IS_PCI_LIOBN(liobn
)) {
391 trace_spapr_iommu_pci_put(liobn
, ioba
, tce
, ret
);
393 trace_spapr_iommu_put(liobn
, ioba
, tce
, ret
);
399 static target_ulong
get_tce_emu(sPAPRTCETable
*tcet
, target_ulong ioba
,
402 unsigned long index
= (ioba
- tcet
->bus_offset
) >> tcet
->page_shift
;
404 if (index
>= tcet
->nb_table
) {
405 hcall_dprintf("spapr_iommu_get_tce on out-of-bounds IOBA 0x"
406 TARGET_FMT_lx
"\n", ioba
);
410 *tce
= tcet
->table
[index
];
415 static target_ulong
h_get_tce(PowerPCCPU
*cpu
, sPAPRMachineState
*spapr
,
416 target_ulong opcode
, target_ulong
*args
)
418 target_ulong liobn
= args
[0];
419 target_ulong ioba
= args
[1];
420 target_ulong tce
= 0;
421 target_ulong ret
= H_PARAMETER
;
422 sPAPRTCETable
*tcet
= spapr_tce_find_by_liobn(liobn
);
425 hwaddr page_mask
= IOMMU_PAGE_MASK(tcet
->page_shift
);
429 ret
= get_tce_emu(tcet
, ioba
, &tce
);
434 if (SPAPR_IS_PCI_LIOBN(liobn
)) {
435 trace_spapr_iommu_pci_get(liobn
, ioba
, ret
, tce
);
437 trace_spapr_iommu_get(liobn
, ioba
, ret
, tce
);
443 int spapr_dma_dt(void *fdt
, int node_off
, const char *propname
,
444 uint32_t liobn
, uint64_t window
, uint32_t size
)
446 uint32_t dma_prop
[5];
449 dma_prop
[0] = cpu_to_be32(liobn
);
450 dma_prop
[1] = cpu_to_be32(window
>> 32);
451 dma_prop
[2] = cpu_to_be32(window
& 0xFFFFFFFF);
452 dma_prop
[3] = 0; /* window size is 32 bits */
453 dma_prop
[4] = cpu_to_be32(size
);
455 ret
= fdt_setprop_cell(fdt
, node_off
, "ibm,#dma-address-cells", 2);
460 ret
= fdt_setprop_cell(fdt
, node_off
, "ibm,#dma-size-cells", 2);
465 ret
= fdt_setprop(fdt
, node_off
, propname
, dma_prop
, sizeof(dma_prop
));
473 int spapr_tcet_dma_dt(void *fdt
, int node_off
, const char *propname
,
480 return spapr_dma_dt(fdt
, node_off
, propname
,
481 tcet
->liobn
, 0, tcet
->nb_table
<< tcet
->page_shift
);
484 static void spapr_tce_table_class_init(ObjectClass
*klass
, void *data
)
486 DeviceClass
*dc
= DEVICE_CLASS(klass
);
487 dc
->init
= spapr_tce_table_realize
;
488 dc
->reset
= spapr_tce_reset
;
489 dc
->unrealize
= spapr_tce_table_unrealize
;
491 QLIST_INIT(&spapr_tce_tables
);
494 spapr_register_hypercall(H_PUT_TCE
, h_put_tce
);
495 spapr_register_hypercall(H_GET_TCE
, h_get_tce
);
496 spapr_register_hypercall(H_PUT_TCE_INDIRECT
, h_put_tce_indirect
);
497 spapr_register_hypercall(H_STUFF_TCE
, h_stuff_tce
);
500 static TypeInfo spapr_tce_table_info
= {
501 .name
= TYPE_SPAPR_TCE_TABLE
,
502 .parent
= TYPE_DEVICE
,
503 .instance_size
= sizeof(sPAPRTCETable
),
504 .class_init
= spapr_tce_table_class_init
,
507 static void register_types(void)
509 type_register_static(&spapr_tce_table_info
);
512 type_init(register_types
);