?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
spapr: Fix error leak in spapr_realize_vcpu()
[qemu/ar7.git] / softmmu / memory.c
blobfa280a19f7f798dff27a2fdec82fc91a4a910ff5
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "qemu/osdep.h"
17 #include "qapi/error.h"
18 #include "cpu.h"
19 #include "exec/memory.h"
20 #include "exec/address-spaces.h"
21 #include "qapi/visitor.h"
22 #include "qemu/bitops.h"
23 #include "qemu/error-report.h"
24 #include "qemu/main-loop.h"
25 #include "qemu/qemu-print.h"
26 #include "qom/object.h"
27 #include "trace.h"
28
29 #include "exec/memory-internal.h"
30 #include "exec/ram_addr.h"
31 #include "sysemu/kvm.h"
32 #include "sysemu/runstate.h"
33 #include "sysemu/tcg.h"
34 #include "sysemu/accel.h"
35 #include "hw/boards.h"
36 #include "migration/vmstate.h"
37
38 //#define DEBUG_UNASSIGNED
39
40 static unsigned memory_region_transaction_depth;
41 static bool memory_region_update_pending;
42 static bool ioeventfd_update_pending;
43 bool global_dirty_log;
44
45 static QTAILQ_HEAD(, MemoryListener) memory_listeners
46 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
47
48 static QTAILQ_HEAD(, AddressSpace) address_spaces
49 = QTAILQ_HEAD_INITIALIZER(address_spaces);
50
51 static GHashTable *flat_views;
52
53 typedef struct AddrRange AddrRange;
54
55 /*
56 * Note that signed integers are needed for negative offsetting in aliases
57 * (large MemoryRegion::alias_offset).
58 */
59 struct AddrRange {
60 Int128 start;
61 Int128 size;
62 };
63
64 static AddrRange addrrange_make(Int128 start, Int128 size)
65 {
66 return (AddrRange) { start, size };
67 }
68
69 static bool addrrange_equal(AddrRange r1, AddrRange r2)
70 {
71 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
72 }
73
74 static Int128 addrrange_end(AddrRange r)
75 {
76 return int128_add(r.start, r.size);
77 }
78
79 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
80 {
81 int128_addto(&range.start, delta);
82 return range;
83 }
84
85 static bool addrrange_contains(AddrRange range, Int128 addr)
86 {
87 return int128_ge(addr, range.start)
88 && int128_lt(addr, addrrange_end(range));
89 }
90
91 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
92 {
93 return addrrange_contains(r1, r2.start)
94 || addrrange_contains(r2, r1.start);
95 }
96
97 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
98 {
99 Int128 start = int128_max(r1.start, r2.start);
100 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
101 return addrrange_make(start, int128_sub(end, start));
102 }
103
104 enum ListenerDirection { Forward, Reverse };
105
106 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
107 do { \
108 MemoryListener *_listener; \
109 \
110 switch (_direction) { \
111 case Forward: \
112 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
113 if (_listener->_callback) { \
114 _listener->_callback(_listener, ##_args); \
115 } \
116 } \
117 break; \
118 case Reverse: \
119 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, link) { \
120 if (_listener->_callback) { \
121 _listener->_callback(_listener, ##_args); \
122 } \
123 } \
124 break; \
125 default: \
126 abort(); \
127 } \
128 } while (0)
129
130 #define MEMORY_LISTENER_CALL(_as, _callback, _direction, _section, _args...) \
131 do { \
132 MemoryListener *_listener; \
133 \
134 switch (_direction) { \
135 case Forward: \
136 QTAILQ_FOREACH(_listener, &(_as)->listeners, link_as) { \
137 if (_listener->_callback) { \
138 _listener->_callback(_listener, _section, ##_args); \
139 } \
140 } \
141 break; \
142 case Reverse: \
143 QTAILQ_FOREACH_REVERSE(_listener, &(_as)->listeners, link_as) { \
144 if (_listener->_callback) { \
145 _listener->_callback(_listener, _section, ##_args); \
146 } \
147 } \
148 break; \
149 default: \
150 abort(); \
151 } \
152 } while (0)
153
154 /* No need to ref/unref .mr, the FlatRange keeps it alive. */
155 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...) \
156 do { \
157 MemoryRegionSection mrs = section_from_flat_range(fr, \
158 address_space_to_flatview(as)); \
159 MEMORY_LISTENER_CALL(as, callback, dir, &mrs, ##_args); \
160 } while(0)
161
162 struct CoalescedMemoryRange {
163 AddrRange addr;
164 QTAILQ_ENTRY(CoalescedMemoryRange) link;
165 };
166
167 struct MemoryRegionIoeventfd {
168 AddrRange addr;
169 bool match_data;
170 uint64_t data;
171 EventNotifier *e;
172 };
173
174 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd *a,
175 MemoryRegionIoeventfd *b)
176 {
177 if (int128_lt(a->addr.start, b->addr.start)) {
178 return true;
179 } else if (int128_gt(a->addr.start, b->addr.start)) {
180 return false;
181 } else if (int128_lt(a->addr.size, b->addr.size)) {
182 return true;
183 } else if (int128_gt(a->addr.size, b->addr.size)) {
184 return false;
185 } else if (a->match_data < b->match_data) {
186 return true;
187 } else if (a->match_data > b->match_data) {
188 return false;
189 } else if (a->match_data) {
190 if (a->data < b->data) {
191 return true;
192 } else if (a->data > b->data) {
193 return false;
194 }
195 }
196 if (a->e < b->e) {
197 return true;
198 } else if (a->e > b->e) {
199 return false;
200 }
201 return false;
202 }
203
204 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd *a,
205 MemoryRegionIoeventfd *b)
206 {
207 return !memory_region_ioeventfd_before(a, b)
208 && !memory_region_ioeventfd_before(b, a);
209 }
210
211 /* Range of memory in the global map. Addresses are absolute. */
212 struct FlatRange {
213 MemoryRegion *mr;
214 hwaddr offset_in_region;
215 AddrRange addr;
216 uint8_t dirty_log_mask;
217 bool romd_mode;
218 bool readonly;
219 bool nonvolatile;
220 };
221
222 #define FOR_EACH_FLAT_RANGE(var, view) \
223 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
224
225 static inline MemoryRegionSection
226 section_from_flat_range(FlatRange *fr, FlatView *fv)
227 {
228 return (MemoryRegionSection) {
229 .mr = fr->mr,
230 .fv = fv,
231 .offset_within_region = fr->offset_in_region,
232 .size = fr->addr.size,
233 .offset_within_address_space = int128_get64(fr->addr.start),
234 .readonly = fr->readonly,
235 .nonvolatile = fr->nonvolatile,
236 };
237 }
238
239 static bool flatrange_equal(FlatRange *a, FlatRange *b)
240 {
241 return a->mr == b->mr
242 && addrrange_equal(a->addr, b->addr)
243 && a->offset_in_region == b->offset_in_region
244 && a->romd_mode == b->romd_mode
245 && a->readonly == b->readonly
246 && a->nonvolatile == b->nonvolatile;
247 }
248
249 static FlatView *flatview_new(MemoryRegion *mr_root)
250 {
251 FlatView *view;
252
253 view = g_new0(FlatView, 1);
254 view->ref = 1;
255 view->root = mr_root;
256 memory_region_ref(mr_root);
257 trace_flatview_new(view, mr_root);
258
259 return view;
260 }
261
262 /* Insert a range into a given position. Caller is responsible for maintaining
263 * sorting order.
264 */
265 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
266 {
267 if (view->nr == view->nr_allocated) {
268 view->nr_allocated = MAX(2 * view->nr, 10);
269 view->ranges = g_realloc(view->ranges,
270 view->nr_allocated * sizeof(*view->ranges));
271 }
272 memmove(view->ranges + pos + 1, view->ranges + pos,
273 (view->nr - pos) * sizeof(FlatRange));
274 view->ranges[pos] = *range;
275 memory_region_ref(range->mr);
276 ++view->nr;
277 }
278
279 static void flatview_destroy(FlatView *view)
280 {
281 int i;
282
283 trace_flatview_destroy(view, view->root);
284 if (view->dispatch) {
285 address_space_dispatch_free(view->dispatch);
286 }
287 for (i = 0; i < view->nr; i++) {
288 memory_region_unref(view->ranges[i].mr);
289 }
290 g_free(view->ranges);
291 memory_region_unref(view->root);
292 g_free(view);
293 }
294
295 static bool flatview_ref(FlatView *view)
296 {
297 return qatomic_fetch_inc_nonzero(&view->ref) > 0;
298 }
299
300 void flatview_unref(FlatView *view)
301 {
302 if (qatomic_fetch_dec(&view->ref) == 1) {
303 trace_flatview_destroy_rcu(view, view->root);
304 assert(view->root);
305 call_rcu(view, flatview_destroy, rcu);
306 }
307 }
308
309 static bool can_merge(FlatRange *r1, FlatRange *r2)
310 {
311 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
312 && r1->mr == r2->mr
313 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
314 r1->addr.size),
315 int128_make64(r2->offset_in_region))
316 && r1->dirty_log_mask == r2->dirty_log_mask
317 && r1->romd_mode == r2->romd_mode
318 && r1->readonly == r2->readonly
319 && r1->nonvolatile == r2->nonvolatile;
320 }
321
322 /* Attempt to simplify a view by merging adjacent ranges */
323 static void flatview_simplify(FlatView *view)
324 {
325 unsigned i, j, k;
326
327 i = 0;
328 while (i < view->nr) {
329 j = i + 1;
330 while (j < view->nr
331 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
332 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
333 ++j;
334 }
335 ++i;
336 for (k = i; k < j; k++) {
337 memory_region_unref(view->ranges[k].mr);
338 }
339 memmove(&view->ranges[i], &view->ranges[j],
340 (view->nr - j) * sizeof(view->ranges[j]));
341 view->nr -= j - i;
342 }
343 }
344
345 static bool memory_region_big_endian(MemoryRegion *mr)
346 {
347 #ifdef TARGET_WORDS_BIGENDIAN
348 return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
349 #else
350 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
351 #endif
352 }
353
354 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, MemOp op)
355 {
356 if ((op & MO_BSWAP) != devend_memop(mr->ops->endianness)) {
357 switch (op & MO_SIZE) {
358 case MO_8:
359 break;
360 case MO_16:
361 *data = bswap16(*data);
362 break;
363 case MO_32:
364 *data = bswap32(*data);
365 break;
366 case MO_64:
367 *data = bswap64(*data);
368 break;
369 default:
370 g_assert_not_reached();
371 }
372 }
373 }
374
375 static inline void memory_region_shift_read_access(uint64_t *value,
376 signed shift,
377 uint64_t mask,
378 uint64_t tmp)
379 {
380 if (shift >= 0) {
381 *value |= (tmp & mask) << shift;
382 } else {
383 *value |= (tmp & mask) >> -shift;
384 }
385 }
386
387 static inline uint64_t memory_region_shift_write_access(uint64_t *value,
388 signed shift,
389 uint64_t mask)
390 {
391 uint64_t tmp;
392
393 if (shift >= 0) {
394 tmp = (*value >> shift) & mask;
395 } else {
396 tmp = (*value << -shift) & mask;
397 }
398
399 return tmp;
400 }
401
402 static hwaddr memory_region_to_absolute_addr(MemoryRegion *mr, hwaddr offset)
403 {
404 MemoryRegion *root;
405 hwaddr abs_addr = offset;
406
407 abs_addr += mr->addr;
408 for (root = mr; root->container; ) {
409 root = root->container;
410 abs_addr += root->addr;
411 }
412
413 return abs_addr;
414 }
415
416 static int get_cpu_index(void)
417 {
418 if (current_cpu) {
419 return current_cpu->cpu_index;
420 }
421 return -1;
422 }
423
424 static MemTxResult memory_region_read_accessor(MemoryRegion *mr,
425 hwaddr addr,
426 uint64_t *value,
427 unsigned size,
428 signed shift,
429 uint64_t mask,
430 MemTxAttrs attrs)
431 {
432 uint64_t tmp;
433
434 tmp = mr->ops->read(mr->opaque, addr, size);
435 if (mr->subpage) {
436 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
437 } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_READ)) {
438 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
439 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
440 }
441 memory_region_shift_read_access(value, shift, mask, tmp);
442 return MEMTX_OK;
443 }
444
445 static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr,
446 hwaddr addr,
447 uint64_t *value,
448 unsigned size,
449 signed shift,
450 uint64_t mask,
451 MemTxAttrs attrs)
452 {
453 uint64_t tmp = 0;
454 MemTxResult r;
455
456 r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs);
457 if (mr->subpage) {
458 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
459 } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_READ)) {
460 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
461 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
462 }
463 memory_region_shift_read_access(value, shift, mask, tmp);
464 return r;
465 }
466
467 static MemTxResult memory_region_write_accessor(MemoryRegion *mr,
468 hwaddr addr,
469 uint64_t *value,
470 unsigned size,
471 signed shift,
472 uint64_t mask,
473 MemTxAttrs attrs)
474 {
475 uint64_t tmp = memory_region_shift_write_access(value, shift, mask);
476
477 if (mr->subpage) {
478 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
479 } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_WRITE)) {
480 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
481 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
482 }
483 mr->ops->write(mr->opaque, addr, tmp, size);
484 return MEMTX_OK;
485 }
486
487 static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr,
488 hwaddr addr,
489 uint64_t *value,
490 unsigned size,
491 signed shift,
492 uint64_t mask,
493 MemTxAttrs attrs)
494 {
495 uint64_t tmp = memory_region_shift_write_access(value, shift, mask);
496
497 if (mr->subpage) {
498 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
499 } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_WRITE)) {
500 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
501 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
502 }
503 return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
504 }
505
506 static MemTxResult access_with_adjusted_size(hwaddr addr,
507 uint64_t *value,
508 unsigned size,
509 unsigned access_size_min,
510 unsigned access_size_max,
511 MemTxResult (*access_fn)
512 (MemoryRegion *mr,
513 hwaddr addr,
514 uint64_t *value,
515 unsigned size,
516 signed shift,
517 uint64_t mask,
518 MemTxAttrs attrs),
519 MemoryRegion *mr,
520 MemTxAttrs attrs)
521 {
522 uint64_t access_mask;
523 unsigned access_size;
524 unsigned i;
525 MemTxResult r = MEMTX_OK;
526
527 if (!access_size_min) {
528 access_size_min = 1;
529 }
530 if (!access_size_max) {
531 access_size_max = 4;
532 }
533
534 /* FIXME: support unaligned access? */
535 access_size = MAX(MIN(size, access_size_max), access_size_min);
536 access_mask = MAKE_64BIT_MASK(0, access_size * 8);
537 if (memory_region_big_endian(mr)) {
538 for (i = 0; i < size; i += access_size) {
539 r |= access_fn(mr, addr + i, value, access_size,
540 (size - access_size - i) * 8, access_mask, attrs);
541 }
542 } else {
543 for (i = 0; i < size; i += access_size) {
544 r |= access_fn(mr, addr + i, value, access_size, i * 8,
545 access_mask, attrs);
546 }
547 }
548 return r;
549 }
550
551 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
552 {
553 AddressSpace *as;
554
555 while (mr->container) {
556 mr = mr->container;
557 }
558 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
559 if (mr == as->root) {
560 return as;
561 }
562 }
563 return NULL;
564 }
565
566 /* Render a memory region into the global view. Ranges in @view obscure
567 * ranges in @mr.
568 */
569 static void render_memory_region(FlatView *view,
570 MemoryRegion *mr,
571 Int128 base,
572 AddrRange clip,
573 bool readonly,
574 bool nonvolatile)
575 {
576 MemoryRegion *subregion;
577 unsigned i;
578 hwaddr offset_in_region;
579 Int128 remain;
580 Int128 now;
581 FlatRange fr;
582 AddrRange tmp;
583
584 if (!mr->enabled) {
585 return;
586 }
587
588 int128_addto(&base, int128_make64(mr->addr));
589 readonly |= mr->readonly;
590 nonvolatile |= mr->nonvolatile;
591
592 tmp = addrrange_make(base, mr->size);
593
594 if (!addrrange_intersects(tmp, clip)) {
595 return;
596 }
597
598 clip = addrrange_intersection(tmp, clip);
599
600 if (mr->alias) {
601 int128_subfrom(&base, int128_make64(mr->alias->addr));
602 int128_subfrom(&base, int128_make64(mr->alias_offset));
603 render_memory_region(view, mr->alias, base, clip,
604 readonly, nonvolatile);
605 return;
606 }
607
608 /* Render subregions in priority order. */
609 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
610 render_memory_region(view, subregion, base, clip,
611 readonly, nonvolatile);
612 }
613
614 if (!mr->terminates) {
615 return;
616 }
617
618 offset_in_region = int128_get64(int128_sub(clip.start, base));
619 base = clip.start;
620 remain = clip.size;
621
622 fr.mr = mr;
623 fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr);
624 fr.romd_mode = mr->romd_mode;
625 fr.readonly = readonly;
626 fr.nonvolatile = nonvolatile;
627
628 /* Render the region itself into any gaps left by the current view. */
629 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
630 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
631 continue;
632 }
633 if (int128_lt(base, view->ranges[i].addr.start)) {
634 now = int128_min(remain,
635 int128_sub(view->ranges[i].addr.start, base));
636 fr.offset_in_region = offset_in_region;
637 fr.addr = addrrange_make(base, now);
638 flatview_insert(view, i, &fr);
639 ++i;
640 int128_addto(&base, now);
641 offset_in_region += int128_get64(now);
642 int128_subfrom(&remain, now);
643 }
644 now = int128_sub(int128_min(int128_add(base, remain),
645 addrrange_end(view->ranges[i].addr)),
646 base);
647 int128_addto(&base, now);
648 offset_in_region += int128_get64(now);
649 int128_subfrom(&remain, now);
650 }
651 if (int128_nz(remain)) {
652 fr.offset_in_region = offset_in_region;
653 fr.addr = addrrange_make(base, remain);
654 flatview_insert(view, i, &fr);
655 }
656 }
657
658 static MemoryRegion *memory_region_get_flatview_root(MemoryRegion *mr)
659 {
660 while (mr->enabled) {
661 if (mr->alias) {
662 if (!mr->alias_offset && int128_ge(mr->size, mr->alias->size)) {
663 /* The alias is included in its entirety. Use it as
664 * the "real" root, so that we can share more FlatViews.
665 */
666 mr = mr->alias;
667 continue;
668 }
669 } else if (!mr->terminates) {
670 unsigned int found = 0;
671 MemoryRegion *child, *next = NULL;
672 QTAILQ_FOREACH(child, &mr->subregions, subregions_link) {
673 if (child->enabled) {
674 if (++found > 1) {
675 next = NULL;
676 break;
677 }
678 if (!child->addr && int128_ge(mr->size, child->size)) {
679 /* A child is included in its entirety. If it's the only
680 * enabled one, use it in the hope of finding an alias down the
681 * way. This will also let us share FlatViews.
682 */
683 next = child;
684 }
685 }
686 }
687 if (found == 0) {
688 return NULL;
689 }
690 if (next) {
691 mr = next;
692 continue;
693 }
694 }
695
696 return mr;
697 }
698
699 return NULL;
700 }
701
702 /* Render a memory topology into a list of disjoint absolute ranges. */
703 static FlatView *generate_memory_topology(MemoryRegion *mr)
704 {
705 int i;
706 FlatView *view;
707
708 view = flatview_new(mr);
709
710 if (mr) {
711 render_memory_region(view, mr, int128_zero(),
712 addrrange_make(int128_zero(), int128_2_64()),
713 false, false);
714 }
715 flatview_simplify(view);
716
717 view->dispatch = address_space_dispatch_new(view);
718 for (i = 0; i < view->nr; i++) {
719 MemoryRegionSection mrs =
720 section_from_flat_range(&view->ranges[i], view);
721 flatview_add_to_dispatch(view, &mrs);
722 }
723 address_space_dispatch_compact(view->dispatch);
724 g_hash_table_replace(flat_views, mr, view);
725
726 return view;
727 }
728
729 static void address_space_add_del_ioeventfds(AddressSpace *as,
730 MemoryRegionIoeventfd *fds_new,
731 unsigned fds_new_nb,
732 MemoryRegionIoeventfd *fds_old,
733 unsigned fds_old_nb)
734 {
735 unsigned iold, inew;
736 MemoryRegionIoeventfd *fd;
737 MemoryRegionSection section;
738
739 /* Generate a symmetric difference of the old and new fd sets, adding
740 * and deleting as necessary.
741 */
742
743 iold = inew = 0;
744 while (iold < fds_old_nb || inew < fds_new_nb) {
745 if (iold < fds_old_nb
746 && (inew == fds_new_nb
747 || memory_region_ioeventfd_before(&fds_old[iold],
748 &fds_new[inew]))) {
749 fd = &fds_old[iold];
750 section = (MemoryRegionSection) {
751 .fv = address_space_to_flatview(as),
752 .offset_within_address_space = int128_get64(fd->addr.start),
753 .size = fd->addr.size,
754 };
755 MEMORY_LISTENER_CALL(as, eventfd_del, Forward, &section,
756 fd->match_data, fd->data, fd->e);
757 ++iold;
758 } else if (inew < fds_new_nb
759 && (iold == fds_old_nb
760 || memory_region_ioeventfd_before(&fds_new[inew],
761 &fds_old[iold]))) {
762 fd = &fds_new[inew];
763 section = (MemoryRegionSection) {
764 .fv = address_space_to_flatview(as),
765 .offset_within_address_space = int128_get64(fd->addr.start),
766 .size = fd->addr.size,
767 };
768 MEMORY_LISTENER_CALL(as, eventfd_add, Reverse, &section,
769 fd->match_data, fd->data, fd->e);
770 ++inew;
771 } else {
772 ++iold;
773 ++inew;
774 }
775 }
776 }
777
778 FlatView *address_space_get_flatview(AddressSpace *as)
779 {
780 FlatView *view;
781
782 RCU_READ_LOCK_GUARD();
783 do {
784 view = address_space_to_flatview(as);
785 /* If somebody has replaced as->current_map concurrently,
786 * flatview_ref returns false.
787 */
788 } while (!flatview_ref(view));
789 return view;
790 }
791
792 static void address_space_update_ioeventfds(AddressSpace *as)
793 {
794 FlatView *view;
795 FlatRange *fr;
796 unsigned ioeventfd_nb = 0;
797 unsigned ioeventfd_max;
798 MemoryRegionIoeventfd *ioeventfds;
799 AddrRange tmp;
800 unsigned i;
801
802 /*
803 * It is likely that the number of ioeventfds hasn't changed much, so use
804 * the previous size as the starting value, with some headroom to avoid
805 * gratuitous reallocations.
806 */
807 ioeventfd_max = QEMU_ALIGN_UP(as->ioeventfd_nb, 4);
808 ioeventfds = g_new(MemoryRegionIoeventfd, ioeventfd_max);
809
810 view = address_space_get_flatview(as);
811 FOR_EACH_FLAT_RANGE(fr, view) {
812 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
813 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
814 int128_sub(fr->addr.start,
815 int128_make64(fr->offset_in_region)));
816 if (addrrange_intersects(fr->addr, tmp)) {
817 ++ioeventfd_nb;
818 if (ioeventfd_nb > ioeventfd_max) {
819 ioeventfd_max = MAX(ioeventfd_max * 2, 4);
820 ioeventfds = g_realloc(ioeventfds,
821 ioeventfd_max * sizeof(*ioeventfds));
822 }
823 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
824 ioeventfds[ioeventfd_nb-1].addr = tmp;
825 }
826 }
827 }
828
829 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
830 as->ioeventfds, as->ioeventfd_nb);
831
832 g_free(as->ioeventfds);
833 as->ioeventfds = ioeventfds;
834 as->ioeventfd_nb = ioeventfd_nb;
835 flatview_unref(view);
836 }
837
838 /*
839 * Notify the memory listeners about the coalesced IO change events of
840 * range `cmr'. Only the part that has intersection of the specified
841 * FlatRange will be sent.
842 */
843 static void flat_range_coalesced_io_notify(FlatRange *fr, AddressSpace *as,
844 CoalescedMemoryRange *cmr, bool add)
845 {
846 AddrRange tmp;
847
848 tmp = addrrange_shift(cmr->addr,
849 int128_sub(fr->addr.start,
850 int128_make64(fr->offset_in_region)));
851 if (!addrrange_intersects(tmp, fr->addr)) {
852 return;
853 }
854 tmp = addrrange_intersection(tmp, fr->addr);
855
856 if (add) {
857 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, coalesced_io_add,
858 int128_get64(tmp.start),
859 int128_get64(tmp.size));
860 } else {
861 MEMORY_LISTENER_UPDATE_REGION(fr, as, Reverse, coalesced_io_del,
862 int128_get64(tmp.start),
863 int128_get64(tmp.size));
864 }
865 }
866
867 static void flat_range_coalesced_io_del(FlatRange *fr, AddressSpace *as)
868 {
869 CoalescedMemoryRange *cmr;
870
871 QTAILQ_FOREACH(cmr, &fr->mr->coalesced, link) {
872 flat_range_coalesced_io_notify(fr, as, cmr, false);
873 }
874 }
875
876 static void flat_range_coalesced_io_add(FlatRange *fr, AddressSpace *as)
877 {
878 MemoryRegion *mr = fr->mr;
879 CoalescedMemoryRange *cmr;
880
881 if (QTAILQ_EMPTY(&mr->coalesced)) {
882 return;
883 }
884
885 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
886 flat_range_coalesced_io_notify(fr, as, cmr, true);
887 }
888 }
889
890 static void address_space_update_topology_pass(AddressSpace *as,
891 const FlatView *old_view,
892 const FlatView *new_view,
893 bool adding)
894 {
895 unsigned iold, inew;
896 FlatRange *frold, *frnew;
897
898 /* Generate a symmetric difference of the old and new memory maps.
899 * Kill ranges in the old map, and instantiate ranges in the new map.
900 */
901 iold = inew = 0;
902 while (iold < old_view->nr || inew < new_view->nr) {
903 if (iold < old_view->nr) {
904 frold = &old_view->ranges[iold];
905 } else {
906 frold = NULL;
907 }
908 if (inew < new_view->nr) {
909 frnew = &new_view->ranges[inew];
910 } else {
911 frnew = NULL;
912 }
913
914 if (frold
915 && (!frnew
916 || int128_lt(frold->addr.start, frnew->addr.start)
917 || (int128_eq(frold->addr.start, frnew->addr.start)
918 && !flatrange_equal(frold, frnew)))) {
919 /* In old but not in new, or in both but attributes changed. */
920
921 if (!adding) {
922 flat_range_coalesced_io_del(frold, as);
923 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
924 }
925
926 ++iold;
927 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
928 /* In both and unchanged (except logging may have changed) */
929
930 if (adding) {
931 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
932 if (frnew->dirty_log_mask & ~frold->dirty_log_mask) {
933 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start,
934 frold->dirty_log_mask,
935 frnew->dirty_log_mask);
936 }
937 if (frold->dirty_log_mask & ~frnew->dirty_log_mask) {
938 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop,
939 frold->dirty_log_mask,
940 frnew->dirty_log_mask);
941 }
942 }
943
944 ++iold;
945 ++inew;
946 } else {
947 /* In new */
948
949 if (adding) {
950 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
951 flat_range_coalesced_io_add(frnew, as);
952 }
953
954 ++inew;
955 }
956 }
957 }
958
959 static void flatviews_init(void)
960 {
961 static FlatView *empty_view;
962
963 if (flat_views) {
964 return;
965 }
966
967 flat_views = g_hash_table_new_full(g_direct_hash, g_direct_equal, NULL,
968 (GDestroyNotify) flatview_unref);
969 if (!empty_view) {
970 empty_view = generate_memory_topology(NULL);
971 /* We keep it alive forever in the global variable. */
972 flatview_ref(empty_view);
973 } else {
974 g_hash_table_replace(flat_views, NULL, empty_view);
975 flatview_ref(empty_view);
976 }
977 }
978
979 static void flatviews_reset(void)
980 {
981 AddressSpace *as;
982
983 if (flat_views) {
984 g_hash_table_unref(flat_views);
985 flat_views = NULL;
986 }
987 flatviews_init();
988
989 /* Render unique FVs */
990 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
991 MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
992
993 if (g_hash_table_lookup(flat_views, physmr)) {
994 continue;
995 }
996
997 generate_memory_topology(physmr);
998 }
999 }
1000
1001 static void address_space_set_flatview(AddressSpace *as)
1002 {
1003 FlatView *old_view = address_space_to_flatview(as);
1004 MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
1005 FlatView *new_view = g_hash_table_lookup(flat_views, physmr);
1006
1007 assert(new_view);
1008
1009 if (old_view == new_view) {
1010 return;
1011 }
1012
1013 if (old_view) {
1014 flatview_ref(old_view);
1015 }
1016
1017 flatview_ref(new_view);
1018
1019 if (!QTAILQ_EMPTY(&as->listeners)) {
1020 FlatView tmpview = { .nr = 0 }, *old_view2 = old_view;
1021
1022 if (!old_view2) {
1023 old_view2 = &tmpview;
1024 }
1025 address_space_update_topology_pass(as, old_view2, new_view, false);
1026 address_space_update_topology_pass(as, old_view2, new_view, true);
1027 }
1028
1029 /* Writes are protected by the BQL. */
1030 qatomic_rcu_set(&as->current_map, new_view);
1031 if (old_view) {
1032 flatview_unref(old_view);
1033 }
1034
1035 /* Note that all the old MemoryRegions are still alive up to this
1036 * point. This relieves most MemoryListeners from the need to
1037 * ref/unref the MemoryRegions they get---unless they use them
1038 * outside the iothread mutex, in which case precise reference
1039 * counting is necessary.
1040 */
1041 if (old_view) {
1042 flatview_unref(old_view);
1043 }
1044 }
1045
1046 static void address_space_update_topology(AddressSpace *as)
1047 {
1048 MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
1049
1050 flatviews_init();
1051 if (!g_hash_table_lookup(flat_views, physmr)) {
1052 generate_memory_topology(physmr);
1053 }
1054 address_space_set_flatview(as);
1055 }
1056
1057 void memory_region_transaction_begin(void)
1058 {
1059 qemu_flush_coalesced_mmio_buffer();
1060 ++memory_region_transaction_depth;
1061 }
1062
1063 void memory_region_transaction_commit(void)
1064 {
1065 AddressSpace *as;
1066
1067 assert(memory_region_transaction_depth);
1068 assert(qemu_mutex_iothread_locked());
1069
1070 --memory_region_transaction_depth;
1071 if (!memory_region_transaction_depth) {
1072 if (memory_region_update_pending) {
1073 flatviews_reset();
1074
1075 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
1076
1077 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1078 address_space_set_flatview(as);
1079 address_space_update_ioeventfds(as);
1080 }
1081 memory_region_update_pending = false;
1082 ioeventfd_update_pending = false;
1083 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
1084 } else if (ioeventfd_update_pending) {
1085 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1086 address_space_update_ioeventfds(as);
1087 }
1088 ioeventfd_update_pending = false;
1089 }
1090 }
1091 }
1092
1093 static void memory_region_destructor_none(MemoryRegion *mr)
1094 {
1095 }
1096
1097 static void memory_region_destructor_ram(MemoryRegion *mr)
1098 {
1099 qemu_ram_free(mr->ram_block);
1100 }
1101
1102 static bool memory_region_need_escape(char c)
1103 {
1104 return c == '/' || c == '[' || c == '\\' || c == ']';
1105 }
1106
1107 static char *memory_region_escape_name(const char *name)
1108 {
1109 const char *p;
1110 char *escaped, *q;
1111 uint8_t c;
1112 size_t bytes = 0;
1113
1114 for (p = name; *p; p++) {
1115 bytes += memory_region_need_escape(*p) ? 4 : 1;
1116 }
1117 if (bytes == p - name) {
1118 return g_memdup(name, bytes + 1);
1119 }
1120
1121 escaped = g_malloc(bytes + 1);
1122 for (p = name, q = escaped; *p; p++) {
1123 c = *p;
1124 if (unlikely(memory_region_need_escape(c))) {
1125 *q++ = '\\';
1126 *q++ = 'x';
1127 *q++ = "0123456789abcdef"[c >> 4];
1128 c = "0123456789abcdef"[c & 15];
1129 }
1130 *q++ = c;
1131 }
1132 *q = 0;
1133 return escaped;
1134 }
1135
1136 static void memory_region_do_init(MemoryRegion *mr,
1137 Object *owner,
1138 const char *name,
1139 uint64_t size)
1140 {
1141 mr->size = int128_make64(size);
1142 if (size == UINT64_MAX) {
1143 mr->size = int128_2_64();
1144 }
1145 mr->name = g_strdup(name);
1146 mr->owner = owner;
1147 mr->ram_block = NULL;
1148
1149 if (name) {
1150 char *escaped_name = memory_region_escape_name(name);
1151 char *name_array = g_strdup_printf("%s[*]", escaped_name);
1152
1153 if (!owner) {
1154 owner = container_get(qdev_get_machine(), "/unattached");
1155 }
1156
1157 object_property_add_child(owner, name_array, OBJECT(mr));
1158 object_unref(OBJECT(mr));
1159 g_free(name_array);
1160 g_free(escaped_name);
1161 }
1162 }
1163
1164 void memory_region_init(MemoryRegion *mr,
1165 Object *owner,
1166 const char *name,
1167 uint64_t size)
1168 {
1169 object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
1170 memory_region_do_init(mr, owner, name, size);
1171 }
1172
1173 static void memory_region_get_container(Object *obj, Visitor *v,
1174 const char *name, void *opaque,
1175 Error **errp)
1176 {
1177 MemoryRegion *mr = MEMORY_REGION(obj);
1178 char *path = (char *)"";
1179
1180 if (mr->container) {
1181 path = object_get_canonical_path(OBJECT(mr->container));
1182 }
1183 visit_type_str(v, name, &path, errp);
1184 if (mr->container) {
1185 g_free(path);
1186 }
1187 }
1188
1189 static Object *memory_region_resolve_container(Object *obj, void *opaque,
1190 const char *part)
1191 {
1192 MemoryRegion *mr = MEMORY_REGION(obj);
1193
1194 return OBJECT(mr->container);
1195 }
1196
1197 static void memory_region_get_priority(Object *obj, Visitor *v,
1198 const char *name, void *opaque,
1199 Error **errp)
1200 {
1201 MemoryRegion *mr = MEMORY_REGION(obj);
1202 int32_t value = mr->priority;
1203
1204 visit_type_int32(v, name, &value, errp);
1205 }
1206
1207 static void memory_region_get_size(Object *obj, Visitor *v, const char *name,
1208 void *opaque, Error **errp)
1209 {
1210 MemoryRegion *mr = MEMORY_REGION(obj);
1211 uint64_t value = memory_region_size(mr);
1212
1213 visit_type_uint64(v, name, &value, errp);
1214 }
1215
1216 static void memory_region_initfn(Object *obj)
1217 {
1218 MemoryRegion *mr = MEMORY_REGION(obj);
1219 ObjectProperty *op;
1220
1221 mr->ops = &unassigned_mem_ops;
1222 mr->enabled = true;
1223 mr->romd_mode = true;
1224 mr->destructor = memory_region_destructor_none;
1225 QTAILQ_INIT(&mr->subregions);
1226 QTAILQ_INIT(&mr->coalesced);
1227
1228 op = object_property_add(OBJECT(mr), "container",
1229 "link<" TYPE_MEMORY_REGION ">",
1230 memory_region_get_container,
1231 NULL, /* memory_region_set_container */
1232 NULL, NULL);
1233 op->resolve = memory_region_resolve_container;
1234
1235 object_property_add_uint64_ptr(OBJECT(mr), "addr",
1236 &mr->addr, OBJ_PROP_FLAG_READ);
1237 object_property_add(OBJECT(mr), "priority", "uint32",
1238 memory_region_get_priority,
1239 NULL, /* memory_region_set_priority */
1240 NULL, NULL);
1241 object_property_add(OBJECT(mr), "size", "uint64",
1242 memory_region_get_size,
1243 NULL, /* memory_region_set_size, */
1244 NULL, NULL);
1245 }
1246
1247 static void iommu_memory_region_initfn(Object *obj)
1248 {
1249 MemoryRegion *mr = MEMORY_REGION(obj);
1250
1251 mr->is_iommu = true;
1252 }
1253
1254 static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
1255 unsigned size)
1256 {
1257 #ifdef DEBUG_UNASSIGNED
1258 printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
1259 #endif
1260 return 0;
1261 }
1262
1263 static void unassigned_mem_write(void *opaque, hwaddr addr,
1264 uint64_t val, unsigned size)
1265 {
1266 #ifdef DEBUG_UNASSIGNED
1267 printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
1268 #endif
1269 }
1270
1271 static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
1272 unsigned size, bool is_write,
1273 MemTxAttrs attrs)
1274 {
1275 return false;
1276 }
1277
1278 const MemoryRegionOps unassigned_mem_ops = {
1279 .valid.accepts = unassigned_mem_accepts,
1280 .endianness = DEVICE_NATIVE_ENDIAN,
1281 };
1282
1283 static uint64_t memory_region_ram_device_read(void *opaque,
1284 hwaddr addr, unsigned size)
1285 {
1286 MemoryRegion *mr = opaque;
1287 uint64_t data = (uint64_t)~0;
1288
1289 switch (size) {
1290 case 1:
1291 data = *(uint8_t *)(mr->ram_block->host + addr);
1292 break;
1293 case 2:
1294 data = *(uint16_t *)(mr->ram_block->host + addr);
1295 break;
1296 case 4:
1297 data = *(uint32_t *)(mr->ram_block->host + addr);
1298 break;
1299 case 8:
1300 data = *(uint64_t *)(mr->ram_block->host + addr);
1301 break;
1302 }
1303
1304 trace_memory_region_ram_device_read(get_cpu_index(), mr, addr, data, size);
1305
1306 return data;
1307 }
1308
1309 static void memory_region_ram_device_write(void *opaque, hwaddr addr,
1310 uint64_t data, unsigned size)
1311 {
1312 MemoryRegion *mr = opaque;
1313
1314 trace_memory_region_ram_device_write(get_cpu_index(), mr, addr, data, size);
1315
1316 switch (size) {
1317 case 1:
1318 *(uint8_t *)(mr->ram_block->host + addr) = (uint8_t)data;
1319 break;
1320 case 2:
1321 *(uint16_t *)(mr->ram_block->host + addr) = (uint16_t)data;
1322 break;
1323 case 4:
1324 *(uint32_t *)(mr->ram_block->host + addr) = (uint32_t)data;
1325 break;
1326 case 8:
1327 *(uint64_t *)(mr->ram_block->host + addr) = data;
1328 break;
1329 }
1330 }
1331
1332 static const MemoryRegionOps ram_device_mem_ops = {
1333 .read = memory_region_ram_device_read,
1334 .write = memory_region_ram_device_write,
1335 .endianness = DEVICE_HOST_ENDIAN,
1336 .valid = {
1337 .min_access_size = 1,
1338 .max_access_size = 8,
1339 .unaligned = true,
1340 },
1341 .impl = {
1342 .min_access_size = 1,
1343 .max_access_size = 8,
1344 .unaligned = true,
1345 },
1346 };
1347
1348 bool memory_region_access_valid(MemoryRegion *mr,
1349 hwaddr addr,
1350 unsigned size,
1351 bool is_write,
1352 MemTxAttrs attrs)
1353 {
1354 if (mr->ops->valid.accepts
1355 && !mr->ops->valid.accepts(mr->opaque, addr, size, is_write, attrs)) {
1356 return false;
1357 }
1358
1359 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
1360 return false;
1361 }
1362
1363 /* Treat zero as compatibility all valid */
1364 if (!mr->ops->valid.max_access_size) {
1365 return true;
1366 }
1367
1368 if (size > mr->ops->valid.max_access_size
1369 || size < mr->ops->valid.min_access_size) {
1370 return false;
1371 }
1372 return true;
1373 }
1374
1375 static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
1376 hwaddr addr,
1377 uint64_t *pval,
1378 unsigned size,
1379 MemTxAttrs attrs)
1380 {
1381 *pval = 0;
1382
1383 if (mr->ops->read) {
1384 return access_with_adjusted_size(addr, pval, size,
1385 mr->ops->impl.min_access_size,
1386 mr->ops->impl.max_access_size,
1387 memory_region_read_accessor,
1388 mr, attrs);
1389 } else {
1390 return access_with_adjusted_size(addr, pval, size,
1391 mr->ops->impl.min_access_size,
1392 mr->ops->impl.max_access_size,
1393 memory_region_read_with_attrs_accessor,
1394 mr, attrs);
1395 }
1396 }
1397
1398 MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
1399 hwaddr addr,
1400 uint64_t *pval,
1401 MemOp op,
1402 MemTxAttrs attrs)
1403 {
1404 unsigned size = memop_size(op);
1405 MemTxResult r;
1406
1407 if (!memory_region_access_valid(mr, addr, size, false, attrs)) {
1408 *pval = unassigned_mem_read(mr, addr, size);
1409 return MEMTX_DECODE_ERROR;
1410 }
1411
1412 r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
1413 adjust_endianness(mr, pval, op);
1414 return r;
1415 }
1416
1417 /* Return true if an eventfd was signalled */
1418 static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr,
1419 hwaddr addr,
1420 uint64_t data,
1421 unsigned size,
1422 MemTxAttrs attrs)
1423 {
1424 MemoryRegionIoeventfd ioeventfd = {
1425 .addr = addrrange_make(int128_make64(addr), int128_make64(size)),
1426 .data = data,
1427 };
1428 unsigned i;
1429
1430 for (i = 0; i < mr->ioeventfd_nb; i++) {
1431 ioeventfd.match_data = mr->ioeventfds[i].match_data;
1432 ioeventfd.e = mr->ioeventfds[i].e;
1433
1434 if (memory_region_ioeventfd_equal(&ioeventfd, &mr->ioeventfds[i])) {
1435 event_notifier_set(ioeventfd.e);
1436 return true;
1437 }
1438 }
1439
1440 return false;
1441 }
1442
1443 MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
1444 hwaddr addr,
1445 uint64_t data,
1446 MemOp op,
1447 MemTxAttrs attrs)
1448 {
1449 unsigned size = memop_size(op);
1450
1451 if (!memory_region_access_valid(mr, addr, size, true, attrs)) {
1452 unassigned_mem_write(mr, addr, data, size);
1453 return MEMTX_DECODE_ERROR;
1454 }
1455
1456 adjust_endianness(mr, &data, op);
1457
1458 if ((!kvm_eventfds_enabled()) &&
1459 memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) {
1460 return MEMTX_OK;
1461 }
1462
1463 if (mr->ops->write) {
1464 return access_with_adjusted_size(addr, &data, size,
1465 mr->ops->impl.min_access_size,
1466 mr->ops->impl.max_access_size,
1467 memory_region_write_accessor, mr,
1468 attrs);
1469 } else {
1470 return
1471 access_with_adjusted_size(addr, &data, size,
1472 mr->ops->impl.min_access_size,
1473 mr->ops->impl.max_access_size,
1474 memory_region_write_with_attrs_accessor,
1475 mr, attrs);
1476 }
1477 }
1478
1479 void memory_region_init_io(MemoryRegion *mr,
1480 Object *owner,
1481 const MemoryRegionOps *ops,
1482 void *opaque,
1483 const char *name,
1484 uint64_t size)
1485 {
1486 memory_region_init(mr, owner, name, size);
1487 mr->ops = ops ? ops : &unassigned_mem_ops;
1488 mr->opaque = opaque;
1489 mr->terminates = true;
1490 }
1491
1492 void memory_region_init_ram_nomigrate(MemoryRegion *mr,
1493 Object *owner,
1494 const char *name,
1495 uint64_t size,
1496 Error **errp)
1497 {
1498 memory_region_init_ram_shared_nomigrate(mr, owner, name, size, false, errp);
1499 }
1500
1501 void memory_region_init_ram_shared_nomigrate(MemoryRegion *mr,
1502 Object *owner,
1503 const char *name,
1504 uint64_t size,
1505 bool share,
1506 Error **errp)
1507 {
1508 Error *err = NULL;
1509 memory_region_init(mr, owner, name, size);
1510 mr->ram = true;
1511 mr->terminates = true;
1512 mr->destructor = memory_region_destructor_ram;
1513 mr->ram_block = qemu_ram_alloc(size, share, mr, &err);
1514 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1515 if (err) {
1516 mr->size = int128_zero();
1517 object_unparent(OBJECT(mr));
1518 error_propagate(errp, err);
1519 }
1520 }
1521
1522 void memory_region_init_resizeable_ram(MemoryRegion *mr,
1523 Object *owner,
1524 const char *name,
1525 uint64_t size,
1526 uint64_t max_size,
1527 void (*resized)(const char*,
1528 uint64_t length,
1529 void *host),
1530 Error **errp)
1531 {
1532 Error *err = NULL;
1533 memory_region_init(mr, owner, name, size);
1534 mr->ram = true;
1535 mr->terminates = true;
1536 mr->destructor = memory_region_destructor_ram;
1537 mr->ram_block = qemu_ram_alloc_resizeable(size, max_size, resized,
1538 mr, &err);
1539 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1540 if (err) {
1541 mr->size = int128_zero();
1542 object_unparent(OBJECT(mr));
1543 error_propagate(errp, err);
1544 }
1545 }
1546
1547 #ifdef CONFIG_POSIX
1548 void memory_region_init_ram_from_file(MemoryRegion *mr,
1549 struct Object *owner,
1550 const char *name,
1551 uint64_t size,
1552 uint64_t align,
1553 uint32_t ram_flags,
1554 const char *path,
1555 Error **errp)
1556 {
1557 Error *err = NULL;
1558 memory_region_init(mr, owner, name, size);
1559 mr->ram = true;
1560 mr->terminates = true;
1561 mr->destructor = memory_region_destructor_ram;
1562 mr->align = align;
1563 mr->ram_block = qemu_ram_alloc_from_file(size, mr, ram_flags, path, &err);
1564 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1565 if (err) {
1566 mr->size = int128_zero();
1567 object_unparent(OBJECT(mr));
1568 error_propagate(errp, err);
1569 }
1570 }
1571
1572 void memory_region_init_ram_from_fd(MemoryRegion *mr,
1573 struct Object *owner,
1574 const char *name,
1575 uint64_t size,
1576 bool share,
1577 int fd,
1578 Error **errp)
1579 {
1580 Error *err = NULL;
1581 memory_region_init(mr, owner, name, size);
1582 mr->ram = true;
1583 mr->terminates = true;
1584 mr->destructor = memory_region_destructor_ram;
1585 mr->ram_block = qemu_ram_alloc_from_fd(size, mr,
1586 share ? RAM_SHARED : 0,
1587 fd, &err);
1588 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1589 if (err) {
1590 mr->size = int128_zero();
1591 object_unparent(OBJECT(mr));
1592 error_propagate(errp, err);
1593 }
1594 }
1595 #endif
1596
1597 void memory_region_init_ram_ptr(MemoryRegion *mr,
1598 Object *owner,
1599 const char *name,
1600 uint64_t size,
1601 void *ptr)
1602 {
1603 memory_region_init(mr, owner, name, size);
1604 mr->ram = true;
1605 mr->terminates = true;
1606 mr->destructor = memory_region_destructor_ram;
1607 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1608
1609 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1610 assert(ptr != NULL);
1611 mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
1612 }
1613
1614 void memory_region_init_ram_device_ptr(MemoryRegion *mr,
1615 Object *owner,
1616 const char *name,
1617 uint64_t size,
1618 void *ptr)
1619 {
1620 memory_region_init(mr, owner, name, size);
1621 mr->ram = true;
1622 mr->terminates = true;
1623 mr->ram_device = true;
1624 mr->ops = &ram_device_mem_ops;
1625 mr->opaque = mr;
1626 mr->destructor = memory_region_destructor_ram;
1627 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1628 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1629 assert(ptr != NULL);
1630 mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
1631 }
1632
1633 void memory_region_init_alias(MemoryRegion *mr,
1634 Object *owner,
1635 const char *name,
1636 MemoryRegion *orig,
1637 hwaddr offset,
1638 uint64_t size)
1639 {
1640 memory_region_init(mr, owner, name, size);
1641 mr->alias = orig;
1642 mr->alias_offset = offset;
1643 }
1644
1645 void memory_region_init_rom_nomigrate(MemoryRegion *mr,
1646 struct Object *owner,
1647 const char *name,
1648 uint64_t size,
1649 Error **errp)
1650 {
1651 memory_region_init_ram_shared_nomigrate(mr, owner, name, size, false, errp);
1652 mr->readonly = true;
1653 }
1654
1655 void memory_region_init_rom_device_nomigrate(MemoryRegion *mr,
1656 Object *owner,
1657 const MemoryRegionOps *ops,
1658 void *opaque,
1659 const char *name,
1660 uint64_t size,
1661 Error **errp)
1662 {
1663 Error *err = NULL;
1664 assert(ops);
1665 memory_region_init(mr, owner, name, size);
1666 mr->ops = ops;
1667 mr->opaque = opaque;
1668 mr->terminates = true;
1669 mr->rom_device = true;
1670 mr->destructor = memory_region_destructor_ram;
1671 mr->ram_block = qemu_ram_alloc(size, false, mr, &err);
1672 if (err) {
1673 mr->size = int128_zero();
1674 object_unparent(OBJECT(mr));
1675 error_propagate(errp, err);
1676 }
1677 }
1678
1679 void memory_region_init_iommu(void *_iommu_mr,
1680 size_t instance_size,
1681 const char *mrtypename,
1682 Object *owner,
1683 const char *name,
1684 uint64_t size)
1685 {
1686 struct IOMMUMemoryRegion *iommu_mr;
1687 struct MemoryRegion *mr;
1688
1689 object_initialize(_iommu_mr, instance_size, mrtypename);
1690 mr = MEMORY_REGION(_iommu_mr);
1691 memory_region_do_init(mr, owner, name, size);
1692 iommu_mr = IOMMU_MEMORY_REGION(mr);
1693 mr->terminates = true; /* then re-forwards */
1694 QLIST_INIT(&iommu_mr->iommu_notify);
1695 iommu_mr->iommu_notify_flags = IOMMU_NOTIFIER_NONE;
1696 }
1697
1698 static void memory_region_finalize(Object *obj)
1699 {
1700 MemoryRegion *mr = MEMORY_REGION(obj);
1701
1702 assert(!mr->container);
1703
1704 /* We know the region is not visible in any address space (it
1705 * does not have a container and cannot be a root either because
1706 * it has no references, so we can blindly clear mr->enabled.
1707 * memory_region_set_enabled instead could trigger a transaction
1708 * and cause an infinite loop.
1709 */
1710 mr->enabled = false;
1711 memory_region_transaction_begin();
1712 while (!QTAILQ_EMPTY(&mr->subregions)) {
1713 MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions);
1714 memory_region_del_subregion(mr, subregion);
1715 }
1716 memory_region_transaction_commit();
1717
1718 mr->destructor(mr);
1719 memory_region_clear_coalescing(mr);
1720 g_free((char *)mr->name);
1721 g_free(mr->ioeventfds);
1722 }
1723
1724 Object *memory_region_owner(MemoryRegion *mr)
1725 {
1726 Object *obj = OBJECT(mr);
1727 return obj->parent;
1728 }
1729
1730 void memory_region_ref(MemoryRegion *mr)
1731 {
1732 /* MMIO callbacks most likely will access data that belongs
1733 * to the owner, hence the need to ref/unref the owner whenever
1734 * the memory region is in use.
1735 *
1736 * The memory region is a child of its owner. As long as the
1737 * owner doesn't call unparent itself on the memory region,
1738 * ref-ing the owner will also keep the memory region alive.
1739 * Memory regions without an owner are supposed to never go away;
1740 * we do not ref/unref them because it slows down DMA sensibly.
1741 */
1742 if (mr && mr->owner) {
1743 object_ref(mr->owner);
1744 }
1745 }
1746
1747 void memory_region_unref(MemoryRegion *mr)
1748 {
1749 if (mr && mr->owner) {
1750 object_unref(mr->owner);
1751 }
1752 }
1753
1754 uint64_t memory_region_size(MemoryRegion *mr)
1755 {
1756 if (int128_eq(mr->size, int128_2_64())) {
1757 return UINT64_MAX;
1758 }
1759 return int128_get64(mr->size);
1760 }
1761
1762 const char *memory_region_name(const MemoryRegion *mr)
1763 {
1764 if (!mr->name) {
1765 ((MemoryRegion *)mr)->name =
1766 g_strdup(object_get_canonical_path_component(OBJECT(mr)));
1767 }
1768 return mr->name;
1769 }
1770
1771 bool memory_region_is_ram_device(MemoryRegion *mr)
1772 {
1773 return mr->ram_device;
1774 }
1775
1776 uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr)
1777 {
1778 uint8_t mask = mr->dirty_log_mask;
1779 if (global_dirty_log && mr->ram_block) {
1780 mask |= (1 << DIRTY_MEMORY_MIGRATION);
1781 }
1782 return mask;
1783 }
1784
1785 bool memory_region_is_logging(MemoryRegion *mr, uint8_t client)
1786 {
1787 return memory_region_get_dirty_log_mask(mr) & (1 << client);
1788 }
1789
1790 static int memory_region_update_iommu_notify_flags(IOMMUMemoryRegion *iommu_mr,
1791 Error **errp)
1792 {
1793 IOMMUNotifierFlag flags = IOMMU_NOTIFIER_NONE;
1794 IOMMUNotifier *iommu_notifier;
1795 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1796 int ret = 0;
1797
1798 IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
1799 flags |= iommu_notifier->notifier_flags;
1800 }
1801
1802 if (flags != iommu_mr->iommu_notify_flags && imrc->notify_flag_changed) {
1803 ret = imrc->notify_flag_changed(iommu_mr,
1804 iommu_mr->iommu_notify_flags,
1805 flags, errp);
1806 }
1807
1808 if (!ret) {
1809 iommu_mr->iommu_notify_flags = flags;
1810 }
1811 return ret;
1812 }
1813
1814 int memory_region_register_iommu_notifier(MemoryRegion *mr,
1815 IOMMUNotifier *n, Error **errp)
1816 {
1817 IOMMUMemoryRegion *iommu_mr;
1818 int ret;
1819
1820 if (mr->alias) {
1821 return memory_region_register_iommu_notifier(mr->alias, n, errp);
1822 }
1823
1824 /* We need to register for at least one bitfield */
1825 iommu_mr = IOMMU_MEMORY_REGION(mr);
1826 assert(n->notifier_flags != IOMMU_NOTIFIER_NONE);
1827 assert(n->start <= n->end);
1828 assert(n->iommu_idx >= 0 &&
1829 n->iommu_idx < memory_region_iommu_num_indexes(iommu_mr));
1830
1831 QLIST_INSERT_HEAD(&iommu_mr->iommu_notify, n, node);
1832 ret = memory_region_update_iommu_notify_flags(iommu_mr, errp);
1833 if (ret) {
1834 QLIST_REMOVE(n, node);
1835 }
1836 return ret;
1837 }
1838
1839 uint64_t memory_region_iommu_get_min_page_size(IOMMUMemoryRegion *iommu_mr)
1840 {
1841 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1842
1843 if (imrc->get_min_page_size) {
1844 return imrc->get_min_page_size(iommu_mr);
1845 }
1846 return TARGET_PAGE_SIZE;
1847 }
1848
1849 void memory_region_iommu_replay(IOMMUMemoryRegion *iommu_mr, IOMMUNotifier *n)
1850 {
1851 MemoryRegion *mr = MEMORY_REGION(iommu_mr);
1852 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1853 hwaddr addr, granularity;
1854 IOMMUTLBEntry iotlb;
1855
1856 /* If the IOMMU has its own replay callback, override */
1857 if (imrc->replay) {
1858 imrc->replay(iommu_mr, n);
1859 return;
1860 }
1861
1862 granularity = memory_region_iommu_get_min_page_size(iommu_mr);
1863
1864 for (addr = 0; addr < memory_region_size(mr); addr += granularity) {
1865 iotlb = imrc->translate(iommu_mr, addr, IOMMU_NONE, n->iommu_idx);
1866 if (iotlb.perm != IOMMU_NONE) {
1867 n->notify(n, &iotlb);
1868 }
1869
1870 /* if (2^64 - MR size) < granularity, it's possible to get an
1871 * infinite loop here. This should catch such a wraparound */
1872 if ((addr + granularity) < addr) {
1873 break;
1874 }
1875 }
1876 }
1877
1878 void memory_region_unregister_iommu_notifier(MemoryRegion *mr,
1879 IOMMUNotifier *n)
1880 {
1881 IOMMUMemoryRegion *iommu_mr;
1882
1883 if (mr->alias) {
1884 memory_region_unregister_iommu_notifier(mr->alias, n);
1885 return;
1886 }
1887 QLIST_REMOVE(n, node);
1888 iommu_mr = IOMMU_MEMORY_REGION(mr);
1889 memory_region_update_iommu_notify_flags(iommu_mr, NULL);
1890 }
1891
1892 void memory_region_notify_one(IOMMUNotifier *notifier,
1893 IOMMUTLBEntry *entry)
1894 {
1895 IOMMUNotifierFlag request_flags;
1896 hwaddr entry_end = entry->iova + entry->addr_mask;
1897
1898 /*
1899 * Skip the notification if the notification does not overlap
1900 * with registered range.
1901 */
1902 if (notifier->start > entry_end || notifier->end < entry->iova) {
1903 return;
1904 }
1905
1906 assert(entry->iova >= notifier->start && entry_end <= notifier->end);
1907
1908 if (entry->perm & IOMMU_RW) {
1909 request_flags = IOMMU_NOTIFIER_MAP;
1910 } else {
1911 request_flags = IOMMU_NOTIFIER_UNMAP;
1912 }
1913
1914 if (notifier->notifier_flags & request_flags) {
1915 notifier->notify(notifier, entry);
1916 }
1917 }
1918
1919 void memory_region_notify_iommu(IOMMUMemoryRegion *iommu_mr,
1920 int iommu_idx,
1921 IOMMUTLBEntry entry)
1922 {
1923 IOMMUNotifier *iommu_notifier;
1924
1925 assert(memory_region_is_iommu(MEMORY_REGION(iommu_mr)));
1926
1927 IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
1928 if (iommu_notifier->iommu_idx == iommu_idx) {
1929 memory_region_notify_one(iommu_notifier, &entry);
1930 }
1931 }
1932 }
1933
1934 int memory_region_iommu_get_attr(IOMMUMemoryRegion *iommu_mr,
1935 enum IOMMUMemoryRegionAttr attr,
1936 void *data)
1937 {
1938 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1939
1940 if (!imrc->get_attr) {
1941 return -EINVAL;
1942 }
1943
1944 return imrc->get_attr(iommu_mr, attr, data);
1945 }
1946
1947 int memory_region_iommu_attrs_to_index(IOMMUMemoryRegion *iommu_mr,
1948 MemTxAttrs attrs)
1949 {
1950 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1951
1952 if (!imrc->attrs_to_index) {
1953 return 0;
1954 }
1955
1956 return imrc->attrs_to_index(iommu_mr, attrs);
1957 }
1958
1959 int memory_region_iommu_num_indexes(IOMMUMemoryRegion *iommu_mr)
1960 {
1961 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1962
1963 if (!imrc->num_indexes) {
1964 return 1;
1965 }
1966
1967 return imrc->num_indexes(iommu_mr);
1968 }
1969
1970 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1971 {
1972 uint8_t mask = 1 << client;
1973 uint8_t old_logging;
1974
1975 assert(client == DIRTY_MEMORY_VGA);
1976 old_logging = mr->vga_logging_count;
1977 mr->vga_logging_count += log ? 1 : -1;
1978 if (!!old_logging == !!mr->vga_logging_count) {
1979 return;
1980 }
1981
1982 memory_region_transaction_begin();
1983 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1984 memory_region_update_pending |= mr->enabled;
1985 memory_region_transaction_commit();
1986 }
1987
1988 void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1989 hwaddr size)
1990 {
1991 assert(mr->ram_block);
1992 cpu_physical_memory_set_dirty_range(memory_region_get_ram_addr(mr) + addr,
1993 size,
1994 memory_region_get_dirty_log_mask(mr));
1995 }
1996
1997 static void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1998 {
1999 MemoryListener *listener;
2000 AddressSpace *as;
2001 FlatView *view;
2002 FlatRange *fr;
2003
2004 /* If the same address space has multiple log_sync listeners, we
2005 * visit that address space's FlatView multiple times. But because
2006 * log_sync listeners are rare, it's still cheaper than walking each
2007 * address space once.
2008 */
2009 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2010 if (!listener->log_sync) {
2011 continue;
2012 }
2013 as = listener->address_space;
2014 view = address_space_get_flatview(as);
2015 FOR_EACH_FLAT_RANGE(fr, view) {
2016 if (fr->dirty_log_mask && (!mr || fr->mr == mr)) {
2017 MemoryRegionSection mrs = section_from_flat_range(fr, view);
2018 listener->log_sync(listener, &mrs);
2019 }
2020 }
2021 flatview_unref(view);
2022 }
2023 }
2024
2025 void memory_region_clear_dirty_bitmap(MemoryRegion *mr, hwaddr start,
2026 hwaddr len)
2027 {
2028 MemoryRegionSection mrs;
2029 MemoryListener *listener;
2030 AddressSpace *as;
2031 FlatView *view;
2032 FlatRange *fr;
2033 hwaddr sec_start, sec_end, sec_size;
2034
2035 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2036 if (!listener->log_clear) {
2037 continue;
2038 }
2039 as = listener->address_space;
2040 view = address_space_get_flatview(as);
2041 FOR_EACH_FLAT_RANGE(fr, view) {
2042 if (!fr->dirty_log_mask || fr->mr != mr) {
2043 /*
2044 * Clear dirty bitmap operation only applies to those
2045 * regions whose dirty logging is at least enabled
2046 */
2047 continue;
2048 }
2049
2050 mrs = section_from_flat_range(fr, view);
2051
2052 sec_start = MAX(mrs.offset_within_region, start);
2053 sec_end = mrs.offset_within_region + int128_get64(mrs.size);
2054 sec_end = MIN(sec_end, start + len);
2055
2056 if (sec_start >= sec_end) {
2057 /*
2058 * If this memory region section has no intersection
2059 * with the requested range, skip.
2060 */
2061 continue;
2062 }
2063
2064 /* Valid case; shrink the section if needed */
2065 mrs.offset_within_address_space +=
2066 sec_start - mrs.offset_within_region;
2067 mrs.offset_within_region = sec_start;
2068 sec_size = sec_end - sec_start;
2069 mrs.size = int128_make64(sec_size);
2070 listener->log_clear(listener, &mrs);
2071 }
2072 flatview_unref(view);
2073 }
2074 }
2075
2076 DirtyBitmapSnapshot *memory_region_snapshot_and_clear_dirty(MemoryRegion *mr,
2077 hwaddr addr,
2078 hwaddr size,
2079 unsigned client)
2080 {
2081 DirtyBitmapSnapshot *snapshot;
2082 assert(mr->ram_block);
2083 memory_region_sync_dirty_bitmap(mr);
2084 snapshot = cpu_physical_memory_snapshot_and_clear_dirty(mr, addr, size, client);
2085 memory_global_after_dirty_log_sync();
2086 return snapshot;
2087 }
2088
2089 bool memory_region_snapshot_get_dirty(MemoryRegion *mr, DirtyBitmapSnapshot *snap,
2090 hwaddr addr, hwaddr size)
2091 {
2092 assert(mr->ram_block);
2093 return cpu_physical_memory_snapshot_get_dirty(snap,
2094 memory_region_get_ram_addr(mr) + addr, size);
2095 }
2096
2097 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
2098 {
2099 if (mr->readonly != readonly) {
2100 memory_region_transaction_begin();
2101 mr->readonly = readonly;
2102 memory_region_update_pending |= mr->enabled;
2103 memory_region_transaction_commit();
2104 }
2105 }
2106
2107 void memory_region_set_nonvolatile(MemoryRegion *mr, bool nonvolatile)
2108 {
2109 if (mr->nonvolatile != nonvolatile) {
2110 memory_region_transaction_begin();
2111 mr->nonvolatile = nonvolatile;
2112 memory_region_update_pending |= mr->enabled;
2113 memory_region_transaction_commit();
2114 }
2115 }
2116
2117 void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
2118 {
2119 if (mr->romd_mode != romd_mode) {
2120 memory_region_transaction_begin();
2121 mr->romd_mode = romd_mode;
2122 memory_region_update_pending |= mr->enabled;
2123 memory_region_transaction_commit();
2124 }
2125 }
2126
2127 void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
2128 hwaddr size, unsigned client)
2129 {
2130 assert(mr->ram_block);
2131 cpu_physical_memory_test_and_clear_dirty(
2132 memory_region_get_ram_addr(mr) + addr, size, client);
2133 }
2134
2135 int memory_region_get_fd(MemoryRegion *mr)
2136 {
2137 int fd;
2138
2139 RCU_READ_LOCK_GUARD();
2140 while (mr->alias) {
2141 mr = mr->alias;
2142 }
2143 fd = mr->ram_block->fd;
2144
2145 return fd;
2146 }
2147
2148 void *memory_region_get_ram_ptr(MemoryRegion *mr)
2149 {
2150 void *ptr;
2151 uint64_t offset = 0;
2152
2153 RCU_READ_LOCK_GUARD();
2154 while (mr->alias) {
2155 offset += mr->alias_offset;
2156 mr = mr->alias;
2157 }
2158 assert(mr->ram_block);
2159 ptr = qemu_map_ram_ptr(mr->ram_block, offset);
2160
2161 return ptr;
2162 }
2163
2164 MemoryRegion *memory_region_from_host(void *ptr, ram_addr_t *offset)
2165 {
2166 RAMBlock *block;
2167
2168 block = qemu_ram_block_from_host(ptr, false, offset);
2169 if (!block) {
2170 return NULL;
2171 }
2172
2173 return block->mr;
2174 }
2175
2176 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
2177 {
2178 return mr->ram_block ? mr->ram_block->offset : RAM_ADDR_INVALID;
2179 }
2180
2181 void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp)
2182 {
2183 assert(mr->ram_block);
2184
2185 qemu_ram_resize(mr->ram_block, newsize, errp);
2186 }
2187
2188 void memory_region_msync(MemoryRegion *mr, hwaddr addr, hwaddr size)
2189 {
2190 if (mr->ram_block) {
2191 qemu_ram_msync(mr->ram_block, addr, size);
2192 }
2193 }
2194
2195 void memory_region_writeback(MemoryRegion *mr, hwaddr addr, hwaddr size)
2196 {
2197 /*
2198 * Might be extended case needed to cover
2199 * different types of memory regions
2200 */
2201 if (mr->dirty_log_mask) {
2202 memory_region_msync(mr, addr, size);
2203 }
2204 }
2205
2206 /*
2207 * Call proper memory listeners about the change on the newly
2208 * added/removed CoalescedMemoryRange.
2209 */
2210 static void memory_region_update_coalesced_range(MemoryRegion *mr,
2211 CoalescedMemoryRange *cmr,
2212 bool add)
2213 {
2214 AddressSpace *as;
2215 FlatView *view;
2216 FlatRange *fr;
2217
2218 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2219 view = address_space_get_flatview(as);
2220 FOR_EACH_FLAT_RANGE(fr, view) {
2221 if (fr->mr == mr) {
2222 flat_range_coalesced_io_notify(fr, as, cmr, add);
2223 }
2224 }
2225 flatview_unref(view);
2226 }
2227 }
2228
2229 void memory_region_set_coalescing(MemoryRegion *mr)
2230 {
2231 memory_region_clear_coalescing(mr);
2232 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
2233 }
2234
2235 void memory_region_add_coalescing(MemoryRegion *mr,
2236 hwaddr offset,
2237 uint64_t size)
2238 {
2239 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
2240
2241 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
2242 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
2243 memory_region_update_coalesced_range(mr, cmr, true);
2244 memory_region_set_flush_coalesced(mr);
2245 }
2246
2247 void memory_region_clear_coalescing(MemoryRegion *mr)
2248 {
2249 CoalescedMemoryRange *cmr;
2250
2251 if (QTAILQ_EMPTY(&mr->coalesced)) {
2252 return;
2253 }
2254
2255 qemu_flush_coalesced_mmio_buffer();
2256 mr->flush_coalesced_mmio = false;
2257
2258 while (!QTAILQ_EMPTY(&mr->coalesced)) {
2259 cmr = QTAILQ_FIRST(&mr->coalesced);
2260 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
2261 memory_region_update_coalesced_range(mr, cmr, false);
2262 g_free(cmr);
2263 }
2264 }
2265
2266 void memory_region_set_flush_coalesced(MemoryRegion *mr)
2267 {
2268 mr->flush_coalesced_mmio = true;
2269 }
2270
2271 void memory_region_clear_flush_coalesced(MemoryRegion *mr)
2272 {
2273 qemu_flush_coalesced_mmio_buffer();
2274 if (QTAILQ_EMPTY(&mr->coalesced)) {
2275 mr->flush_coalesced_mmio = false;
2276 }
2277 }
2278
2279 static bool userspace_eventfd_warning;
2280
2281 void memory_region_add_eventfd(MemoryRegion *mr,
2282 hwaddr addr,
2283 unsigned size,
2284 bool match_data,
2285 uint64_t data,
2286 EventNotifier *e)
2287 {
2288 MemoryRegionIoeventfd mrfd = {
2289 .addr.start = int128_make64(addr),
2290 .addr.size = int128_make64(size),
2291 .match_data = match_data,
2292 .data = data,
2293 .e = e,
2294 };
2295 unsigned i;
2296
2297 if (kvm_enabled() && (!(kvm_eventfds_enabled() ||
2298 userspace_eventfd_warning))) {
2299 userspace_eventfd_warning = true;
2300 error_report("Using eventfd without MMIO binding in KVM. "
2301 "Suboptimal performance expected");
2302 }
2303
2304 if (size) {
2305 adjust_endianness(mr, &mrfd.data, size_memop(size) | MO_TE);
2306 }
2307 memory_region_transaction_begin();
2308 for (i = 0; i < mr->ioeventfd_nb; ++i) {
2309 if (memory_region_ioeventfd_before(&mrfd, &mr->ioeventfds[i])) {
2310 break;
2311 }
2312 }
2313 ++mr->ioeventfd_nb;
2314 mr->ioeventfds = g_realloc(mr->ioeventfds,
2315 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
2316 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
2317 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
2318 mr->ioeventfds[i] = mrfd;
2319 ioeventfd_update_pending |= mr->enabled;
2320 memory_region_transaction_commit();
2321 }
2322
2323 void memory_region_del_eventfd(MemoryRegion *mr,
2324 hwaddr addr,
2325 unsigned size,
2326 bool match_data,
2327 uint64_t data,
2328 EventNotifier *e)
2329 {
2330 MemoryRegionIoeventfd mrfd = {
2331 .addr.start = int128_make64(addr),
2332 .addr.size = int128_make64(size),
2333 .match_data = match_data,
2334 .data = data,
2335 .e = e,
2336 };
2337 unsigned i;
2338
2339 if (size) {
2340 adjust_endianness(mr, &mrfd.data, size_memop(size) | MO_TE);
2341 }
2342 memory_region_transaction_begin();
2343 for (i = 0; i < mr->ioeventfd_nb; ++i) {
2344 if (memory_region_ioeventfd_equal(&mrfd, &mr->ioeventfds[i])) {
2345 break;
2346 }
2347 }
2348 assert(i != mr->ioeventfd_nb);
2349 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
2350 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
2351 --mr->ioeventfd_nb;
2352 mr->ioeventfds = g_realloc(mr->ioeventfds,
2353 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
2354 ioeventfd_update_pending |= mr->enabled;
2355 memory_region_transaction_commit();
2356 }
2357
2358 static void memory_region_update_container_subregions(MemoryRegion *subregion)
2359 {
2360 MemoryRegion *mr = subregion->container;
2361 MemoryRegion *other;
2362
2363 memory_region_transaction_begin();
2364
2365 memory_region_ref(subregion);
2366 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
2367 if (subregion->priority >= other->priority) {
2368 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
2369 goto done;
2370 }
2371 }
2372 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
2373 done:
2374 memory_region_update_pending |= mr->enabled && subregion->enabled;
2375 memory_region_transaction_commit();
2376 }
2377
2378 static void memory_region_add_subregion_common(MemoryRegion *mr,
2379 hwaddr offset,
2380 MemoryRegion *subregion)
2381 {
2382 assert(!subregion->container);
2383 subregion->container = mr;
2384 subregion->addr = offset;
2385 memory_region_update_container_subregions(subregion);
2386 }
2387
2388 void memory_region_add_subregion(MemoryRegion *mr,
2389 hwaddr offset,
2390 MemoryRegion *subregion)
2391 {
2392 subregion->priority = 0;
2393 memory_region_add_subregion_common(mr, offset, subregion);
2394 }
2395
2396 void memory_region_add_subregion_overlap(MemoryRegion *mr,
2397 hwaddr offset,
2398 MemoryRegion *subregion,
2399 int priority)
2400 {
2401 subregion->priority = priority;
2402 memory_region_add_subregion_common(mr, offset, subregion);
2403 }
2404
2405 void memory_region_del_subregion(MemoryRegion *mr,
2406 MemoryRegion *subregion)
2407 {
2408 memory_region_transaction_begin();
2409 assert(subregion->container == mr);
2410 subregion->container = NULL;
2411 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
2412 memory_region_unref(subregion);
2413 memory_region_update_pending |= mr->enabled && subregion->enabled;
2414 memory_region_transaction_commit();
2415 }
2416
2417 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
2418 {
2419 if (enabled == mr->enabled) {
2420 return;
2421 }
2422 memory_region_transaction_begin();
2423 mr->enabled = enabled;
2424 memory_region_update_pending = true;
2425 memory_region_transaction_commit();
2426 }
2427
2428 void memory_region_set_size(MemoryRegion *mr, uint64_t size)
2429 {
2430 Int128 s = int128_make64(size);
2431
2432 if (size == UINT64_MAX) {
2433 s = int128_2_64();
2434 }
2435 if (int128_eq(s, mr->size)) {
2436 return;
2437 }
2438 memory_region_transaction_begin();
2439 mr->size = s;
2440 memory_region_update_pending = true;
2441 memory_region_transaction_commit();
2442 }
2443
2444 static void memory_region_readd_subregion(MemoryRegion *mr)
2445 {
2446 MemoryRegion *container = mr->container;
2447
2448 if (container) {
2449 memory_region_transaction_begin();
2450 memory_region_ref(mr);
2451 memory_region_del_subregion(container, mr);
2452 mr->container = container;
2453 memory_region_update_container_subregions(mr);
2454 memory_region_unref(mr);
2455 memory_region_transaction_commit();
2456 }
2457 }
2458
2459 void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
2460 {
2461 if (addr != mr->addr) {
2462 mr->addr = addr;
2463 memory_region_readd_subregion(mr);
2464 }
2465 }
2466
2467 void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
2468 {
2469 assert(mr->alias);
2470
2471 if (offset == mr->alias_offset) {
2472 return;
2473 }
2474
2475 memory_region_transaction_begin();
2476 mr->alias_offset = offset;
2477 memory_region_update_pending |= mr->enabled;
2478 memory_region_transaction_commit();
2479 }
2480
2481 uint64_t memory_region_get_alignment(const MemoryRegion *mr)
2482 {
2483 return mr->align;
2484 }
2485
2486 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
2487 {
2488 const AddrRange *addr = addr_;
2489 const FlatRange *fr = fr_;
2490
2491 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
2492 return -1;
2493 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
2494 return 1;
2495 }
2496 return 0;
2497 }
2498
2499 static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
2500 {
2501 return bsearch(&addr, view->ranges, view->nr,
2502 sizeof(FlatRange), cmp_flatrange_addr);
2503 }
2504
2505 bool memory_region_is_mapped(MemoryRegion *mr)
2506 {
2507 return mr->container ? true : false;
2508 }
2509
2510 /* Same as memory_region_find, but it does not add a reference to the
2511 * returned region. It must be called from an RCU critical section.
2512 */
2513 static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr,
2514 hwaddr addr, uint64_t size)
2515 {
2516 MemoryRegionSection ret = { .mr = NULL };
2517 MemoryRegion *root;
2518 AddressSpace *as;
2519 AddrRange range;
2520 FlatView *view;
2521 FlatRange *fr;
2522
2523 addr += mr->addr;
2524 for (root = mr; root->container; ) {
2525 root = root->container;
2526 addr += root->addr;
2527 }
2528
2529 as = memory_region_to_address_space(root);
2530 if (!as) {
2531 return ret;
2532 }
2533 range = addrrange_make(int128_make64(addr), int128_make64(size));
2534
2535 view = address_space_to_flatview(as);
2536 fr = flatview_lookup(view, range);
2537 if (!fr) {
2538 return ret;
2539 }
2540
2541 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
2542 --fr;
2543 }
2544
2545 ret.mr = fr->mr;
2546 ret.fv = view;
2547 range = addrrange_intersection(range, fr->addr);
2548 ret.offset_within_region = fr->offset_in_region;
2549 ret.offset_within_region += int128_get64(int128_sub(range.start,
2550 fr->addr.start));
2551 ret.size = range.size;
2552 ret.offset_within_address_space = int128_get64(range.start);
2553 ret.readonly = fr->readonly;
2554 ret.nonvolatile = fr->nonvolatile;
2555 return ret;
2556 }
2557
2558 MemoryRegionSection memory_region_find(MemoryRegion *mr,
2559 hwaddr addr, uint64_t size)
2560 {
2561 MemoryRegionSection ret;
2562 RCU_READ_LOCK_GUARD();
2563 ret = memory_region_find_rcu(mr, addr, size);
2564 if (ret.mr) {
2565 memory_region_ref(ret.mr);
2566 }
2567 return ret;
2568 }
2569
2570 bool memory_region_present(MemoryRegion *container, hwaddr addr)
2571 {
2572 MemoryRegion *mr;
2573
2574 RCU_READ_LOCK_GUARD();
2575 mr = memory_region_find_rcu(container, addr, 1).mr;
2576 return mr && mr != container;
2577 }
2578
2579 void memory_global_dirty_log_sync(void)
2580 {
2581 memory_region_sync_dirty_bitmap(NULL);
2582 }
2583
2584 void memory_global_after_dirty_log_sync(void)
2585 {
2586 MEMORY_LISTENER_CALL_GLOBAL(log_global_after_sync, Forward);
2587 }
2588
2589 static VMChangeStateEntry *vmstate_change;
2590
2591 void memory_global_dirty_log_start(void)
2592 {
2593 if (vmstate_change) {
2594 qemu_del_vm_change_state_handler(vmstate_change);
2595 vmstate_change = NULL;
2596 }
2597
2598 global_dirty_log = true;
2599
2600 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
2601
2602 /* Refresh DIRTY_MEMORY_MIGRATION bit. */
2603 memory_region_transaction_begin();
2604 memory_region_update_pending = true;
2605 memory_region_transaction_commit();
2606 }
2607
2608 static void memory_global_dirty_log_do_stop(void)
2609 {
2610 global_dirty_log = false;
2611
2612 /* Refresh DIRTY_MEMORY_MIGRATION bit. */
2613 memory_region_transaction_begin();
2614 memory_region_update_pending = true;
2615 memory_region_transaction_commit();
2616
2617 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
2618 }
2619
2620 static void memory_vm_change_state_handler(void *opaque, int running,
2621 RunState state)
2622 {
2623 if (running) {
2624 memory_global_dirty_log_do_stop();
2625
2626 if (vmstate_change) {
2627 qemu_del_vm_change_state_handler(vmstate_change);
2628 vmstate_change = NULL;
2629 }
2630 }
2631 }
2632
2633 void memory_global_dirty_log_stop(void)
2634 {
2635 if (!runstate_is_running()) {
2636 if (vmstate_change) {
2637 return;
2638 }
2639 vmstate_change = qemu_add_vm_change_state_handler(
2640 memory_vm_change_state_handler, NULL);
2641 return;
2642 }
2643
2644 memory_global_dirty_log_do_stop();
2645 }
2646
2647 static void listener_add_address_space(MemoryListener *listener,
2648 AddressSpace *as)
2649 {
2650 FlatView *view;
2651 FlatRange *fr;
2652
2653 if (listener->begin) {
2654 listener->begin(listener);
2655 }
2656 if (global_dirty_log) {
2657 if (listener->log_global_start) {
2658 listener->log_global_start(listener);
2659 }
2660 }
2661
2662 view = address_space_get_flatview(as);
2663 FOR_EACH_FLAT_RANGE(fr, view) {
2664 MemoryRegionSection section = section_from_flat_range(fr, view);
2665
2666 if (listener->region_add) {
2667 listener->region_add(listener, &section);
2668 }
2669 if (fr->dirty_log_mask && listener->log_start) {
2670 listener->log_start(listener, &section, 0, fr->dirty_log_mask);
2671 }
2672 }
2673 if (listener->commit) {
2674 listener->commit(listener);
2675 }
2676 flatview_unref(view);
2677 }
2678
2679 static void listener_del_address_space(MemoryListener *listener,
2680 AddressSpace *as)
2681 {
2682 FlatView *view;
2683 FlatRange *fr;
2684
2685 if (listener->begin) {
2686 listener->begin(listener);
2687 }
2688 view = address_space_get_flatview(as);
2689 FOR_EACH_FLAT_RANGE(fr, view) {
2690 MemoryRegionSection section = section_from_flat_range(fr, view);
2691
2692 if (fr->dirty_log_mask && listener->log_stop) {
2693 listener->log_stop(listener, &section, fr->dirty_log_mask, 0);
2694 }
2695 if (listener->region_del) {
2696 listener->region_del(listener, &section);
2697 }
2698 }
2699 if (listener->commit) {
2700 listener->commit(listener);
2701 }
2702 flatview_unref(view);
2703 }
2704
2705 void memory_listener_register(MemoryListener *listener, AddressSpace *as)
2706 {
2707 MemoryListener *other = NULL;
2708
2709 listener->address_space = as;
2710 if (QTAILQ_EMPTY(&memory_listeners)
2711 || listener->priority >= QTAILQ_LAST(&memory_listeners)->priority) {
2712 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
2713 } else {
2714 QTAILQ_FOREACH(other, &memory_listeners, link) {
2715 if (listener->priority < other->priority) {
2716 break;
2717 }
2718 }
2719 QTAILQ_INSERT_BEFORE(other, listener, link);
2720 }
2721
2722 if (QTAILQ_EMPTY(&as->listeners)
2723 || listener->priority >= QTAILQ_LAST(&as->listeners)->priority) {
2724 QTAILQ_INSERT_TAIL(&as->listeners, listener, link_as);
2725 } else {
2726 QTAILQ_FOREACH(other, &as->listeners, link_as) {
2727 if (listener->priority < other->priority) {
2728 break;
2729 }
2730 }
2731 QTAILQ_INSERT_BEFORE(other, listener, link_as);
2732 }
2733
2734 listener_add_address_space(listener, as);
2735 }
2736
2737 void memory_listener_unregister(MemoryListener *listener)
2738 {
2739 if (!listener->address_space) {
2740 return;
2741 }
2742
2743 listener_del_address_space(listener, listener->address_space);
2744 QTAILQ_REMOVE(&memory_listeners, listener, link);
2745 QTAILQ_REMOVE(&listener->address_space->listeners, listener, link_as);
2746 listener->address_space = NULL;
2747 }
2748
2749 void address_space_remove_listeners(AddressSpace *as)
2750 {
2751 while (!QTAILQ_EMPTY(&as->listeners)) {
2752 memory_listener_unregister(QTAILQ_FIRST(&as->listeners));
2753 }
2754 }
2755
2756 void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
2757 {
2758 memory_region_ref(root);
2759 as->root = root;
2760 as->current_map = NULL;
2761 as->ioeventfd_nb = 0;
2762 as->ioeventfds = NULL;
2763 QTAILQ_INIT(&as->listeners);
2764 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
2765 as->name = g_strdup(name ? name : "anonymous");
2766 address_space_update_topology(as);
2767 address_space_update_ioeventfds(as);
2768 }
2769
2770 static void do_address_space_destroy(AddressSpace *as)
2771 {
2772 assert(QTAILQ_EMPTY(&as->listeners));
2773
2774 flatview_unref(as->current_map);
2775 g_free(as->name);
2776 g_free(as->ioeventfds);
2777 memory_region_unref(as->root);
2778 }
2779
2780 void address_space_destroy(AddressSpace *as)
2781 {
2782 MemoryRegion *root = as->root;
2783
2784 /* Flush out anything from MemoryListeners listening in on this */
2785 memory_region_transaction_begin();
2786 as->root = NULL;
2787 memory_region_transaction_commit();
2788 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
2789
2790 /* At this point, as->dispatch and as->current_map are dummy
2791 * entries that the guest should never use. Wait for the old
2792 * values to expire before freeing the data.
2793 */
2794 as->root = root;
2795 call_rcu(as, do_address_space_destroy, rcu);
2796 }
2797
2798 static const char *memory_region_type(MemoryRegion *mr)
2799 {
2800 if (mr->alias) {
2801 return memory_region_type(mr->alias);
2802 }
2803 if (memory_region_is_ram_device(mr)) {
2804 return "ramd";
2805 } else if (memory_region_is_romd(mr)) {
2806 return "romd";
2807 } else if (memory_region_is_rom(mr)) {
2808 return "rom";
2809 } else if (memory_region_is_ram(mr)) {
2810 return "ram";
2811 } else {
2812 return "i/o";
2813 }
2814 }
2815
2816 typedef struct MemoryRegionList MemoryRegionList;
2817
2818 struct MemoryRegionList {
2819 const MemoryRegion *mr;
2820 QTAILQ_ENTRY(MemoryRegionList) mrqueue;
2821 };
2822
2823 typedef QTAILQ_HEAD(, MemoryRegionList) MemoryRegionListHead;
2824
2825 #define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \
2826 int128_sub((size), int128_one())) : 0)
2827 #define MTREE_INDENT " "
2828
2829 static void mtree_expand_owner(const char *label, Object *obj)
2830 {
2831 DeviceState *dev = (DeviceState *) object_dynamic_cast(obj, TYPE_DEVICE);
2832
2833 qemu_printf(" %s:{%s", label, dev ? "dev" : "obj");
2834 if (dev && dev->id) {
2835 qemu_printf(" id=%s", dev->id);
2836 } else {
2837 char *canonical_path = object_get_canonical_path(obj);
2838 if (canonical_path) {
2839 qemu_printf(" path=%s", canonical_path);
2840 g_free(canonical_path);
2841 } else {
2842 qemu_printf(" type=%s", object_get_typename(obj));
2843 }
2844 }
2845 qemu_printf("}");
2846 }
2847
2848 static void mtree_print_mr_owner(const MemoryRegion *mr)
2849 {
2850 Object *owner = mr->owner;
2851 Object *parent = memory_region_owner((MemoryRegion *)mr);
2852
2853 if (!owner && !parent) {
2854 qemu_printf(" orphan");
2855 return;
2856 }
2857 if (owner) {
2858 mtree_expand_owner("owner", owner);
2859 }
2860 if (parent && parent != owner) {
2861 mtree_expand_owner("parent", parent);
2862 }
2863 }
2864
2865 static void mtree_print_mr(const MemoryRegion *mr, unsigned int level,
2866 hwaddr base,
2867 MemoryRegionListHead *alias_print_queue,
2868 bool owner, bool display_disabled)
2869 {
2870 MemoryRegionList *new_ml, *ml, *next_ml;
2871 MemoryRegionListHead submr_print_queue;
2872 const MemoryRegion *submr;
2873 unsigned int i;
2874 hwaddr cur_start, cur_end;
2875
2876 if (!mr) {
2877 return;
2878 }
2879
2880 cur_start = base + mr->addr;
2881 cur_end = cur_start + MR_SIZE(mr->size);
2882
2883 /*
2884 * Try to detect overflow of memory region. This should never
2885 * happen normally. When it happens, we dump something to warn the
2886 * user who is observing this.
2887 */
2888 if (cur_start < base || cur_end < cur_start) {
2889 qemu_printf("[DETECTED OVERFLOW!] ");
2890 }
2891
2892 if (mr->alias) {
2893 MemoryRegionList *ml;
2894 bool found = false;
2895
2896 /* check if the alias is already in the queue */
2897 QTAILQ_FOREACH(ml, alias_print_queue, mrqueue) {
2898 if (ml->mr == mr->alias) {
2899 found = true;
2900 }
2901 }
2902
2903 if (!found) {
2904 ml = g_new(MemoryRegionList, 1);
2905 ml->mr = mr->alias;
2906 QTAILQ_INSERT_TAIL(alias_print_queue, ml, mrqueue);
2907 }
2908 if (mr->enabled || display_disabled) {
2909 for (i = 0; i < level; i++) {
2910 qemu_printf(MTREE_INDENT);
2911 }
2912 qemu_printf(TARGET_FMT_plx "-" TARGET_FMT_plx
2913 " (prio %d, %s%s): alias %s @%s " TARGET_FMT_plx
2914 "-" TARGET_FMT_plx "%s",
2915 cur_start, cur_end,
2916 mr->priority,
2917 mr->nonvolatile ? "nv-" : "",
2918 memory_region_type((MemoryRegion *)mr),
2919 memory_region_name(mr),
2920 memory_region_name(mr->alias),
2921 mr->alias_offset,
2922 mr->alias_offset + MR_SIZE(mr->size),
2923 mr->enabled ? "" : " [disabled]");
2924 if (owner) {
2925 mtree_print_mr_owner(mr);
2926 }
2927 qemu_printf("\n");
2928 }
2929 } else {
2930 if (mr->enabled || display_disabled) {
2931 for (i = 0; i < level; i++) {
2932 qemu_printf(MTREE_INDENT);
2933 }
2934 qemu_printf(TARGET_FMT_plx "-" TARGET_FMT_plx
2935 " (prio %d, %s%s): %s%s",
2936 cur_start, cur_end,
2937 mr->priority,
2938 mr->nonvolatile ? "nv-" : "",
2939 memory_region_type((MemoryRegion *)mr),
2940 memory_region_name(mr),
2941 mr->enabled ? "" : " [disabled]");
2942 if (owner) {
2943 mtree_print_mr_owner(mr);
2944 }
2945 qemu_printf("\n");
2946 }
2947 }
2948
2949 QTAILQ_INIT(&submr_print_queue);
2950
2951 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
2952 new_ml = g_new(MemoryRegionList, 1);
2953 new_ml->mr = submr;
2954 QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
2955 if (new_ml->mr->addr < ml->mr->addr ||
2956 (new_ml->mr->addr == ml->mr->addr &&
2957 new_ml->mr->priority > ml->mr->priority)) {
2958 QTAILQ_INSERT_BEFORE(ml, new_ml, mrqueue);
2959 new_ml = NULL;
2960 break;
2961 }
2962 }
2963 if (new_ml) {
2964 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, mrqueue);
2965 }
2966 }
2967
2968 QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
2969 mtree_print_mr(ml->mr, level + 1, cur_start,
2970 alias_print_queue, owner, display_disabled);
2971 }
2972
2973 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, mrqueue, next_ml) {
2974 g_free(ml);
2975 }
2976 }
2977
2978 struct FlatViewInfo {
2979 int counter;
2980 bool dispatch_tree;
2981 bool owner;
2982 AccelClass *ac;
2983 };
2984
2985 static void mtree_print_flatview(gpointer key, gpointer value,
2986 gpointer user_data)
2987 {
2988 FlatView *view = key;
2989 GArray *fv_address_spaces = value;
2990 struct FlatViewInfo *fvi = user_data;
2991 FlatRange *range = &view->ranges[0];
2992 MemoryRegion *mr;
2993 int n = view->nr;
2994 int i;
2995 AddressSpace *as;
2996
2997 qemu_printf("FlatView #%d\n", fvi->counter);
2998 ++fvi->counter;
2999
3000 for (i = 0; i < fv_address_spaces->len; ++i) {
3001 as = g_array_index(fv_address_spaces, AddressSpace*, i);
3002 qemu_printf(" AS \"%s\", root: %s",
3003 as->name, memory_region_name(as->root));
3004 if (as->root->alias) {
3005 qemu_printf(", alias %s", memory_region_name(as->root->alias));
3006 }
3007 qemu_printf("\n");
3008 }
3009
3010 qemu_printf(" Root memory region: %s\n",
3011 view->root ? memory_region_name(view->root) : "(none)");
3012
3013 if (n <= 0) {
3014 qemu_printf(MTREE_INDENT "No rendered FlatView\n\n");
3015 return;
3016 }
3017
3018 while (n--) {
3019 mr = range->mr;
3020 if (range->offset_in_region) {
3021 qemu_printf(MTREE_INDENT TARGET_FMT_plx "-" TARGET_FMT_plx
3022 " (prio %d, %s%s): %s @" TARGET_FMT_plx,
3023 int128_get64(range->addr.start),
3024 int128_get64(range->addr.start)
3025 + MR_SIZE(range->addr.size),
3026 mr->priority,
3027 range->nonvolatile ? "nv-" : "",
3028 range->readonly ? "rom" : memory_region_type(mr),
3029 memory_region_name(mr),
3030 range->offset_in_region);
3031 } else {
3032 qemu_printf(MTREE_INDENT TARGET_FMT_plx "-" TARGET_FMT_plx
3033 " (prio %d, %s%s): %s",
3034 int128_get64(range->addr.start),
3035 int128_get64(range->addr.start)
3036 + MR_SIZE(range->addr.size),
3037 mr->priority,
3038 range->nonvolatile ? "nv-" : "",
3039 range->readonly ? "rom" : memory_region_type(mr),
3040 memory_region_name(mr));
3041 }
3042 if (fvi->owner) {
3043 mtree_print_mr_owner(mr);
3044 }
3045
3046 if (fvi->ac) {
3047 for (i = 0; i < fv_address_spaces->len; ++i) {
3048 as = g_array_index(fv_address_spaces, AddressSpace*, i);
3049 if (fvi->ac->has_memory(current_machine, as,
3050 int128_get64(range->addr.start),
3051 MR_SIZE(range->addr.size) + 1)) {
3052 qemu_printf(" %s", fvi->ac->name);
3053 }
3054 }
3055 }
3056 qemu_printf("\n");
3057 range++;
3058 }
3059
3060 #if !defined(CONFIG_USER_ONLY)
3061 if (fvi->dispatch_tree && view->root) {
3062 mtree_print_dispatch(view->dispatch, view->root);
3063 }
3064 #endif
3065
3066 qemu_printf("\n");
3067 }
3068
3069 static gboolean mtree_info_flatview_free(gpointer key, gpointer value,
3070 gpointer user_data)
3071 {
3072 FlatView *view = key;
3073 GArray *fv_address_spaces = value;
3074
3075 g_array_unref(fv_address_spaces);
3076 flatview_unref(view);
3077
3078 return true;
3079 }
3080
3081 void mtree_info(bool flatview, bool dispatch_tree, bool owner, bool disabled)
3082 {
3083 MemoryRegionListHead ml_head;
3084 MemoryRegionList *ml, *ml2;
3085 AddressSpace *as;
3086
3087 if (flatview) {
3088 FlatView *view;
3089 struct FlatViewInfo fvi = {
3090 .counter = 0,
3091 .dispatch_tree = dispatch_tree,
3092 .owner = owner,
3093 };
3094 GArray *fv_address_spaces;
3095 GHashTable *views = g_hash_table_new(g_direct_hash, g_direct_equal);
3096 AccelClass *ac = ACCEL_GET_CLASS(current_accel());
3097
3098 if (ac->has_memory) {
3099 fvi.ac = ac;
3100 }
3101
3102 /* Gather all FVs in one table */
3103 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
3104 view = address_space_get_flatview(as);
3105
3106 fv_address_spaces = g_hash_table_lookup(views, view);
3107 if (!fv_address_spaces) {
3108 fv_address_spaces = g_array_new(false, false, sizeof(as));
3109 g_hash_table_insert(views, view, fv_address_spaces);
3110 }
3111
3112 g_array_append_val(fv_address_spaces, as);
3113 }
3114
3115 /* Print */
3116 g_hash_table_foreach(views, mtree_print_flatview, &fvi);
3117
3118 /* Free */
3119 g_hash_table_foreach_remove(views, mtree_info_flatview_free, 0);
3120 g_hash_table_unref(views);
3121
3122 return;
3123 }
3124
3125 QTAILQ_INIT(&ml_head);
3126
3127 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
3128 qemu_printf("address-space: %s\n", as->name);
3129 mtree_print_mr(as->root, 1, 0, &ml_head, owner, disabled);
3130 qemu_printf("\n");
3131 }
3132
3133 /* print aliased regions */
3134 QTAILQ_FOREACH(ml, &ml_head, mrqueue) {
3135 qemu_printf("memory-region: %s\n", memory_region_name(ml->mr));
3136 mtree_print_mr(ml->mr, 1, 0, &ml_head, owner, disabled);
3137 qemu_printf("\n");
3138 }
3139
3140 QTAILQ_FOREACH_SAFE(ml, &ml_head, mrqueue, ml2) {
3141 g_free(ml);
3142 }
3143 }
3144
3145 void memory_region_init_ram(MemoryRegion *mr,
3146 struct Object *owner,
3147 const char *name,
3148 uint64_t size,
3149 Error **errp)
3150 {
3151 DeviceState *owner_dev;
3152 Error *err = NULL;
3153
3154 memory_region_init_ram_nomigrate(mr, owner, name, size, &err);
3155 if (err) {
3156 error_propagate(errp, err);
3157 return;
3158 }
3159 /* This will assert if owner is neither NULL nor a DeviceState.
3160 * We only want the owner here for the purposes of defining a
3161 * unique name for migration. TODO: Ideally we should implement
3162 * a naming scheme for Objects which are not DeviceStates, in
3163 * which case we can relax this restriction.
3164 */
3165 owner_dev = DEVICE(owner);
3166 vmstate_register_ram(mr, owner_dev);
3167 }
3168
3169 void memory_region_init_rom(MemoryRegion *mr,
3170 struct Object *owner,
3171 const char *name,
3172 uint64_t size,
3173 Error **errp)
3174 {
3175 DeviceState *owner_dev;
3176 Error *err = NULL;
3177
3178 memory_region_init_rom_nomigrate(mr, owner, name, size, &err);
3179 if (err) {
3180 error_propagate(errp, err);
3181 return;
3182 }
3183 /* This will assert if owner is neither NULL nor a DeviceState.
3184 * We only want the owner here for the purposes of defining a
3185 * unique name for migration. TODO: Ideally we should implement
3186 * a naming scheme for Objects which are not DeviceStates, in
3187 * which case we can relax this restriction.
3188 */
3189 owner_dev = DEVICE(owner);
3190 vmstate_register_ram(mr, owner_dev);
3191 }
3192
3193 void memory_region_init_rom_device(MemoryRegion *mr,
3194 struct Object *owner,
3195 const MemoryRegionOps *ops,
3196 void *opaque,
3197 const char *name,
3198 uint64_t size,
3199 Error **errp)
3200 {
3201 DeviceState *owner_dev;
3202 Error *err = NULL;
3203
3204 memory_region_init_rom_device_nomigrate(mr, owner, ops, opaque,
3205 name, size, &err);
3206 if (err) {
3207 error_propagate(errp, err);
3208 return;
3209 }
3210 /* This will assert if owner is neither NULL nor a DeviceState.
3211 * We only want the owner here for the purposes of defining a
3212 * unique name for migration. TODO: Ideally we should implement
3213 * a naming scheme for Objects which are not DeviceStates, in
3214 * which case we can relax this restriction.
3215 */
3216 owner_dev = DEVICE(owner);
3217 vmstate_register_ram(mr, owner_dev);
3218 }
3219
3220 static const TypeInfo memory_region_info = {
3221 .parent = TYPE_OBJECT,
3222 .name = TYPE_MEMORY_REGION,
3223 .class_size = sizeof(MemoryRegionClass),
3224 .instance_size = sizeof(MemoryRegion),
3225 .instance_init = memory_region_initfn,
3226 .instance_finalize = memory_region_finalize,
3227 };
3228
3229 static const TypeInfo iommu_memory_region_info = {
3230 .parent = TYPE_MEMORY_REGION,
3231 .name = TYPE_IOMMU_MEMORY_REGION,
3232 .class_size = sizeof(IOMMUMemoryRegionClass),
3233 .instance_size = sizeof(IOMMUMemoryRegion),
3234 .instance_init = iommu_memory_region_initfn,
3235 .abstract = true,
3236 };
3237
3238 static void memory_register_types(void)
3239 {
3240 type_register_static(&memory_region_info);
3241 type_register_static(&iommu_memory_region_info);
3242 }
3243
3244 type_init(memory_register_types)
AR7 emulation for QEMU