spapr: Fix error leak in spapr_realize_vcpu()
[qemu/ar7.git] / include / hw / riscv / boot.h
blob451338780a4553ffc4c0fd6d9baa751b01e1b849
1 /*
2 * QEMU RISC-V Boot Helper
4 * Copyright (c) 2017 SiFive, Inc.
5 * Copyright (c) 2019 Alistair Francis <alistair.francis@wdc.com>
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms and conditions of the GNU General Public License,
9 * version 2 or later, as published by the Free Software Foundation.
11 * This program is distributed in the hope it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
20 #ifndef RISCV_BOOT_H
21 #define RISCV_BOOT_H
23 #include "exec/cpu-defs.h"
24 #include "hw/loader.h"
26 void riscv_find_and_load_firmware(MachineState *machine,
27 const char *default_machine_firmware,
28 hwaddr firmware_load_addr,
29 symbol_fn_t sym_cb);
30 char *riscv_find_firmware(const char *firmware_filename);
31 target_ulong riscv_load_firmware(const char *firmware_filename,
32 hwaddr firmware_load_addr,
33 symbol_fn_t sym_cb);
34 target_ulong riscv_load_kernel(const char *kernel_filename,
35 symbol_fn_t sym_cb);
36 hwaddr riscv_load_initrd(const char *filename, uint64_t mem_size,
37 uint64_t kernel_entry, hwaddr *start);
38 uint32_t riscv_load_fdt(hwaddr dram_start, uint64_t dram_size, void *fdt);
39 void riscv_setup_rom_reset_vec(hwaddr saddr, hwaddr rom_base,
40 hwaddr rom_size, uint64_t kernel_entry,
41 uint32_t fdt_load_addr, void *fdt);
42 void riscv_rom_copy_firmware_info(hwaddr rom_base, hwaddr rom_size,
43 uint32_t reset_vec_size,
44 uint64_t kernel_entry);
46 #endif /* RISCV_BOOT_H */