?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
crypto: fix cipher function signature mismatch with nettle & xts
[qemu/ar7.git] / memory.c
blob68c7c567c28e384aa8e9e4be9b5829af0269936a
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "qemu/osdep.h"
17 #include "exec/memory.h"
18 #include "exec/address-spaces.h"
19 #include "exec/ioport.h"
20 #include "qapi/visitor.h"
21 #include "qemu/bitops.h"
22 #include "qemu/error-report.h"
23 #include "qom/object.h"
24 #include "trace.h"
25
26 #include "exec/memory-internal.h"
27 #include "exec/ram_addr.h"
28 #include "sysemu/kvm.h"
29 #include "sysemu/sysemu.h"
30
31 //#define DEBUG_UNASSIGNED
32
33 #define RAM_ADDR_INVALID (~(ram_addr_t)0)
34
35 static unsigned memory_region_transaction_depth;
36 static bool memory_region_update_pending;
37 static bool ioeventfd_update_pending;
38 static bool global_dirty_log = false;
39
40 static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
41 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
42
43 static QTAILQ_HEAD(, AddressSpace) address_spaces
44 = QTAILQ_HEAD_INITIALIZER(address_spaces);
45
46 typedef struct AddrRange AddrRange;
47
48 /*
49 * Note that signed integers are needed for negative offsetting in aliases
50 * (large MemoryRegion::alias_offset).
51 */
52 struct AddrRange {
53 Int128 start;
54 Int128 size;
55 };
56
57 static AddrRange addrrange_make(Int128 start, Int128 size)
58 {
59 return (AddrRange) { start, size };
60 }
61
62 static bool addrrange_equal(AddrRange r1, AddrRange r2)
63 {
64 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
65 }
66
67 static Int128 addrrange_end(AddrRange r)
68 {
69 return int128_add(r.start, r.size);
70 }
71
72 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
73 {
74 int128_addto(&range.start, delta);
75 return range;
76 }
77
78 static bool addrrange_contains(AddrRange range, Int128 addr)
79 {
80 return int128_ge(addr, range.start)
81 && int128_lt(addr, addrrange_end(range));
82 }
83
84 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
85 {
86 return addrrange_contains(r1, r2.start)
87 || addrrange_contains(r2, r1.start);
88 }
89
90 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
91 {
92 Int128 start = int128_max(r1.start, r2.start);
93 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
94 return addrrange_make(start, int128_sub(end, start));
95 }
96
97 enum ListenerDirection { Forward, Reverse };
98
99 static bool memory_listener_match(MemoryListener *listener,
100 MemoryRegionSection *section)
101 {
102 return !listener->address_space_filter
103 || listener->address_space_filter == section->address_space;
104 }
105
106 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
107 do { \
108 MemoryListener *_listener; \
109 \
110 switch (_direction) { \
111 case Forward: \
112 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
113 if (_listener->_callback) { \
114 _listener->_callback(_listener, ##_args); \
115 } \
116 } \
117 break; \
118 case Reverse: \
119 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
120 memory_listeners, link) { \
121 if (_listener->_callback) { \
122 _listener->_callback(_listener, ##_args); \
123 } \
124 } \
125 break; \
126 default: \
127 abort(); \
128 } \
129 } while (0)
130
131 #define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \
132 do { \
133 MemoryListener *_listener; \
134 \
135 switch (_direction) { \
136 case Forward: \
137 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
138 if (_listener->_callback \
139 && memory_listener_match(_listener, _section)) { \
140 _listener->_callback(_listener, _section, ##_args); \
141 } \
142 } \
143 break; \
144 case Reverse: \
145 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
146 memory_listeners, link) { \
147 if (_listener->_callback \
148 && memory_listener_match(_listener, _section)) { \
149 _listener->_callback(_listener, _section, ##_args); \
150 } \
151 } \
152 break; \
153 default: \
154 abort(); \
155 } \
156 } while (0)
157
158 /* No need to ref/unref .mr, the FlatRange keeps it alive. */
159 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...) \
160 MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \
161 .mr = (fr)->mr, \
162 .address_space = (as), \
163 .offset_within_region = (fr)->offset_in_region, \
164 .size = (fr)->addr.size, \
165 .offset_within_address_space = int128_get64((fr)->addr.start), \
166 .readonly = (fr)->readonly, \
167 }), ##_args)
168
169 struct CoalescedMemoryRange {
170 AddrRange addr;
171 QTAILQ_ENTRY(CoalescedMemoryRange) link;
172 };
173
174 struct MemoryRegionIoeventfd {
175 AddrRange addr;
176 bool match_data;
177 uint64_t data;
178 EventNotifier *e;
179 };
180
181 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
182 MemoryRegionIoeventfd b)
183 {
184 if (int128_lt(a.addr.start, b.addr.start)) {
185 return true;
186 } else if (int128_gt(a.addr.start, b.addr.start)) {
187 return false;
188 } else if (int128_lt(a.addr.size, b.addr.size)) {
189 return true;
190 } else if (int128_gt(a.addr.size, b.addr.size)) {
191 return false;
192 } else if (a.match_data < b.match_data) {
193 return true;
194 } else if (a.match_data > b.match_data) {
195 return false;
196 } else if (a.match_data) {
197 if (a.data < b.data) {
198 return true;
199 } else if (a.data > b.data) {
200 return false;
201 }
202 }
203 if (a.e < b.e) {
204 return true;
205 } else if (a.e > b.e) {
206 return false;
207 }
208 return false;
209 }
210
211 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
212 MemoryRegionIoeventfd b)
213 {
214 return !memory_region_ioeventfd_before(a, b)
215 && !memory_region_ioeventfd_before(b, a);
216 }
217
218 typedef struct FlatRange FlatRange;
219 typedef struct FlatView FlatView;
220
221 /* Range of memory in the global map. Addresses are absolute. */
222 struct FlatRange {
223 MemoryRegion *mr;
224 hwaddr offset_in_region;
225 AddrRange addr;
226 uint8_t dirty_log_mask;
227 bool romd_mode;
228 bool readonly;
229 };
230
231 /* Flattened global view of current active memory hierarchy. Kept in sorted
232 * order.
233 */
234 struct FlatView {
235 struct rcu_head rcu;
236 unsigned ref;
237 FlatRange *ranges;
238 unsigned nr;
239 unsigned nr_allocated;
240 };
241
242 typedef struct AddressSpaceOps AddressSpaceOps;
243
244 #define FOR_EACH_FLAT_RANGE(var, view) \
245 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
246
247 static bool flatrange_equal(FlatRange *a, FlatRange *b)
248 {
249 return a->mr == b->mr
250 && addrrange_equal(a->addr, b->addr)
251 && a->offset_in_region == b->offset_in_region
252 && a->romd_mode == b->romd_mode
253 && a->readonly == b->readonly;
254 }
255
256 static void flatview_init(FlatView *view)
257 {
258 view->ref = 1;
259 view->ranges = NULL;
260 view->nr = 0;
261 view->nr_allocated = 0;
262 }
263
264 /* Insert a range into a given position. Caller is responsible for maintaining
265 * sorting order.
266 */
267 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
268 {
269 if (view->nr == view->nr_allocated) {
270 view->nr_allocated = MAX(2 * view->nr, 10);
271 view->ranges = g_realloc(view->ranges,
272 view->nr_allocated * sizeof(*view->ranges));
273 }
274 memmove(view->ranges + pos + 1, view->ranges + pos,
275 (view->nr - pos) * sizeof(FlatRange));
276 view->ranges[pos] = *range;
277 memory_region_ref(range->mr);
278 ++view->nr;
279 }
280
281 static void flatview_destroy(FlatView *view)
282 {
283 int i;
284
285 for (i = 0; i < view->nr; i++) {
286 memory_region_unref(view->ranges[i].mr);
287 }
288 g_free(view->ranges);
289 g_free(view);
290 }
291
292 static void flatview_ref(FlatView *view)
293 {
294 atomic_inc(&view->ref);
295 }
296
297 static void flatview_unref(FlatView *view)
298 {
299 if (atomic_fetch_dec(&view->ref) == 1) {
300 flatview_destroy(view);
301 }
302 }
303
304 static bool can_merge(FlatRange *r1, FlatRange *r2)
305 {
306 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
307 && r1->mr == r2->mr
308 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
309 r1->addr.size),
310 int128_make64(r2->offset_in_region))
311 && r1->dirty_log_mask == r2->dirty_log_mask
312 && r1->romd_mode == r2->romd_mode
313 && r1->readonly == r2->readonly;
314 }
315
316 /* Attempt to simplify a view by merging adjacent ranges */
317 static void flatview_simplify(FlatView *view)
318 {
319 unsigned i, j;
320
321 i = 0;
322 while (i < view->nr) {
323 j = i + 1;
324 while (j < view->nr
325 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
326 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
327 ++j;
328 }
329 ++i;
330 memmove(&view->ranges[i], &view->ranges[j],
331 (view->nr - j) * sizeof(view->ranges[j]));
332 view->nr -= j - i;
333 }
334 }
335
336 static bool memory_region_big_endian(MemoryRegion *mr)
337 {
338 #ifdef TARGET_WORDS_BIGENDIAN
339 return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
340 #else
341 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
342 #endif
343 }
344
345 static bool memory_region_wrong_endianness(MemoryRegion *mr)
346 {
347 #ifdef TARGET_WORDS_BIGENDIAN
348 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
349 #else
350 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
351 #endif
352 }
353
354 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
355 {
356 if (memory_region_wrong_endianness(mr)) {
357 switch (size) {
358 case 1:
359 break;
360 case 2:
361 *data = bswap16(*data);
362 break;
363 case 4:
364 *data = bswap32(*data);
365 break;
366 case 8:
367 *data = bswap64(*data);
368 break;
369 default:
370 abort();
371 }
372 }
373 }
374
375 static hwaddr memory_region_to_absolute_addr(MemoryRegion *mr, hwaddr offset)
376 {
377 MemoryRegion *root;
378 hwaddr abs_addr = offset;
379
380 abs_addr += mr->addr;
381 for (root = mr; root->container; ) {
382 root = root->container;
383 abs_addr += root->addr;
384 }
385
386 return abs_addr;
387 }
388
389 static int get_cpu_index(void)
390 {
391 if (current_cpu) {
392 return current_cpu->cpu_index;
393 }
394 return -1;
395 }
396
397 static MemTxResult memory_region_oldmmio_read_accessor(MemoryRegion *mr,
398 hwaddr addr,
399 uint64_t *value,
400 unsigned size,
401 unsigned shift,
402 uint64_t mask,
403 MemTxAttrs attrs)
404 {
405 uint64_t tmp;
406
407 tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
408 if (mr->subpage) {
409 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
410 } else if (mr == &io_mem_notdirty) {
411 /* Accesses to code which has previously been translated into a TB show
412 * up in the MMIO path, as accesses to the io_mem_notdirty
413 * MemoryRegion. */
414 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
415 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
416 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
417 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
418 }
419 *value |= (tmp & mask) << shift;
420 return MEMTX_OK;
421 }
422
423 static MemTxResult memory_region_read_accessor(MemoryRegion *mr,
424 hwaddr addr,
425 uint64_t *value,
426 unsigned size,
427 unsigned shift,
428 uint64_t mask,
429 MemTxAttrs attrs)
430 {
431 uint64_t tmp;
432
433 tmp = mr->ops->read(mr->opaque, addr, size);
434 if (mr->subpage) {
435 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
436 } else if (mr == &io_mem_notdirty) {
437 /* Accesses to code which has previously been translated into a TB show
438 * up in the MMIO path, as accesses to the io_mem_notdirty
439 * MemoryRegion. */
440 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
441 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
442 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
443 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
444 }
445 *value |= (tmp & mask) << shift;
446 return MEMTX_OK;
447 }
448
449 static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr,
450 hwaddr addr,
451 uint64_t *value,
452 unsigned size,
453 unsigned shift,
454 uint64_t mask,
455 MemTxAttrs attrs)
456 {
457 uint64_t tmp = 0;
458 MemTxResult r;
459
460 r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs);
461 if (mr->subpage) {
462 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
463 } else if (mr == &io_mem_notdirty) {
464 /* Accesses to code which has previously been translated into a TB show
465 * up in the MMIO path, as accesses to the io_mem_notdirty
466 * MemoryRegion. */
467 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
468 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
469 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
470 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
471 }
472 *value |= (tmp & mask) << shift;
473 return r;
474 }
475
476 static MemTxResult memory_region_oldmmio_write_accessor(MemoryRegion *mr,
477 hwaddr addr,
478 uint64_t *value,
479 unsigned size,
480 unsigned shift,
481 uint64_t mask,
482 MemTxAttrs attrs)
483 {
484 uint64_t tmp;
485
486 tmp = (*value >> shift) & mask;
487 if (mr->subpage) {
488 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
489 } else if (mr == &io_mem_notdirty) {
490 /* Accesses to code which has previously been translated into a TB show
491 * up in the MMIO path, as accesses to the io_mem_notdirty
492 * MemoryRegion. */
493 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
494 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
495 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
496 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
497 }
498 mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp);
499 return MEMTX_OK;
500 }
501
502 static MemTxResult memory_region_write_accessor(MemoryRegion *mr,
503 hwaddr addr,
504 uint64_t *value,
505 unsigned size,
506 unsigned shift,
507 uint64_t mask,
508 MemTxAttrs attrs)
509 {
510 uint64_t tmp;
511
512 tmp = (*value >> shift) & mask;
513 if (mr->subpage) {
514 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
515 } else if (mr == &io_mem_notdirty) {
516 /* Accesses to code which has previously been translated into a TB show
517 * up in the MMIO path, as accesses to the io_mem_notdirty
518 * MemoryRegion. */
519 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
520 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
521 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
522 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
523 }
524 mr->ops->write(mr->opaque, addr, tmp, size);
525 return MEMTX_OK;
526 }
527
528 static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr,
529 hwaddr addr,
530 uint64_t *value,
531 unsigned size,
532 unsigned shift,
533 uint64_t mask,
534 MemTxAttrs attrs)
535 {
536 uint64_t tmp;
537
538 tmp = (*value >> shift) & mask;
539 if (mr->subpage) {
540 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
541 } else if (mr == &io_mem_notdirty) {
542 /* Accesses to code which has previously been translated into a TB show
543 * up in the MMIO path, as accesses to the io_mem_notdirty
544 * MemoryRegion. */
545 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
546 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
547 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
548 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
549 }
550 return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
551 }
552
553 static MemTxResult access_with_adjusted_size(hwaddr addr,
554 uint64_t *value,
555 unsigned size,
556 unsigned access_size_min,
557 unsigned access_size_max,
558 MemTxResult (*access)(MemoryRegion *mr,
559 hwaddr addr,
560 uint64_t *value,
561 unsigned size,
562 unsigned shift,
563 uint64_t mask,
564 MemTxAttrs attrs),
565 MemoryRegion *mr,
566 MemTxAttrs attrs)
567 {
568 uint64_t access_mask;
569 unsigned access_size;
570 unsigned i;
571 MemTxResult r = MEMTX_OK;
572
573 if (!access_size_min) {
574 access_size_min = 1;
575 }
576 if (!access_size_max) {
577 access_size_max = 4;
578 }
579
580 /* FIXME: support unaligned access? */
581 access_size = MAX(MIN(size, access_size_max), access_size_min);
582 access_mask = -1ULL >> (64 - access_size * 8);
583 if (memory_region_big_endian(mr)) {
584 for (i = 0; i < size; i += access_size) {
585 r |= access(mr, addr + i, value, access_size,
586 (size - access_size - i) * 8, access_mask, attrs);
587 }
588 } else {
589 for (i = 0; i < size; i += access_size) {
590 r |= access(mr, addr + i, value, access_size, i * 8,
591 access_mask, attrs);
592 }
593 }
594 return r;
595 }
596
597 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
598 {
599 AddressSpace *as;
600
601 while (mr->container) {
602 mr = mr->container;
603 }
604 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
605 if (mr == as->root) {
606 return as;
607 }
608 }
609 return NULL;
610 }
611
612 /* Render a memory region into the global view. Ranges in @view obscure
613 * ranges in @mr.
614 */
615 static void render_memory_region(FlatView *view,
616 MemoryRegion *mr,
617 Int128 base,
618 AddrRange clip,
619 bool readonly)
620 {
621 MemoryRegion *subregion;
622 unsigned i;
623 hwaddr offset_in_region;
624 Int128 remain;
625 Int128 now;
626 FlatRange fr;
627 AddrRange tmp;
628
629 if (!mr->enabled) {
630 return;
631 }
632
633 int128_addto(&base, int128_make64(mr->addr));
634 readonly |= mr->readonly;
635
636 tmp = addrrange_make(base, mr->size);
637
638 if (!addrrange_intersects(tmp, clip)) {
639 return;
640 }
641
642 clip = addrrange_intersection(tmp, clip);
643
644 if (mr->alias) {
645 int128_subfrom(&base, int128_make64(mr->alias->addr));
646 int128_subfrom(&base, int128_make64(mr->alias_offset));
647 render_memory_region(view, mr->alias, base, clip, readonly);
648 return;
649 }
650
651 /* Render subregions in priority order. */
652 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
653 render_memory_region(view, subregion, base, clip, readonly);
654 }
655
656 if (!mr->terminates) {
657 return;
658 }
659
660 offset_in_region = int128_get64(int128_sub(clip.start, base));
661 base = clip.start;
662 remain = clip.size;
663
664 fr.mr = mr;
665 fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr);
666 fr.romd_mode = mr->romd_mode;
667 fr.readonly = readonly;
668
669 /* Render the region itself into any gaps left by the current view. */
670 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
671 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
672 continue;
673 }
674 if (int128_lt(base, view->ranges[i].addr.start)) {
675 now = int128_min(remain,
676 int128_sub(view->ranges[i].addr.start, base));
677 fr.offset_in_region = offset_in_region;
678 fr.addr = addrrange_make(base, now);
679 flatview_insert(view, i, &fr);
680 ++i;
681 int128_addto(&base, now);
682 offset_in_region += int128_get64(now);
683 int128_subfrom(&remain, now);
684 }
685 now = int128_sub(int128_min(int128_add(base, remain),
686 addrrange_end(view->ranges[i].addr)),
687 base);
688 int128_addto(&base, now);
689 offset_in_region += int128_get64(now);
690 int128_subfrom(&remain, now);
691 }
692 if (int128_nz(remain)) {
693 fr.offset_in_region = offset_in_region;
694 fr.addr = addrrange_make(base, remain);
695 flatview_insert(view, i, &fr);
696 }
697 }
698
699 /* Render a memory topology into a list of disjoint absolute ranges. */
700 static FlatView *generate_memory_topology(MemoryRegion *mr)
701 {
702 FlatView *view;
703
704 view = g_new(FlatView, 1);
705 flatview_init(view);
706
707 if (mr) {
708 render_memory_region(view, mr, int128_zero(),
709 addrrange_make(int128_zero(), int128_2_64()), false);
710 }
711 flatview_simplify(view);
712
713 return view;
714 }
715
716 static void address_space_add_del_ioeventfds(AddressSpace *as,
717 MemoryRegionIoeventfd *fds_new,
718 unsigned fds_new_nb,
719 MemoryRegionIoeventfd *fds_old,
720 unsigned fds_old_nb)
721 {
722 unsigned iold, inew;
723 MemoryRegionIoeventfd *fd;
724 MemoryRegionSection section;
725
726 /* Generate a symmetric difference of the old and new fd sets, adding
727 * and deleting as necessary.
728 */
729
730 iold = inew = 0;
731 while (iold < fds_old_nb || inew < fds_new_nb) {
732 if (iold < fds_old_nb
733 && (inew == fds_new_nb
734 || memory_region_ioeventfd_before(fds_old[iold],
735 fds_new[inew]))) {
736 fd = &fds_old[iold];
737 section = (MemoryRegionSection) {
738 .address_space = as,
739 .offset_within_address_space = int128_get64(fd->addr.start),
740 .size = fd->addr.size,
741 };
742 MEMORY_LISTENER_CALL(eventfd_del, Forward, &section,
743 fd->match_data, fd->data, fd->e);
744 ++iold;
745 } else if (inew < fds_new_nb
746 && (iold == fds_old_nb
747 || memory_region_ioeventfd_before(fds_new[inew],
748 fds_old[iold]))) {
749 fd = &fds_new[inew];
750 section = (MemoryRegionSection) {
751 .address_space = as,
752 .offset_within_address_space = int128_get64(fd->addr.start),
753 .size = fd->addr.size,
754 };
755 MEMORY_LISTENER_CALL(eventfd_add, Reverse, &section,
756 fd->match_data, fd->data, fd->e);
757 ++inew;
758 } else {
759 ++iold;
760 ++inew;
761 }
762 }
763 }
764
765 static FlatView *address_space_get_flatview(AddressSpace *as)
766 {
767 FlatView *view;
768
769 rcu_read_lock();
770 view = atomic_rcu_read(&as->current_map);
771 flatview_ref(view);
772 rcu_read_unlock();
773 return view;
774 }
775
776 static void address_space_update_ioeventfds(AddressSpace *as)
777 {
778 FlatView *view;
779 FlatRange *fr;
780 unsigned ioeventfd_nb = 0;
781 MemoryRegionIoeventfd *ioeventfds = NULL;
782 AddrRange tmp;
783 unsigned i;
784
785 view = address_space_get_flatview(as);
786 FOR_EACH_FLAT_RANGE(fr, view) {
787 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
788 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
789 int128_sub(fr->addr.start,
790 int128_make64(fr->offset_in_region)));
791 if (addrrange_intersects(fr->addr, tmp)) {
792 ++ioeventfd_nb;
793 ioeventfds = g_realloc(ioeventfds,
794 ioeventfd_nb * sizeof(*ioeventfds));
795 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
796 ioeventfds[ioeventfd_nb-1].addr = tmp;
797 }
798 }
799 }
800
801 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
802 as->ioeventfds, as->ioeventfd_nb);
803
804 g_free(as->ioeventfds);
805 as->ioeventfds = ioeventfds;
806 as->ioeventfd_nb = ioeventfd_nb;
807 flatview_unref(view);
808 }
809
810 static void address_space_update_topology_pass(AddressSpace *as,
811 const FlatView *old_view,
812 const FlatView *new_view,
813 bool adding)
814 {
815 unsigned iold, inew;
816 FlatRange *frold, *frnew;
817
818 /* Generate a symmetric difference of the old and new memory maps.
819 * Kill ranges in the old map, and instantiate ranges in the new map.
820 */
821 iold = inew = 0;
822 while (iold < old_view->nr || inew < new_view->nr) {
823 if (iold < old_view->nr) {
824 frold = &old_view->ranges[iold];
825 } else {
826 frold = NULL;
827 }
828 if (inew < new_view->nr) {
829 frnew = &new_view->ranges[inew];
830 } else {
831 frnew = NULL;
832 }
833
834 if (frold
835 && (!frnew
836 || int128_lt(frold->addr.start, frnew->addr.start)
837 || (int128_eq(frold->addr.start, frnew->addr.start)
838 && !flatrange_equal(frold, frnew)))) {
839 /* In old but not in new, or in both but attributes changed. */
840
841 if (!adding) {
842 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
843 }
844
845 ++iold;
846 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
847 /* In both and unchanged (except logging may have changed) */
848
849 if (adding) {
850 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
851 if (frnew->dirty_log_mask & ~frold->dirty_log_mask) {
852 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start,
853 frold->dirty_log_mask,
854 frnew->dirty_log_mask);
855 }
856 if (frold->dirty_log_mask & ~frnew->dirty_log_mask) {
857 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop,
858 frold->dirty_log_mask,
859 frnew->dirty_log_mask);
860 }
861 }
862
863 ++iold;
864 ++inew;
865 } else {
866 /* In new */
867
868 if (adding) {
869 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
870 }
871
872 ++inew;
873 }
874 }
875 }
876
877
878 static void address_space_update_topology(AddressSpace *as)
879 {
880 FlatView *old_view = address_space_get_flatview(as);
881 FlatView *new_view = generate_memory_topology(as->root);
882
883 address_space_update_topology_pass(as, old_view, new_view, false);
884 address_space_update_topology_pass(as, old_view, new_view, true);
885
886 /* Writes are protected by the BQL. */
887 atomic_rcu_set(&as->current_map, new_view);
888 call_rcu(old_view, flatview_unref, rcu);
889
890 /* Note that all the old MemoryRegions are still alive up to this
891 * point. This relieves most MemoryListeners from the need to
892 * ref/unref the MemoryRegions they get---unless they use them
893 * outside the iothread mutex, in which case precise reference
894 * counting is necessary.
895 */
896 flatview_unref(old_view);
897
898 address_space_update_ioeventfds(as);
899 }
900
901 void memory_region_transaction_begin(void)
902 {
903 qemu_flush_coalesced_mmio_buffer();
904 ++memory_region_transaction_depth;
905 }
906
907 static void memory_region_clear_pending(void)
908 {
909 memory_region_update_pending = false;
910 ioeventfd_update_pending = false;
911 }
912
913 void memory_region_transaction_commit(void)
914 {
915 AddressSpace *as;
916
917 assert(memory_region_transaction_depth);
918 --memory_region_transaction_depth;
919 if (!memory_region_transaction_depth) {
920 if (memory_region_update_pending) {
921 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
922
923 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
924 address_space_update_topology(as);
925 }
926
927 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
928 } else if (ioeventfd_update_pending) {
929 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
930 address_space_update_ioeventfds(as);
931 }
932 }
933 memory_region_clear_pending();
934 }
935 }
936
937 static void memory_region_destructor_none(MemoryRegion *mr)
938 {
939 }
940
941 static void memory_region_destructor_ram(MemoryRegion *mr)
942 {
943 qemu_ram_free(mr->ram_block);
944 }
945
946 static void memory_region_destructor_rom_device(MemoryRegion *mr)
947 {
948 qemu_ram_free(mr->ram_block);
949 }
950
951 static bool memory_region_need_escape(char c)
952 {
953 return c == '/' || c == '[' || c == '\\' || c == ']';
954 }
955
956 static char *memory_region_escape_name(const char *name)
957 {
958 const char *p;
959 char *escaped, *q;
960 uint8_t c;
961 size_t bytes = 0;
962
963 for (p = name; *p; p++) {
964 bytes += memory_region_need_escape(*p) ? 4 : 1;
965 }
966 if (bytes == p - name) {
967 return g_memdup(name, bytes + 1);
968 }
969
970 escaped = g_malloc(bytes + 1);
971 for (p = name, q = escaped; *p; p++) {
972 c = *p;
973 if (unlikely(memory_region_need_escape(c))) {
974 *q++ = '\\';
975 *q++ = 'x';
976 *q++ = "0123456789abcdef"[c >> 4];
977 c = "0123456789abcdef"[c & 15];
978 }
979 *q++ = c;
980 }
981 *q = 0;
982 return escaped;
983 }
984
985 void memory_region_init(MemoryRegion *mr,
986 Object *owner,
987 const char *name,
988 uint64_t size)
989 {
990 object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
991 mr->size = int128_make64(size);
992 if (size == UINT64_MAX) {
993 mr->size = int128_2_64();
994 }
995 mr->name = g_strdup(name);
996 mr->owner = owner;
997 mr->ram_block = NULL;
998
999 if (name) {
1000 char *escaped_name = memory_region_escape_name(name);
1001 char *name_array = g_strdup_printf("%s[*]", escaped_name);
1002
1003 if (!owner) {
1004 owner = container_get(qdev_get_machine(), "/unattached");
1005 }
1006
1007 object_property_add_child(owner, name_array, OBJECT(mr), &error_abort);
1008 object_unref(OBJECT(mr));
1009 g_free(name_array);
1010 g_free(escaped_name);
1011 }
1012 }
1013
1014 static void memory_region_get_addr(Object *obj, Visitor *v, const char *name,
1015 void *opaque, Error **errp)
1016 {
1017 MemoryRegion *mr = MEMORY_REGION(obj);
1018 uint64_t value = mr->addr;
1019
1020 visit_type_uint64(v, name, &value, errp);
1021 }
1022
1023 static void memory_region_get_container(Object *obj, Visitor *v,
1024 const char *name, void *opaque,
1025 Error **errp)
1026 {
1027 MemoryRegion *mr = MEMORY_REGION(obj);
1028 gchar *path = (gchar *)"";
1029
1030 if (mr->container) {
1031 path = object_get_canonical_path(OBJECT(mr->container));
1032 }
1033 visit_type_str(v, name, &path, errp);
1034 if (mr->container) {
1035 g_free(path);
1036 }
1037 }
1038
1039 static Object *memory_region_resolve_container(Object *obj, void *opaque,
1040 const char *part)
1041 {
1042 MemoryRegion *mr = MEMORY_REGION(obj);
1043
1044 return OBJECT(mr->container);
1045 }
1046
1047 static void memory_region_get_priority(Object *obj, Visitor *v,
1048 const char *name, void *opaque,
1049 Error **errp)
1050 {
1051 MemoryRegion *mr = MEMORY_REGION(obj);
1052 int32_t value = mr->priority;
1053
1054 visit_type_int32(v, name, &value, errp);
1055 }
1056
1057 static bool memory_region_get_may_overlap(Object *obj, Error **errp)
1058 {
1059 MemoryRegion *mr = MEMORY_REGION(obj);
1060
1061 return mr->may_overlap;
1062 }
1063
1064 static void memory_region_get_size(Object *obj, Visitor *v, const char *name,
1065 void *opaque, Error **errp)
1066 {
1067 MemoryRegion *mr = MEMORY_REGION(obj);
1068 uint64_t value = memory_region_size(mr);
1069
1070 visit_type_uint64(v, name, &value, errp);
1071 }
1072
1073 static void memory_region_initfn(Object *obj)
1074 {
1075 MemoryRegion *mr = MEMORY_REGION(obj);
1076 ObjectProperty *op;
1077
1078 mr->ops = &unassigned_mem_ops;
1079 mr->enabled = true;
1080 mr->romd_mode = true;
1081 mr->global_locking = true;
1082 mr->destructor = memory_region_destructor_none;
1083 QTAILQ_INIT(&mr->subregions);
1084 QTAILQ_INIT(&mr->coalesced);
1085
1086 op = object_property_add(OBJECT(mr), "container",
1087 "link<" TYPE_MEMORY_REGION ">",
1088 memory_region_get_container,
1089 NULL, /* memory_region_set_container */
1090 NULL, NULL, &error_abort);
1091 op->resolve = memory_region_resolve_container;
1092
1093 object_property_add(OBJECT(mr), "addr", "uint64",
1094 memory_region_get_addr,
1095 NULL, /* memory_region_set_addr */
1096 NULL, NULL, &error_abort);
1097 object_property_add(OBJECT(mr), "priority", "uint32",
1098 memory_region_get_priority,
1099 NULL, /* memory_region_set_priority */
1100 NULL, NULL, &error_abort);
1101 object_property_add_bool(OBJECT(mr), "may-overlap",
1102 memory_region_get_may_overlap,
1103 NULL, /* memory_region_set_may_overlap */
1104 &error_abort);
1105 object_property_add(OBJECT(mr), "size", "uint64",
1106 memory_region_get_size,
1107 NULL, /* memory_region_set_size, */
1108 NULL, NULL, &error_abort);
1109 }
1110
1111 static int qemu_target_backtrace(target_ulong *array, size_t size)
1112 {
1113 int n = 0;
1114 if (size >= 2) {
1115 #if defined(TARGET_ARM)
1116 CPUArchState *env = current_cpu->env_ptr;
1117 array[0] = env->regs[15];
1118 array[1] = env->regs[14];
1119 #elif defined(TARGET_MIPS)
1120 CPUArchState *env = current_cpu->env_ptr;
1121 array[0] = env->active_tc.PC;
1122 array[1] = env->active_tc.gpr[31];
1123 #else
1124 array[0] = 0;
1125 array[1] = 0;
1126 #endif
1127 n = 2;
1128 }
1129 return n;
1130 }
1131
1132 #include "disas/disas.h"
1133 const char *qemu_sprint_backtrace(char *buffer, size_t length)
1134 {
1135 char *p = buffer;
1136 if (current_cpu) {
1137 target_ulong caller[2];
1138 const char *symbol;
1139 qemu_target_backtrace(caller, 2);
1140 symbol = lookup_symbol(caller[0]);
1141 p += sprintf(p, "[%s]", symbol);
1142 symbol = lookup_symbol(caller[1]);
1143 p += sprintf(p, "[%s]", symbol);
1144 } else {
1145 p += sprintf(p, "[cpu not running]");
1146 }
1147 assert((p - buffer) < length);
1148 return buffer;
1149 }
1150
1151 static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
1152 unsigned size)
1153 {
1154 if (trace_unassigned) {
1155 char buffer[256];
1156 fprintf(stderr, "Unassigned mem read " TARGET_FMT_plx " %s\n",
1157 addr, qemu_sprint_backtrace(buffer, sizeof(buffer)));
1158 }
1159 //~ vm_stop(0);
1160 if (current_cpu != NULL) {
1161 cpu_unassigned_access(current_cpu, addr, false, false, 0, size);
1162 }
1163 return 0;
1164 }
1165
1166 static void unassigned_mem_write(void *opaque, hwaddr addr,
1167 uint64_t val, unsigned size)
1168 {
1169 if (trace_unassigned) {
1170 char buffer[256];
1171 fprintf(stderr, "Unassigned mem write " TARGET_FMT_plx
1172 " = 0x%" PRIx64 " %s\n",
1173 addr, val, qemu_sprint_backtrace(buffer, sizeof(buffer)));
1174 }
1175 if (current_cpu != NULL) {
1176 cpu_unassigned_access(current_cpu, addr, true, false, 0, size);
1177 }
1178 }
1179
1180 static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
1181 unsigned size, bool is_write)
1182 {
1183 return false;
1184 }
1185
1186 const MemoryRegionOps unassigned_mem_ops = {
1187 .valid.accepts = unassigned_mem_accepts,
1188 .endianness = DEVICE_NATIVE_ENDIAN,
1189 };
1190
1191 bool memory_region_access_valid(MemoryRegion *mr,
1192 hwaddr addr,
1193 unsigned size,
1194 bool is_write)
1195 {
1196 int access_size_min, access_size_max;
1197 int access_size, i;
1198
1199 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
1200 fprintf(stderr, "Misaligned i/o to address %08" HWADDR_PRIx
1201 " with size %u for memory region %s\n",
1202 addr, size, mr->name);
1203 return false;
1204 }
1205
1206 if (!mr->ops->valid.accepts) {
1207 return true;
1208 }
1209
1210 access_size_min = mr->ops->valid.min_access_size;
1211 if (!mr->ops->valid.min_access_size) {
1212 access_size_min = 1;
1213 }
1214
1215 access_size_max = mr->ops->valid.max_access_size;
1216 if (!mr->ops->valid.max_access_size) {
1217 access_size_max = 4;
1218 }
1219
1220 access_size = MAX(MIN(size, access_size_max), access_size_min);
1221 for (i = 0; i < size; i += access_size) {
1222 if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
1223 is_write)) {
1224 return false;
1225 }
1226 }
1227
1228 return true;
1229 }
1230
1231 static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
1232 hwaddr addr,
1233 uint64_t *pval,
1234 unsigned size,
1235 MemTxAttrs attrs)
1236 {
1237 *pval = 0;
1238
1239 if (mr->ops->read) {
1240 return access_with_adjusted_size(addr, pval, size,
1241 mr->ops->impl.min_access_size,
1242 mr->ops->impl.max_access_size,
1243 memory_region_read_accessor,
1244 mr, attrs);
1245 } else if (mr->ops->read_with_attrs) {
1246 return access_with_adjusted_size(addr, pval, size,
1247 mr->ops->impl.min_access_size,
1248 mr->ops->impl.max_access_size,
1249 memory_region_read_with_attrs_accessor,
1250 mr, attrs);
1251 } else {
1252 return access_with_adjusted_size(addr, pval, size, 1, 4,
1253 memory_region_oldmmio_read_accessor,
1254 mr, attrs);
1255 }
1256 }
1257
1258 MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
1259 hwaddr addr,
1260 uint64_t *pval,
1261 unsigned size,
1262 MemTxAttrs attrs)
1263 {
1264 MemTxResult r;
1265
1266 if (!memory_region_access_valid(mr, addr, size, false)) {
1267 *pval = unassigned_mem_read(mr, addr, size);
1268 return MEMTX_DECODE_ERROR;
1269 }
1270
1271 r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
1272 adjust_endianness(mr, pval, size);
1273 return r;
1274 }
1275
1276 /* Return true if an eventfd was signalled */
1277 static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr,
1278 hwaddr addr,
1279 uint64_t data,
1280 unsigned size,
1281 MemTxAttrs attrs)
1282 {
1283 MemoryRegionIoeventfd ioeventfd = {
1284 .addr = addrrange_make(int128_make64(addr), int128_make64(size)),
1285 .data = data,
1286 };
1287 unsigned i;
1288
1289 for (i = 0; i < mr->ioeventfd_nb; i++) {
1290 ioeventfd.match_data = mr->ioeventfds[i].match_data;
1291 ioeventfd.e = mr->ioeventfds[i].e;
1292
1293 if (memory_region_ioeventfd_equal(ioeventfd, mr->ioeventfds[i])) {
1294 event_notifier_set(ioeventfd.e);
1295 return true;
1296 }
1297 }
1298
1299 return false;
1300 }
1301
1302 MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
1303 hwaddr addr,
1304 uint64_t data,
1305 unsigned size,
1306 MemTxAttrs attrs)
1307 {
1308 if (!memory_region_access_valid(mr, addr, size, true)) {
1309 unassigned_mem_write(mr, addr, data, size);
1310 return MEMTX_DECODE_ERROR;
1311 }
1312
1313 adjust_endianness(mr, &data, size);
1314
1315 if ((!kvm_eventfds_enabled()) &&
1316 memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) {
1317 return MEMTX_OK;
1318 }
1319
1320 if (mr->ops->write) {
1321 return access_with_adjusted_size(addr, &data, size,
1322 mr->ops->impl.min_access_size,
1323 mr->ops->impl.max_access_size,
1324 memory_region_write_accessor, mr,
1325 attrs);
1326 } else if (mr->ops->write_with_attrs) {
1327 return
1328 access_with_adjusted_size(addr, &data, size,
1329 mr->ops->impl.min_access_size,
1330 mr->ops->impl.max_access_size,
1331 memory_region_write_with_attrs_accessor,
1332 mr, attrs);
1333 } else {
1334 return access_with_adjusted_size(addr, &data, size, 1, 4,
1335 memory_region_oldmmio_write_accessor,
1336 mr, attrs);
1337 }
1338 }
1339
1340 void memory_region_init_io(MemoryRegion *mr,
1341 Object *owner,
1342 const MemoryRegionOps *ops,
1343 void *opaque,
1344 const char *name,
1345 uint64_t size)
1346 {
1347 memory_region_init(mr, owner, name, size);
1348 mr->ops = ops ? ops : &unassigned_mem_ops;
1349 mr->opaque = opaque;
1350 mr->terminates = true;
1351 }
1352
1353 void memory_region_init_ram(MemoryRegion *mr,
1354 Object *owner,
1355 const char *name,
1356 uint64_t size,
1357 Error **errp)
1358 {
1359 memory_region_init(mr, owner, name, size);
1360 mr->ram = true;
1361 mr->terminates = true;
1362 mr->destructor = memory_region_destructor_ram;
1363 mr->ram_block = qemu_ram_alloc(size, mr, errp);
1364 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1365 }
1366
1367 void memory_region_init_resizeable_ram(MemoryRegion *mr,
1368 Object *owner,
1369 const char *name,
1370 uint64_t size,
1371 uint64_t max_size,
1372 void (*resized)(const char*,
1373 uint64_t length,
1374 void *host),
1375 Error **errp)
1376 {
1377 memory_region_init(mr, owner, name, size);
1378 mr->ram = true;
1379 mr->terminates = true;
1380 mr->destructor = memory_region_destructor_ram;
1381 mr->ram_block = qemu_ram_alloc_resizeable(size, max_size, resized,
1382 mr, errp);
1383 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1384 }
1385
1386 #ifdef __linux__
1387 void memory_region_init_ram_from_file(MemoryRegion *mr,
1388 struct Object *owner,
1389 const char *name,
1390 uint64_t size,
1391 bool share,
1392 const char *path,
1393 Error **errp)
1394 {
1395 memory_region_init(mr, owner, name, size);
1396 mr->ram = true;
1397 mr->terminates = true;
1398 mr->destructor = memory_region_destructor_ram;
1399 mr->ram_block = qemu_ram_alloc_from_file(size, mr, share, path, errp);
1400 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1401 }
1402 #endif
1403
1404 void memory_region_init_ram_ptr(MemoryRegion *mr,
1405 Object *owner,
1406 const char *name,
1407 uint64_t size,
1408 void *ptr)
1409 {
1410 memory_region_init(mr, owner, name, size);
1411 mr->ram = true;
1412 mr->terminates = true;
1413 mr->destructor = memory_region_destructor_ram;
1414 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1415
1416 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1417 assert(ptr != NULL);
1418 mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
1419 }
1420
1421 void memory_region_set_skip_dump(MemoryRegion *mr)
1422 {
1423 mr->skip_dump = true;
1424 }
1425
1426 void memory_region_init_alias(MemoryRegion *mr,
1427 Object *owner,
1428 const char *name,
1429 MemoryRegion *orig,
1430 hwaddr offset,
1431 uint64_t size)
1432 {
1433 memory_region_init(mr, owner, name, size);
1434 mr->alias = orig;
1435 mr->alias_offset = offset;
1436 }
1437
1438 void memory_region_init_rom_device(MemoryRegion *mr,
1439 Object *owner,
1440 const MemoryRegionOps *ops,
1441 void *opaque,
1442 const char *name,
1443 uint64_t size,
1444 Error **errp)
1445 {
1446 memory_region_init(mr, owner, name, size);
1447 mr->ops = ops;
1448 mr->opaque = opaque;
1449 mr->terminates = true;
1450 mr->rom_device = true;
1451 mr->destructor = memory_region_destructor_rom_device;
1452 mr->ram_block = qemu_ram_alloc(size, mr, errp);
1453 }
1454
1455 void memory_region_init_iommu(MemoryRegion *mr,
1456 Object *owner,
1457 const MemoryRegionIOMMUOps *ops,
1458 const char *name,
1459 uint64_t size)
1460 {
1461 memory_region_init(mr, owner, name, size);
1462 mr->iommu_ops = ops,
1463 mr->terminates = true; /* then re-forwards */
1464 notifier_list_init(&mr->iommu_notify);
1465 }
1466
1467 static void memory_region_finalize(Object *obj)
1468 {
1469 MemoryRegion *mr = MEMORY_REGION(obj);
1470
1471 assert(!mr->container);
1472
1473 /* We know the region is not visible in any address space (it
1474 * does not have a container and cannot be a root either because
1475 * it has no references, so we can blindly clear mr->enabled.
1476 * memory_region_set_enabled instead could trigger a transaction
1477 * and cause an infinite loop.
1478 */
1479 mr->enabled = false;
1480 memory_region_transaction_begin();
1481 while (!QTAILQ_EMPTY(&mr->subregions)) {
1482 MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions);
1483 memory_region_del_subregion(mr, subregion);
1484 }
1485 memory_region_transaction_commit();
1486
1487 mr->destructor(mr);
1488 memory_region_clear_coalescing(mr);
1489 g_free((char *)mr->name);
1490 g_free(mr->ioeventfds);
1491 }
1492
1493 Object *memory_region_owner(MemoryRegion *mr)
1494 {
1495 Object *obj = OBJECT(mr);
1496 return obj->parent;
1497 }
1498
1499 void memory_region_ref(MemoryRegion *mr)
1500 {
1501 /* MMIO callbacks most likely will access data that belongs
1502 * to the owner, hence the need to ref/unref the owner whenever
1503 * the memory region is in use.
1504 *
1505 * The memory region is a child of its owner. As long as the
1506 * owner doesn't call unparent itself on the memory region,
1507 * ref-ing the owner will also keep the memory region alive.
1508 * Memory regions without an owner are supposed to never go away;
1509 * we do not ref/unref them because it slows down DMA sensibly.
1510 */
1511 if (mr && mr->owner) {
1512 object_ref(mr->owner);
1513 }
1514 }
1515
1516 void memory_region_unref(MemoryRegion *mr)
1517 {
1518 if (mr && mr->owner) {
1519 object_unref(mr->owner);
1520 }
1521 }
1522
1523 uint64_t memory_region_size(MemoryRegion *mr)
1524 {
1525 if (int128_eq(mr->size, int128_2_64())) {
1526 return UINT64_MAX;
1527 }
1528 return int128_get64(mr->size);
1529 }
1530
1531 const char *memory_region_name(const MemoryRegion *mr)
1532 {
1533 if (!mr->name) {
1534 ((MemoryRegion *)mr)->name =
1535 object_get_canonical_path_component(OBJECT(mr));
1536 }
1537 return mr->name;
1538 }
1539
1540 bool memory_region_is_skip_dump(MemoryRegion *mr)
1541 {
1542 return mr->skip_dump;
1543 }
1544
1545 uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr)
1546 {
1547 uint8_t mask = mr->dirty_log_mask;
1548 if (global_dirty_log) {
1549 mask |= (1 << DIRTY_MEMORY_MIGRATION);
1550 }
1551 return mask;
1552 }
1553
1554 bool memory_region_is_logging(MemoryRegion *mr, uint8_t client)
1555 {
1556 return memory_region_get_dirty_log_mask(mr) & (1 << client);
1557 }
1558
1559 void memory_region_register_iommu_notifier(MemoryRegion *mr, Notifier *n)
1560 {
1561 notifier_list_add(&mr->iommu_notify, n);
1562 }
1563
1564 void memory_region_iommu_replay(MemoryRegion *mr, Notifier *n,
1565 hwaddr granularity, bool is_write)
1566 {
1567 hwaddr addr;
1568 IOMMUTLBEntry iotlb;
1569
1570 for (addr = 0; addr < memory_region_size(mr); addr += granularity) {
1571 iotlb = mr->iommu_ops->translate(mr, addr, is_write);
1572 if (iotlb.perm != IOMMU_NONE) {
1573 n->notify(n, &iotlb);
1574 }
1575
1576 /* if (2^64 - MR size) < granularity, it's possible to get an
1577 * infinite loop here. This should catch such a wraparound */
1578 if ((addr + granularity) < addr) {
1579 break;
1580 }
1581 }
1582 }
1583
1584 void memory_region_unregister_iommu_notifier(Notifier *n)
1585 {
1586 notifier_remove(n);
1587 }
1588
1589 void memory_region_notify_iommu(MemoryRegion *mr,
1590 IOMMUTLBEntry entry)
1591 {
1592 assert(memory_region_is_iommu(mr));
1593 notifier_list_notify(&mr->iommu_notify, &entry);
1594 }
1595
1596 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1597 {
1598 uint8_t mask = 1 << client;
1599 uint8_t old_logging;
1600
1601 assert(client == DIRTY_MEMORY_VGA);
1602 old_logging = mr->vga_logging_count;
1603 mr->vga_logging_count += log ? 1 : -1;
1604 if (!!old_logging == !!mr->vga_logging_count) {
1605 return;
1606 }
1607
1608 memory_region_transaction_begin();
1609 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1610 memory_region_update_pending |= mr->enabled;
1611 memory_region_transaction_commit();
1612 }
1613
1614 bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1615 hwaddr size, unsigned client)
1616 {
1617 assert(mr->ram_block);
1618 return cpu_physical_memory_get_dirty(memory_region_get_ram_addr(mr) + addr,
1619 size, client);
1620 }
1621
1622 void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1623 hwaddr size)
1624 {
1625 assert(mr->ram_block);
1626 cpu_physical_memory_set_dirty_range(memory_region_get_ram_addr(mr) + addr,
1627 size,
1628 memory_region_get_dirty_log_mask(mr));
1629 }
1630
1631 bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
1632 hwaddr size, unsigned client)
1633 {
1634 assert(mr->ram_block);
1635 return cpu_physical_memory_test_and_clear_dirty(
1636 memory_region_get_ram_addr(mr) + addr, size, client);
1637 }
1638
1639
1640 void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1641 {
1642 AddressSpace *as;
1643 FlatRange *fr;
1644
1645 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1646 FlatView *view = address_space_get_flatview(as);
1647 FOR_EACH_FLAT_RANGE(fr, view) {
1648 if (fr->mr == mr) {
1649 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1650 }
1651 }
1652 flatview_unref(view);
1653 }
1654 }
1655
1656 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1657 {
1658 if (mr->readonly != readonly) {
1659 memory_region_transaction_begin();
1660 mr->readonly = readonly;
1661 memory_region_update_pending |= mr->enabled;
1662 memory_region_transaction_commit();
1663 }
1664 }
1665
1666 void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
1667 {
1668 if (mr->romd_mode != romd_mode) {
1669 memory_region_transaction_begin();
1670 mr->romd_mode = romd_mode;
1671 memory_region_update_pending |= mr->enabled;
1672 memory_region_transaction_commit();
1673 }
1674 }
1675
1676 void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
1677 hwaddr size, unsigned client)
1678 {
1679 assert(mr->ram_block);
1680 cpu_physical_memory_test_and_clear_dirty(
1681 memory_region_get_ram_addr(mr) + addr, size, client);
1682 }
1683
1684 int memory_region_get_fd(MemoryRegion *mr)
1685 {
1686 if (mr->alias) {
1687 return memory_region_get_fd(mr->alias);
1688 }
1689
1690 assert(mr->ram_block);
1691
1692 return qemu_get_ram_fd(memory_region_get_ram_addr(mr) & TARGET_PAGE_MASK);
1693 }
1694
1695 void *memory_region_get_ram_ptr(MemoryRegion *mr)
1696 {
1697 void *ptr;
1698 uint64_t offset = 0;
1699
1700 rcu_read_lock();
1701 while (mr->alias) {
1702 offset += mr->alias_offset;
1703 mr = mr->alias;
1704 }
1705 assert(mr->ram_block);
1706 ptr = qemu_get_ram_ptr(mr->ram_block,
1707 memory_region_get_ram_addr(mr) & TARGET_PAGE_MASK);
1708 rcu_read_unlock();
1709
1710 return ptr + offset;
1711 }
1712
1713 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1714 {
1715 return mr->ram_block ? mr->ram_block->offset : RAM_ADDR_INVALID;
1716 }
1717
1718 void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp)
1719 {
1720 assert(mr->ram_block);
1721
1722 qemu_ram_resize(memory_region_get_ram_addr(mr), newsize, errp);
1723 }
1724
1725 static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
1726 {
1727 FlatView *view;
1728 FlatRange *fr;
1729 CoalescedMemoryRange *cmr;
1730 AddrRange tmp;
1731 MemoryRegionSection section;
1732
1733 view = address_space_get_flatview(as);
1734 FOR_EACH_FLAT_RANGE(fr, view) {
1735 if (fr->mr == mr) {
1736 section = (MemoryRegionSection) {
1737 .address_space = as,
1738 .offset_within_address_space = int128_get64(fr->addr.start),
1739 .size = fr->addr.size,
1740 };
1741
1742 MEMORY_LISTENER_CALL(coalesced_mmio_del, Reverse, &section,
1743 int128_get64(fr->addr.start),
1744 int128_get64(fr->addr.size));
1745 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1746 tmp = addrrange_shift(cmr->addr,
1747 int128_sub(fr->addr.start,
1748 int128_make64(fr->offset_in_region)));
1749 if (!addrrange_intersects(tmp, fr->addr)) {
1750 continue;
1751 }
1752 tmp = addrrange_intersection(tmp, fr->addr);
1753 MEMORY_LISTENER_CALL(coalesced_mmio_add, Forward, &section,
1754 int128_get64(tmp.start),
1755 int128_get64(tmp.size));
1756 }
1757 }
1758 }
1759 flatview_unref(view);
1760 }
1761
1762 static void memory_region_update_coalesced_range(MemoryRegion *mr)
1763 {
1764 AddressSpace *as;
1765
1766 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1767 memory_region_update_coalesced_range_as(mr, as);
1768 }
1769 }
1770
1771 void memory_region_set_coalescing(MemoryRegion *mr)
1772 {
1773 memory_region_clear_coalescing(mr);
1774 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
1775 }
1776
1777 void memory_region_add_coalescing(MemoryRegion *mr,
1778 hwaddr offset,
1779 uint64_t size)
1780 {
1781 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
1782
1783 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
1784 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1785 memory_region_update_coalesced_range(mr);
1786 memory_region_set_flush_coalesced(mr);
1787 }
1788
1789 void memory_region_clear_coalescing(MemoryRegion *mr)
1790 {
1791 CoalescedMemoryRange *cmr;
1792 bool updated = false;
1793
1794 qemu_flush_coalesced_mmio_buffer();
1795 mr->flush_coalesced_mmio = false;
1796
1797 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1798 cmr = QTAILQ_FIRST(&mr->coalesced);
1799 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
1800 g_free(cmr);
1801 updated = true;
1802 }
1803
1804 if (updated) {
1805 memory_region_update_coalesced_range(mr);
1806 }
1807 }
1808
1809 void memory_region_set_flush_coalesced(MemoryRegion *mr)
1810 {
1811 mr->flush_coalesced_mmio = true;
1812 }
1813
1814 void memory_region_clear_flush_coalesced(MemoryRegion *mr)
1815 {
1816 qemu_flush_coalesced_mmio_buffer();
1817 if (QTAILQ_EMPTY(&mr->coalesced)) {
1818 mr->flush_coalesced_mmio = false;
1819 }
1820 }
1821
1822 void memory_region_set_global_locking(MemoryRegion *mr)
1823 {
1824 mr->global_locking = true;
1825 }
1826
1827 void memory_region_clear_global_locking(MemoryRegion *mr)
1828 {
1829 mr->global_locking = false;
1830 }
1831
1832 static bool userspace_eventfd_warning;
1833
1834 void memory_region_add_eventfd(MemoryRegion *mr,
1835 hwaddr addr,
1836 unsigned size,
1837 bool match_data,
1838 uint64_t data,
1839 EventNotifier *e)
1840 {
1841 MemoryRegionIoeventfd mrfd = {
1842 .addr.start = int128_make64(addr),
1843 .addr.size = int128_make64(size),
1844 .match_data = match_data,
1845 .data = data,
1846 .e = e,
1847 };
1848 unsigned i;
1849
1850 if (kvm_enabled() && (!(kvm_eventfds_enabled() ||
1851 userspace_eventfd_warning))) {
1852 userspace_eventfd_warning = true;
1853 error_report("Using eventfd without MMIO binding in KVM. "
1854 "Suboptimal performance expected");
1855 }
1856
1857 if (size) {
1858 adjust_endianness(mr, &mrfd.data, size);
1859 }
1860 memory_region_transaction_begin();
1861 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1862 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1863 break;
1864 }
1865 }
1866 ++mr->ioeventfd_nb;
1867 mr->ioeventfds = g_realloc(mr->ioeventfds,
1868 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1869 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1870 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1871 mr->ioeventfds[i] = mrfd;
1872 ioeventfd_update_pending |= mr->enabled;
1873 memory_region_transaction_commit();
1874 }
1875
1876 void memory_region_del_eventfd(MemoryRegion *mr,
1877 hwaddr addr,
1878 unsigned size,
1879 bool match_data,
1880 uint64_t data,
1881 EventNotifier *e)
1882 {
1883 MemoryRegionIoeventfd mrfd = {
1884 .addr.start = int128_make64(addr),
1885 .addr.size = int128_make64(size),
1886 .match_data = match_data,
1887 .data = data,
1888 .e = e,
1889 };
1890 unsigned i;
1891
1892 if (size) {
1893 adjust_endianness(mr, &mrfd.data, size);
1894 }
1895 memory_region_transaction_begin();
1896 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1897 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1898 break;
1899 }
1900 }
1901 assert(i != mr->ioeventfd_nb);
1902 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1903 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1904 --mr->ioeventfd_nb;
1905 mr->ioeventfds = g_realloc(mr->ioeventfds,
1906 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
1907 ioeventfd_update_pending |= mr->enabled;
1908 memory_region_transaction_commit();
1909 }
1910
1911 static void memory_region_update_container_subregions(MemoryRegion *subregion)
1912 {
1913 hwaddr offset = subregion->addr;
1914 MemoryRegion *mr = subregion->container;
1915 MemoryRegion *other;
1916
1917 memory_region_transaction_begin();
1918
1919 memory_region_ref(subregion);
1920 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1921 if (subregion->may_overlap || other->may_overlap) {
1922 continue;
1923 }
1924 if (int128_ge(int128_make64(offset),
1925 int128_add(int128_make64(other->addr), other->size))
1926 || int128_le(int128_add(int128_make64(offset), subregion->size),
1927 int128_make64(other->addr))) {
1928 continue;
1929 }
1930 #if 0
1931 printf("warning: subregion collision %llx/%llx (%s) "
1932 "vs %llx/%llx (%s)\n",
1933 (unsigned long long)offset,
1934 (unsigned long long)int128_get64(subregion->size),
1935 subregion->name,
1936 (unsigned long long)other->addr,
1937 (unsigned long long)int128_get64(other->size),
1938 other->name);
1939 #endif
1940 }
1941 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1942 if (subregion->priority >= other->priority) {
1943 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1944 goto done;
1945 }
1946 }
1947 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1948 done:
1949 memory_region_update_pending |= mr->enabled && subregion->enabled;
1950 memory_region_transaction_commit();
1951 }
1952
1953 static void memory_region_add_subregion_common(MemoryRegion *mr,
1954 hwaddr offset,
1955 MemoryRegion *subregion)
1956 {
1957 assert(!subregion->container);
1958 subregion->container = mr;
1959 subregion->addr = offset;
1960 memory_region_update_container_subregions(subregion);
1961 }
1962
1963 void memory_region_add_subregion(MemoryRegion *mr,
1964 hwaddr offset,
1965 MemoryRegion *subregion)
1966 {
1967 subregion->may_overlap = false;
1968 subregion->priority = 0;
1969 memory_region_add_subregion_common(mr, offset, subregion);
1970 }
1971
1972 void memory_region_add_subregion_overlap(MemoryRegion *mr,
1973 hwaddr offset,
1974 MemoryRegion *subregion,
1975 int priority)
1976 {
1977 subregion->may_overlap = true;
1978 subregion->priority = priority;
1979 memory_region_add_subregion_common(mr, offset, subregion);
1980 }
1981
1982 void memory_region_del_subregion(MemoryRegion *mr,
1983 MemoryRegion *subregion)
1984 {
1985 memory_region_transaction_begin();
1986 assert(subregion->container == mr);
1987 subregion->container = NULL;
1988 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
1989 memory_region_unref(subregion);
1990 memory_region_update_pending |= mr->enabled && subregion->enabled;
1991 memory_region_transaction_commit();
1992 }
1993
1994 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1995 {
1996 if (enabled == mr->enabled) {
1997 return;
1998 }
1999 memory_region_transaction_begin();
2000 mr->enabled = enabled;
2001 memory_region_update_pending = true;
2002 memory_region_transaction_commit();
2003 }
2004
2005 void memory_region_set_size(MemoryRegion *mr, uint64_t size)
2006 {
2007 Int128 s = int128_make64(size);
2008
2009 if (size == UINT64_MAX) {
2010 s = int128_2_64();
2011 }
2012 if (int128_eq(s, mr->size)) {
2013 return;
2014 }
2015 memory_region_transaction_begin();
2016 mr->size = s;
2017 memory_region_update_pending = true;
2018 memory_region_transaction_commit();
2019 }
2020
2021 static void memory_region_readd_subregion(MemoryRegion *mr)
2022 {
2023 MemoryRegion *container = mr->container;
2024
2025 if (container) {
2026 memory_region_transaction_begin();
2027 memory_region_ref(mr);
2028 memory_region_del_subregion(container, mr);
2029 mr->container = container;
2030 memory_region_update_container_subregions(mr);
2031 memory_region_unref(mr);
2032 memory_region_transaction_commit();
2033 }
2034 }
2035
2036 void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
2037 {
2038 if (addr != mr->addr) {
2039 mr->addr = addr;
2040 memory_region_readd_subregion(mr);
2041 }
2042 }
2043
2044 void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
2045 {
2046 assert(mr->alias);
2047
2048 if (offset == mr->alias_offset) {
2049 return;
2050 }
2051
2052 memory_region_transaction_begin();
2053 mr->alias_offset = offset;
2054 memory_region_update_pending |= mr->enabled;
2055 memory_region_transaction_commit();
2056 }
2057
2058 uint64_t memory_region_get_alignment(const MemoryRegion *mr)
2059 {
2060 return mr->align;
2061 }
2062
2063 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
2064 {
2065 const AddrRange *addr = addr_;
2066 const FlatRange *fr = fr_;
2067
2068 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
2069 return -1;
2070 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
2071 return 1;
2072 }
2073 return 0;
2074 }
2075
2076 static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
2077 {
2078 return bsearch(&addr, view->ranges, view->nr,
2079 sizeof(FlatRange), cmp_flatrange_addr);
2080 }
2081
2082 bool memory_region_is_mapped(MemoryRegion *mr)
2083 {
2084 return mr->container ? true : false;
2085 }
2086
2087 /* Same as memory_region_find, but it does not add a reference to the
2088 * returned region. It must be called from an RCU critical section.
2089 */
2090 static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr,
2091 hwaddr addr, uint64_t size)
2092 {
2093 MemoryRegionSection ret = { .mr = NULL };
2094 MemoryRegion *root;
2095 AddressSpace *as;
2096 AddrRange range;
2097 FlatView *view;
2098 FlatRange *fr;
2099
2100 addr += mr->addr;
2101 for (root = mr; root->container; ) {
2102 root = root->container;
2103 addr += root->addr;
2104 }
2105
2106 as = memory_region_to_address_space(root);
2107 if (!as) {
2108 return ret;
2109 }
2110 range = addrrange_make(int128_make64(addr), int128_make64(size));
2111
2112 view = atomic_rcu_read(&as->current_map);
2113 fr = flatview_lookup(view, range);
2114 if (!fr) {
2115 return ret;
2116 }
2117
2118 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
2119 --fr;
2120 }
2121
2122 ret.mr = fr->mr;
2123 ret.address_space = as;
2124 range = addrrange_intersection(range, fr->addr);
2125 ret.offset_within_region = fr->offset_in_region;
2126 ret.offset_within_region += int128_get64(int128_sub(range.start,
2127 fr->addr.start));
2128 ret.size = range.size;
2129 ret.offset_within_address_space = int128_get64(range.start);
2130 ret.readonly = fr->readonly;
2131 return ret;
2132 }
2133
2134 MemoryRegionSection memory_region_find(MemoryRegion *mr,
2135 hwaddr addr, uint64_t size)
2136 {
2137 MemoryRegionSection ret;
2138 rcu_read_lock();
2139 ret = memory_region_find_rcu(mr, addr, size);
2140 if (ret.mr) {
2141 memory_region_ref(ret.mr);
2142 }
2143 rcu_read_unlock();
2144 return ret;
2145 }
2146
2147 bool memory_region_present(MemoryRegion *container, hwaddr addr)
2148 {
2149 MemoryRegion *mr;
2150
2151 rcu_read_lock();
2152 mr = memory_region_find_rcu(container, addr, 1).mr;
2153 rcu_read_unlock();
2154 return mr && mr != container;
2155 }
2156
2157 void address_space_sync_dirty_bitmap(AddressSpace *as)
2158 {
2159 FlatView *view;
2160 FlatRange *fr;
2161
2162 view = address_space_get_flatview(as);
2163 FOR_EACH_FLAT_RANGE(fr, view) {
2164 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
2165 }
2166 flatview_unref(view);
2167 }
2168
2169 void memory_global_dirty_log_start(void)
2170 {
2171 global_dirty_log = true;
2172
2173 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
2174
2175 /* Refresh DIRTY_LOG_MIGRATION bit. */
2176 memory_region_transaction_begin();
2177 memory_region_update_pending = true;
2178 memory_region_transaction_commit();
2179 }
2180
2181 void memory_global_dirty_log_stop(void)
2182 {
2183 global_dirty_log = false;
2184
2185 /* Refresh DIRTY_LOG_MIGRATION bit. */
2186 memory_region_transaction_begin();
2187 memory_region_update_pending = true;
2188 memory_region_transaction_commit();
2189
2190 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
2191 }
2192
2193 static void listener_add_address_space(MemoryListener *listener,
2194 AddressSpace *as)
2195 {
2196 FlatView *view;
2197 FlatRange *fr;
2198
2199 if (listener->address_space_filter
2200 && listener->address_space_filter != as) {
2201 return;
2202 }
2203
2204 if (listener->begin) {
2205 listener->begin(listener);
2206 }
2207 if (global_dirty_log) {
2208 if (listener->log_global_start) {
2209 listener->log_global_start(listener);
2210 }
2211 }
2212
2213 view = address_space_get_flatview(as);
2214 FOR_EACH_FLAT_RANGE(fr, view) {
2215 MemoryRegionSection section = {
2216 .mr = fr->mr,
2217 .address_space = as,
2218 .offset_within_region = fr->offset_in_region,
2219 .size = fr->addr.size,
2220 .offset_within_address_space = int128_get64(fr->addr.start),
2221 .readonly = fr->readonly,
2222 };
2223 if (fr->dirty_log_mask && listener->log_start) {
2224 listener->log_start(listener, &section, 0, fr->dirty_log_mask);
2225 }
2226 if (listener->region_add) {
2227 listener->region_add(listener, &section);
2228 }
2229 }
2230 if (listener->commit) {
2231 listener->commit(listener);
2232 }
2233 flatview_unref(view);
2234 }
2235
2236 void memory_listener_register(MemoryListener *listener, AddressSpace *filter)
2237 {
2238 MemoryListener *other = NULL;
2239 AddressSpace *as;
2240
2241 listener->address_space_filter = filter;
2242 if (QTAILQ_EMPTY(&memory_listeners)
2243 || listener->priority >= QTAILQ_LAST(&memory_listeners,
2244 memory_listeners)->priority) {
2245 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
2246 } else {
2247 QTAILQ_FOREACH(other, &memory_listeners, link) {
2248 if (listener->priority < other->priority) {
2249 break;
2250 }
2251 }
2252 QTAILQ_INSERT_BEFORE(other, listener, link);
2253 }
2254
2255 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2256 listener_add_address_space(listener, as);
2257 }
2258 }
2259
2260 void memory_listener_unregister(MemoryListener *listener)
2261 {
2262 QTAILQ_REMOVE(&memory_listeners, listener, link);
2263 }
2264
2265 void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
2266 {
2267 memory_region_ref(root);
2268 memory_region_transaction_begin();
2269 as->ref_count = 1;
2270 as->root = root;
2271 as->malloced = false;
2272 as->current_map = g_new(FlatView, 1);
2273 flatview_init(as->current_map);
2274 as->ioeventfd_nb = 0;
2275 as->ioeventfds = NULL;
2276 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
2277 as->name = g_strdup(name ? name : "anonymous");
2278 address_space_init_dispatch(as);
2279 memory_region_update_pending |= root->enabled;
2280 memory_region_transaction_commit();
2281 }
2282
2283 static void do_address_space_destroy(AddressSpace *as)
2284 {
2285 MemoryListener *listener;
2286 bool do_free = as->malloced;
2287
2288 address_space_destroy_dispatch(as);
2289
2290 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2291 assert(listener->address_space_filter != as);
2292 }
2293
2294 flatview_unref(as->current_map);
2295 g_free(as->name);
2296 g_free(as->ioeventfds);
2297 memory_region_unref(as->root);
2298 if (do_free) {
2299 g_free(as);
2300 }
2301 }
2302
2303 AddressSpace *address_space_init_shareable(MemoryRegion *root, const char *name)
2304 {
2305 AddressSpace *as;
2306
2307 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2308 if (root == as->root && as->malloced) {
2309 as->ref_count++;
2310 return as;
2311 }
2312 }
2313
2314 as = g_malloc0(sizeof *as);
2315 address_space_init(as, root, name);
2316 as->malloced = true;
2317 return as;
2318 }
2319
2320 void address_space_destroy(AddressSpace *as)
2321 {
2322 MemoryRegion *root = as->root;
2323
2324 as->ref_count--;
2325 if (as->ref_count) {
2326 return;
2327 }
2328 /* Flush out anything from MemoryListeners listening in on this */
2329 memory_region_transaction_begin();
2330 as->root = NULL;
2331 memory_region_transaction_commit();
2332 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
2333 address_space_unregister(as);
2334
2335 /* At this point, as->dispatch and as->current_map are dummy
2336 * entries that the guest should never use. Wait for the old
2337 * values to expire before freeing the data.
2338 */
2339 as->root = root;
2340 call_rcu(as, do_address_space_destroy, rcu);
2341 }
2342
2343 typedef struct MemoryRegionList MemoryRegionList;
2344
2345 struct MemoryRegionList {
2346 const MemoryRegion *mr;
2347 QTAILQ_ENTRY(MemoryRegionList) queue;
2348 };
2349
2350 typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
2351
2352 static void mtree_print_mr(fprintf_function mon_printf, void *f,
2353 const MemoryRegion *mr, unsigned int level,
2354 hwaddr base,
2355 MemoryRegionListHead *alias_print_queue)
2356 {
2357 MemoryRegionList *new_ml, *ml, *next_ml;
2358 MemoryRegionListHead submr_print_queue;
2359 const MemoryRegion *submr;
2360 unsigned int i;
2361
2362 if (!mr) {
2363 return;
2364 }
2365
2366 for (i = 0; i < level; i++) {
2367 mon_printf(f, " ");
2368 }
2369
2370 if (mr->alias) {
2371 MemoryRegionList *ml;
2372 bool found = false;
2373
2374 /* check if the alias is already in the queue */
2375 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
2376 if (ml->mr == mr->alias) {
2377 found = true;
2378 }
2379 }
2380
2381 if (!found) {
2382 ml = g_new(MemoryRegionList, 1);
2383 ml->mr = mr->alias;
2384 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
2385 }
2386 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
2387 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
2388 "-" TARGET_FMT_plx "%s\n",
2389 base + mr->addr,
2390 base + mr->addr
2391 + (int128_nz(mr->size) ?
2392 (hwaddr)int128_get64(int128_sub(mr->size,
2393 int128_one())) : 0),
2394 mr->priority,
2395 mr->romd_mode ? 'R' : '-',
2396 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
2397 : '-',
2398 memory_region_name(mr),
2399 memory_region_name(mr->alias),
2400 mr->alias_offset,
2401 mr->alias_offset
2402 + (int128_nz(mr->size) ?
2403 (hwaddr)int128_get64(int128_sub(mr->size,
2404 int128_one())) : 0),
2405 mr->enabled ? "" : " [disabled]");
2406 } else {
2407 mon_printf(f,
2408 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s%s\n",
2409 base + mr->addr,
2410 base + mr->addr
2411 + (int128_nz(mr->size) ?
2412 (hwaddr)int128_get64(int128_sub(mr->size,
2413 int128_one())) : 0),
2414 mr->priority,
2415 mr->romd_mode ? 'R' : '-',
2416 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
2417 : '-',
2418 memory_region_name(mr),
2419 mr->enabled ? "" : " [disabled]");
2420 }
2421
2422 QTAILQ_INIT(&submr_print_queue);
2423
2424 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
2425 new_ml = g_new(MemoryRegionList, 1);
2426 new_ml->mr = submr;
2427 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2428 if (new_ml->mr->addr < ml->mr->addr ||
2429 (new_ml->mr->addr == ml->mr->addr &&
2430 new_ml->mr->priority > ml->mr->priority)) {
2431 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
2432 new_ml = NULL;
2433 break;
2434 }
2435 }
2436 if (new_ml) {
2437 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
2438 }
2439 }
2440
2441 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2442 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
2443 alias_print_queue);
2444 }
2445
2446 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
2447 g_free(ml);
2448 }
2449 }
2450
2451 void mtree_info(fprintf_function mon_printf, void *f)
2452 {
2453 MemoryRegionListHead ml_head;
2454 MemoryRegionList *ml, *ml2;
2455 AddressSpace *as;
2456
2457 QTAILQ_INIT(&ml_head);
2458
2459 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2460 mon_printf(f, "address-space: %s\n", as->name);
2461 mtree_print_mr(mon_printf, f, as->root, 1, 0, &ml_head);
2462 mon_printf(f, "\n");
2463 }
2464
2465 /* print aliased regions */
2466 QTAILQ_FOREACH(ml, &ml_head, queue) {
2467 mon_printf(f, "memory-region: %s\n", memory_region_name(ml->mr));
2468 mtree_print_mr(mon_printf, f, ml->mr, 1, 0, &ml_head);
2469 mon_printf(f, "\n");
2470 }
2471
2472 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
2473 g_free(ml);
2474 }
2475 }
2476
2477 static const TypeInfo memory_region_info = {
2478 .parent = TYPE_OBJECT,
2479 .name = TYPE_MEMORY_REGION,
2480 .instance_size = sizeof(MemoryRegion),
2481 .instance_init = memory_region_initfn,
2482 .instance_finalize = memory_region_finalize,
2483 };
2484
2485 static void memory_register_types(void)
2486 {
2487 type_register_static(&memory_region_info);
2488 }
2489
2490 type_init(memory_register_types)
AR7 emulation for QEMU