2 * ARM implementation of KVM hooks, 64 bit specific code
4 * Copyright Mian-M. Hamayun 2013, Virtual Open Systems
6 * This work is licensed under the terms of the GNU GPL, version 2 or later.
7 * See the COPYING file in the top-level directory.
12 #include <sys/types.h>
13 #include <sys/ioctl.h>
16 #include <linux/kvm.h>
18 #include "qemu-common.h"
19 #include "qemu/timer.h"
20 #include "sysemu/sysemu.h"
21 #include "sysemu/kvm.h"
24 #include "internals.h"
25 #include "hw/arm/arm.h"
27 static inline void set_feature(uint64_t *features
, int feature
)
29 *features
|= 1ULL << feature
;
32 bool kvm_arm_get_host_cpu_features(ARMHostCPUClass
*ahcc
)
34 /* Identify the feature bits corresponding to the host CPU, and
35 * fill out the ARMHostCPUClass fields accordingly. To do this
36 * we have to create a scratch VM, create a single CPU inside it,
37 * and then query that CPU for the relevant ID registers.
38 * For AArch64 we currently don't care about ID registers at
39 * all; we just want to know the CPU type.
42 uint64_t features
= 0;
43 /* Old kernels may not know about the PREFERRED_TARGET ioctl: however
44 * we know these will only support creating one kind of guest CPU,
45 * which is its preferred CPU type. Fortunately these old kernels
46 * support only a very limited number of CPUs.
48 static const uint32_t cpus_to_try
[] = {
49 KVM_ARM_TARGET_AEM_V8
,
50 KVM_ARM_TARGET_FOUNDATION_V8
,
51 KVM_ARM_TARGET_CORTEX_A57
,
52 QEMU_KVM_ARM_TARGET_NONE
54 struct kvm_vcpu_init init
;
56 if (!kvm_arm_create_scratch_host_vcpu(cpus_to_try
, fdarray
, &init
)) {
60 ahcc
->target
= init
.target
;
61 ahcc
->dtb_compatible
= "arm,arm-v8";
63 kvm_arm_destroy_scratch_host_vcpu(fdarray
);
65 /* We can assume any KVM supporting CPU is at least a v8
66 * with VFPv4+Neon; this in turn implies most of the other
69 set_feature(&features
, ARM_FEATURE_V8
);
70 set_feature(&features
, ARM_FEATURE_VFP4
);
71 set_feature(&features
, ARM_FEATURE_NEON
);
72 set_feature(&features
, ARM_FEATURE_AARCH64
);
74 ahcc
->features
= features
;
79 int kvm_arch_init_vcpu(CPUState
*cs
)
82 ARMCPU
*cpu
= ARM_CPU(cs
);
84 if (cpu
->kvm_target
== QEMU_KVM_ARM_TARGET_NONE
||
85 !arm_feature(&cpu
->env
, ARM_FEATURE_AARCH64
)) {
86 fprintf(stderr
, "KVM is not supported for this guest CPU type\n");
90 /* Determine init features for this CPU */
91 memset(cpu
->kvm_init_features
, 0, sizeof(cpu
->kvm_init_features
));
92 if (cpu
->start_powered_off
) {
93 cpu
->kvm_init_features
[0] |= 1 << KVM_ARM_VCPU_POWER_OFF
;
95 if (kvm_check_extension(cs
->kvm_state
, KVM_CAP_ARM_PSCI_0_2
)) {
96 cpu
->psci_version
= 2;
97 cpu
->kvm_init_features
[0] |= 1 << KVM_ARM_VCPU_PSCI_0_2
;
100 /* Do KVM_ARM_VCPU_INIT ioctl */
101 ret
= kvm_arm_vcpu_init(cs
);
106 /* TODO : support for save/restore/reset of system regs via tuple list */
111 #define AARCH64_CORE_REG(x) (KVM_REG_ARM64 | KVM_REG_SIZE_U64 | \
112 KVM_REG_ARM_CORE | KVM_REG_ARM_CORE_REG(x))
114 int kvm_arch_put_registers(CPUState
*cs
, int level
)
116 struct kvm_one_reg reg
;
121 ARMCPU
*cpu
= ARM_CPU(cs
);
122 CPUARMState
*env
= &cpu
->env
;
124 for (i
= 0; i
< 31; i
++) {
125 reg
.id
= AARCH64_CORE_REG(regs
.regs
[i
]);
126 reg
.addr
= (uintptr_t) &env
->xregs
[i
];
127 ret
= kvm_vcpu_ioctl(cs
, KVM_SET_ONE_REG
, ®
);
133 /* KVM puts SP_EL0 in regs.sp and SP_EL1 in regs.sp_el1. On the
134 * QEMU side we keep the current SP in xregs[31] as well.
136 aarch64_save_sp(env
, 1);
138 reg
.id
= AARCH64_CORE_REG(regs
.sp
);
139 reg
.addr
= (uintptr_t) &env
->sp_el
[0];
140 ret
= kvm_vcpu_ioctl(cs
, KVM_SET_ONE_REG
, ®
);
145 reg
.id
= AARCH64_CORE_REG(sp_el1
);
146 reg
.addr
= (uintptr_t) &env
->sp_el
[1];
147 ret
= kvm_vcpu_ioctl(cs
, KVM_SET_ONE_REG
, ®
);
152 /* Note that KVM thinks pstate is 64 bit but we use a uint32_t */
153 val
= pstate_read(env
);
154 reg
.id
= AARCH64_CORE_REG(regs
.pstate
);
155 reg
.addr
= (uintptr_t) &val
;
156 ret
= kvm_vcpu_ioctl(cs
, KVM_SET_ONE_REG
, ®
);
161 reg
.id
= AARCH64_CORE_REG(regs
.pc
);
162 reg
.addr
= (uintptr_t) &env
->pc
;
163 ret
= kvm_vcpu_ioctl(cs
, KVM_SET_ONE_REG
, ®
);
168 reg
.id
= AARCH64_CORE_REG(elr_el1
);
169 reg
.addr
= (uintptr_t) &env
->elr_el
[1];
170 ret
= kvm_vcpu_ioctl(cs
, KVM_SET_ONE_REG
, ®
);
175 for (i
= 0; i
< KVM_NR_SPSR
; i
++) {
176 reg
.id
= AARCH64_CORE_REG(spsr
[i
]);
177 reg
.addr
= (uintptr_t) &env
->banked_spsr
[i
- 1];
178 ret
= kvm_vcpu_ioctl(cs
, KVM_SET_ONE_REG
, ®
);
191 int kvm_arch_get_registers(CPUState
*cs
)
193 struct kvm_one_reg reg
;
198 ARMCPU
*cpu
= ARM_CPU(cs
);
199 CPUARMState
*env
= &cpu
->env
;
201 for (i
= 0; i
< 31; i
++) {
202 reg
.id
= AARCH64_CORE_REG(regs
.regs
[i
]);
203 reg
.addr
= (uintptr_t) &env
->xregs
[i
];
204 ret
= kvm_vcpu_ioctl(cs
, KVM_GET_ONE_REG
, ®
);
210 reg
.id
= AARCH64_CORE_REG(regs
.sp
);
211 reg
.addr
= (uintptr_t) &env
->sp_el
[0];
212 ret
= kvm_vcpu_ioctl(cs
, KVM_GET_ONE_REG
, ®
);
217 reg
.id
= AARCH64_CORE_REG(sp_el1
);
218 reg
.addr
= (uintptr_t) &env
->sp_el
[1];
219 ret
= kvm_vcpu_ioctl(cs
, KVM_GET_ONE_REG
, ®
);
224 reg
.id
= AARCH64_CORE_REG(regs
.pstate
);
225 reg
.addr
= (uintptr_t) &val
;
226 ret
= kvm_vcpu_ioctl(cs
, KVM_GET_ONE_REG
, ®
);
230 pstate_write(env
, val
);
232 /* KVM puts SP_EL0 in regs.sp and SP_EL1 in regs.sp_el1. On the
233 * QEMU side we keep the current SP in xregs[31] as well.
235 aarch64_restore_sp(env
, 1);
237 reg
.id
= AARCH64_CORE_REG(regs
.pc
);
238 reg
.addr
= (uintptr_t) &env
->pc
;
239 ret
= kvm_vcpu_ioctl(cs
, KVM_GET_ONE_REG
, ®
);
244 reg
.id
= AARCH64_CORE_REG(elr_el1
);
245 reg
.addr
= (uintptr_t) &env
->elr_el
[1];
246 ret
= kvm_vcpu_ioctl(cs
, KVM_GET_ONE_REG
, ®
);
251 for (i
= 0; i
< KVM_NR_SPSR
; i
++) {
252 reg
.id
= AARCH64_CORE_REG(spsr
[i
]);
253 reg
.addr
= (uintptr_t) &env
->banked_spsr
[i
- 1];
254 ret
= kvm_vcpu_ioctl(cs
, KVM_GET_ONE_REG
, ®
);
260 /* TODO: other registers */
264 void kvm_arm_reset_vcpu(ARMCPU
*cpu
)
266 /* Re-init VCPU so that all registers are set to
267 * their respective reset values.
269 kvm_arm_vcpu_init(CPU(cpu
));