aspeed/timer: use the APB frequency from the SCU
[qemu/ar7.git] / include / hw / timer / aspeed_timer.h
blob040a088734322133de2c91f3942a1d23b0ebc647
1 /*
2 * ASPEED AST2400 Timer
4 * Andrew Jeffery <andrew@aj.id.au>
6 * Copyright (C) 2016 IBM Corp.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License along
19 * with this program; if not, write to the Free Software Foundation, Inc.,
20 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
22 #ifndef ASPEED_TIMER_H
23 #define ASPEED_TIMER_H
25 #include "qemu/timer.h"
27 typedef struct AspeedSCUState AspeedSCUState;
29 #define ASPEED_TIMER(obj) \
30 OBJECT_CHECK(AspeedTimerCtrlState, (obj), TYPE_ASPEED_TIMER);
31 #define TYPE_ASPEED_TIMER "aspeed.timer"
32 #define ASPEED_TIMER_NR_TIMERS 8
34 typedef struct AspeedTimer {
35 qemu_irq irq;
37 uint8_t id;
38 QEMUTimer timer;
40 /**
41 * Track the line level as the ASPEED timers implement edge triggered
42 * interrupts, signalling with both the rising and falling edge.
44 int32_t level;
45 uint32_t reload;
46 uint32_t match[2];
47 uint64_t start;
48 } AspeedTimer;
50 typedef struct AspeedTimerCtrlState {
51 /*< private >*/
52 SysBusDevice parent;
54 /*< public >*/
55 MemoryRegion iomem;
57 uint32_t ctrl;
58 uint32_t ctrl2;
59 AspeedTimer timers[ASPEED_TIMER_NR_TIMERS];
61 AspeedSCUState *scu;
62 } AspeedTimerCtrlState;
64 #endif /* ASPEED_TIMER_H */