2 * QEMU model of the USB DWC3 host controller emulation.
4 * Copyright (c) 2020 Xilinx Inc.
6 * Written by Vikram Garhwal<fnu.vikram@xilinx.com>
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
29 #include "hw/usb/hcd-xhci.h"
30 #include "hw/usb/hcd-xhci-sysbus.h"
32 #define TYPE_USB_DWC3 "usb_dwc3"
34 #define USB_DWC3(obj) \
35 OBJECT_CHECK(USBDWC3, (obj), TYPE_USB_DWC3)
37 #define USB_DWC3_R_MAX ((0x530 / 4) + 1)
38 #define DWC3_SIZE 0x10000
40 typedef struct USBDWC3
{
41 SysBusDevice parent_obj
;
43 XHCISysbusState sysbus_xhci
;
45 uint32_t regs
[USB_DWC3_R_MAX
];
46 RegisterInfo regs_info
[USB_DWC3_R_MAX
];
50 uint32_t dwc_usb3_user
;