target/microblaze: Rename env_* tcg variables to cpu_*
[qemu/ar7.git] / hw / pci-bridge / dec.c
blob677a310b9649dceefc49289cafa08745c108d398
1 /*
2 * QEMU DEC 21154 PCI bridge
4 * Copyright (c) 2006-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
26 #include "qemu/osdep.h"
27 #include "dec.h"
28 #include "hw/sysbus.h"
29 #include "qapi/error.h"
30 #include "qemu/module.h"
31 #include "hw/pci/pci.h"
32 #include "hw/pci/pci_host.h"
33 #include "hw/pci/pci_bridge.h"
34 #include "hw/pci/pci_bus.h"
36 #define DEC_21154(obj) OBJECT_CHECK(DECState, (obj), TYPE_DEC_21154)
38 typedef struct DECState {
39 PCIHostState parent_obj;
40 } DECState;
42 static int dec_map_irq(PCIDevice *pci_dev, int irq_num)
44 return irq_num;
47 static void dec_pci_bridge_realize(PCIDevice *pci_dev, Error **errp)
49 pci_bridge_initfn(pci_dev, TYPE_PCI_BUS);
52 static void dec_21154_pci_bridge_class_init(ObjectClass *klass, void *data)
54 DeviceClass *dc = DEVICE_CLASS(klass);
55 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
57 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
58 k->realize = dec_pci_bridge_realize;
59 k->exit = pci_bridge_exitfn;
60 k->vendor_id = PCI_VENDOR_ID_DEC;
61 k->device_id = PCI_DEVICE_ID_DEC_21154;
62 k->config_write = pci_bridge_write_config;
63 k->is_bridge = true;
64 dc->desc = "DEC 21154 PCI-PCI bridge";
65 dc->reset = pci_bridge_reset;
66 dc->vmsd = &vmstate_pci_device;
69 static const TypeInfo dec_21154_pci_bridge_info = {
70 .name = "dec-21154-p2p-bridge",
71 .parent = TYPE_PCI_BRIDGE,
72 .instance_size = sizeof(PCIBridge),
73 .class_init = dec_21154_pci_bridge_class_init,
74 .interfaces = (InterfaceInfo[]) {
75 { INTERFACE_CONVENTIONAL_PCI_DEVICE },
76 { },
80 PCIBus *pci_dec_21154_init(PCIBus *parent_bus, int devfn)
82 PCIDevice *dev;
83 PCIBridge *br;
85 dev = pci_new_multifunction(devfn, false, "dec-21154-p2p-bridge");
86 br = PCI_BRIDGE(dev);
87 pci_bridge_map_irq(br, "DEC 21154 PCI-PCI bridge", dec_map_irq);
88 pci_realize_and_unref(dev, parent_bus, &error_fatal);
89 return pci_bridge_get_sec_bus(br);
92 static void pci_dec_21154_device_realize(DeviceState *dev, Error **errp)
94 PCIHostState *phb;
95 SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
97 phb = PCI_HOST_BRIDGE(dev);
99 memory_region_init_io(&phb->conf_mem, OBJECT(dev), &pci_host_conf_le_ops,
100 dev, "pci-conf-idx", 0x1000);
101 memory_region_init_io(&phb->data_mem, OBJECT(dev), &pci_host_data_le_ops,
102 dev, "pci-data-idx", 0x1000);
103 sysbus_init_mmio(sbd, &phb->conf_mem);
104 sysbus_init_mmio(sbd, &phb->data_mem);
107 static void dec_21154_pci_host_realize(PCIDevice *d, Error **errp)
109 /* PCI2PCI bridge same values as PearPC - check this */
112 static void dec_21154_pci_host_class_init(ObjectClass *klass, void *data)
114 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
115 DeviceClass *dc = DEVICE_CLASS(klass);
117 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
118 k->realize = dec_21154_pci_host_realize;
119 k->vendor_id = PCI_VENDOR_ID_DEC;
120 k->device_id = PCI_DEVICE_ID_DEC_21154;
121 k->revision = 0x02;
122 k->class_id = PCI_CLASS_BRIDGE_PCI;
123 k->is_bridge = true;
125 * PCI-facing part of the host bridge, not usable without the
126 * host-facing part, which can't be device_add'ed, yet.
128 dc->user_creatable = false;
131 static const TypeInfo dec_21154_pci_host_info = {
132 .name = "dec-21154",
133 .parent = TYPE_PCI_DEVICE,
134 .instance_size = sizeof(PCIDevice),
135 .class_init = dec_21154_pci_host_class_init,
136 .interfaces = (InterfaceInfo[]) {
137 { INTERFACE_CONVENTIONAL_PCI_DEVICE },
138 { },
142 static void pci_dec_21154_device_class_init(ObjectClass *klass, void *data)
144 DeviceClass *dc = DEVICE_CLASS(klass);
146 dc->realize = pci_dec_21154_device_realize;
149 static const TypeInfo pci_dec_21154_device_info = {
150 .name = TYPE_DEC_21154,
151 .parent = TYPE_PCI_HOST_BRIDGE,
152 .instance_size = sizeof(DECState),
153 .class_init = pci_dec_21154_device_class_init,
156 static void dec_register_types(void)
158 type_register_static(&pci_dec_21154_device_info);
159 type_register_static(&dec_21154_pci_host_info);
160 type_register_static(&dec_21154_pci_bridge_info);
163 type_init(dec_register_types)