strongarm: mask off high[31:28] bits from dir and state registers
[qemu/ar7.git] / hw / display / virtio-vga.c
blobab2e369b2867770897b7e16be65b6572afee403d
1 #include "qemu/osdep.h"
2 #include "hw/hw.h"
3 #include "hw/pci/pci.h"
4 #include "vga_int.h"
5 #include "hw/virtio/virtio-pci.h"
6 #include "qapi/error.h"
8 /*
9 * virtio-vga: This extends VirtioPCIProxy.
11 #define TYPE_VIRTIO_VGA "virtio-vga"
12 #define VIRTIO_VGA(obj) \
13 OBJECT_CHECK(VirtIOVGA, (obj), TYPE_VIRTIO_VGA)
15 typedef struct VirtIOVGA {
16 VirtIOPCIProxy parent_obj;
17 VirtIOGPU vdev;
18 VGACommonState vga;
19 MemoryRegion vga_mrs[3];
20 } VirtIOVGA;
22 static void virtio_vga_invalidate_display(void *opaque)
24 VirtIOVGA *vvga = opaque;
26 if (vvga->vdev.enable) {
27 virtio_gpu_ops.invalidate(&vvga->vdev);
28 } else {
29 vvga->vga.hw_ops->invalidate(&vvga->vga);
33 static void virtio_vga_update_display(void *opaque)
35 VirtIOVGA *vvga = opaque;
37 if (vvga->vdev.enable) {
38 virtio_gpu_ops.gfx_update(&vvga->vdev);
39 } else {
40 vvga->vga.hw_ops->gfx_update(&vvga->vga);
44 static void virtio_vga_text_update(void *opaque, console_ch_t *chardata)
46 VirtIOVGA *vvga = opaque;
48 if (vvga->vdev.enable) {
49 if (virtio_gpu_ops.text_update) {
50 virtio_gpu_ops.text_update(&vvga->vdev, chardata);
52 } else {
53 if (vvga->vga.hw_ops->text_update) {
54 vvga->vga.hw_ops->text_update(&vvga->vga, chardata);
59 static int virtio_vga_ui_info(void *opaque, uint32_t idx, QemuUIInfo *info)
61 VirtIOVGA *vvga = opaque;
63 if (virtio_gpu_ops.ui_info) {
64 return virtio_gpu_ops.ui_info(&vvga->vdev, idx, info);
66 return -1;
69 static void virtio_vga_gl_block(void *opaque, bool block)
71 VirtIOVGA *vvga = opaque;
73 if (virtio_gpu_ops.gl_block) {
74 virtio_gpu_ops.gl_block(&vvga->vdev, block);
78 static const GraphicHwOps virtio_vga_ops = {
79 .invalidate = virtio_vga_invalidate_display,
80 .gfx_update = virtio_vga_update_display,
81 .text_update = virtio_vga_text_update,
82 .ui_info = virtio_vga_ui_info,
83 .gl_block = virtio_vga_gl_block,
86 static const VMStateDescription vmstate_virtio_vga = {
87 .name = "virtio-vga",
88 .version_id = 2,
89 .minimum_version_id = 2,
90 .fields = (VMStateField[]) {
91 /* no pci stuff here, saving the virtio device will handle that */
92 VMSTATE_STRUCT(vga, VirtIOVGA, 0, vmstate_vga_common, VGACommonState),
93 VMSTATE_END_OF_LIST()
97 /* VGA device wrapper around PCI device around virtio GPU */
98 static void virtio_vga_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
100 VirtIOVGA *vvga = VIRTIO_VGA(vpci_dev);
101 VirtIOGPU *g = &vvga->vdev;
102 VGACommonState *vga = &vvga->vga;
103 Error *err = NULL;
104 uint32_t offset;
105 int i;
107 /* init vga compat bits */
108 vga->vram_size_mb = 8;
109 vga_common_init(vga, OBJECT(vpci_dev));
110 vga_init(vga, OBJECT(vpci_dev), pci_address_space(&vpci_dev->pci_dev),
111 pci_address_space_io(&vpci_dev->pci_dev), true);
112 pci_register_bar(&vpci_dev->pci_dev, 0,
113 PCI_BASE_ADDRESS_MEM_PREFETCH, &vga->vram);
116 * Configure virtio bar and regions
118 * We use bar #2 for the mmio regions, to be compatible with stdvga.
119 * virtio regions are moved to the end of bar #2, to make room for
120 * the stdvga mmio registers at the start of bar #2.
122 vpci_dev->modern_mem_bar_idx = 2;
123 vpci_dev->msix_bar_idx = 4;
125 if (!(vpci_dev->flags & VIRTIO_PCI_FLAG_PAGE_PER_VQ)) {
127 * with page-per-vq=off there is no padding space we can use
128 * for the stdvga registers. Make the common and isr regions
129 * smaller then.
131 vpci_dev->common.size /= 2;
132 vpci_dev->isr.size /= 2;
135 offset = memory_region_size(&vpci_dev->modern_bar);
136 offset -= vpci_dev->notify.size;
137 vpci_dev->notify.offset = offset;
138 offset -= vpci_dev->device.size;
139 vpci_dev->device.offset = offset;
140 offset -= vpci_dev->isr.size;
141 vpci_dev->isr.offset = offset;
142 offset -= vpci_dev->common.size;
143 vpci_dev->common.offset = offset;
145 /* init virtio bits */
146 qdev_set_parent_bus(DEVICE(g), BUS(&vpci_dev->bus));
147 virtio_pci_force_virtio_1(vpci_dev);
148 object_property_set_bool(OBJECT(g), true, "realized", &err);
149 if (err) {
150 error_propagate(errp, err);
151 return;
154 /* add stdvga mmio regions */
155 pci_std_vga_mmio_region_init(vga, OBJECT(vvga), &vpci_dev->modern_bar,
156 vvga->vga_mrs, true, false);
158 vga->con = g->scanout[0].con;
159 graphic_console_set_hwops(vga->con, &virtio_vga_ops, vvga);
161 for (i = 0; i < g->conf.max_outputs; i++) {
162 object_property_set_link(OBJECT(g->scanout[i].con),
163 OBJECT(vpci_dev),
164 "device", errp);
168 static void virtio_vga_reset(DeviceState *dev)
170 VirtIOVGA *vvga = VIRTIO_VGA(dev);
172 /* reset virtio-gpu */
173 virtio_gpu_reset(VIRTIO_DEVICE(&vvga->vdev));
175 /* reset vga */
176 vga_common_reset(&vvga->vga);
177 vga_dirty_log_start(&vvga->vga);
180 static Property virtio_vga_properties[] = {
181 DEFINE_VIRTIO_GPU_PCI_PROPERTIES(VirtIOPCIProxy),
182 DEFINE_PROP_END_OF_LIST(),
185 static void virtio_vga_class_init(ObjectClass *klass, void *data)
187 DeviceClass *dc = DEVICE_CLASS(klass);
188 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass);
189 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
191 set_bit(DEVICE_CATEGORY_DISPLAY, dc->categories);
192 dc->props = virtio_vga_properties;
193 dc->reset = virtio_vga_reset;
194 dc->vmsd = &vmstate_virtio_vga;
195 dc->hotpluggable = false;
197 k->realize = virtio_vga_realize;
198 pcidev_k->romfile = "vgabios-virtio.bin";
199 pcidev_k->class_id = PCI_CLASS_DISPLAY_VGA;
202 static void virtio_vga_inst_initfn(Object *obj)
204 VirtIOVGA *dev = VIRTIO_VGA(obj);
206 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
207 TYPE_VIRTIO_GPU);
210 static TypeInfo virtio_vga_info = {
211 .name = TYPE_VIRTIO_VGA,
212 .parent = TYPE_VIRTIO_PCI,
213 .instance_size = sizeof(struct VirtIOVGA),
214 .instance_init = virtio_vga_inst_initfn,
215 .class_init = virtio_vga_class_init,
218 static void virtio_vga_register_types(void)
220 type_register_static(&virtio_vga_info);
223 type_init(virtio_vga_register_types)