hw/i386/acpi-dsdt.dsl

   1 /*
   2  * Bochs/QEMU ACPI DSDT ASL definition
   3  *
   4  * Copyright (c) 2006 Fabrice Bellard
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License version 2 as published by the Free Software Foundation.
   9  *
  10  * This library is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  13  * Lesser General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU Lesser General Public
  16  * License along with this library; if not, write to the Free Software
  17  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  18  */
  19
  20 ACPI_EXTRACT_ALL_CODE AcpiDsdtAmlCode
  21
  22 DefinitionBlock (
  23     "acpi-dsdt.aml",    // Output Filename
  24     "DSDT",             // Signature
  25     0x01,               // DSDT Compliance Revision
  26     "BXPC",             // OEMID
  27     "BXDSDT",           // TABLE ID
  28     0x1                 // OEM Revision
  29     )
  30 {
  31
  32 #include "acpi-dsdt-dbug.dsl"
  33
  34
  35 /****************************************************************
  36  * PCI Bus definition
  37  ****************************************************************/
  38 #define BOARD_SPECIFIC_PCI_RESOURSES \
  39      WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, \
  40          0x0000, \
  41          0x0000, \
  42          0x0CF7, \
  43          0x0000, \
  44          0x0CF8, \
  45          ,, , TypeStatic) \
  46      WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, \
  47          0x0000, \
  48          0x0D00, \
  49          0xADFF, \
  50          0x0000, \
  51          0xA100, \
  52          ,, , TypeStatic) \
  53      /* 0xae00-0xae0e hole for PCI hotplug, hw/acpi/piix4.c:PCI_HOTPLUG_ADDR */ \
  54      WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, \
  55          0x0000, \
  56          0xAE0F, \
  57          0xAEFF, \
  58          0x0000, \
  59          0x00F1, \
  60          ,, , TypeStatic) \
  61      /* 0xaf00-0xaf1f hole for CPU hotplug, hw/acpi/piix4.c:PIIX4_PROC_BASE */ \
  62      WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, \
  63          0x0000, \
  64          0xAF20, \
  65          0xAFDF, \
  66          0x0000, \
  67          0x00C0, \
  68          ,, , TypeStatic) \
  69      /* 0xafe0-0xafe3 hole for ACPI.GPE0, hw/acpi/piix4.c:GPE_BASE */ \
  70      WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, \
  71          0x0000, \
  72          0xAFE4, \
  73          0xFFFF, \
  74          0x0000, \
  75          0x501C, \
  76          ,, , TypeStatic)
  77
  78     Scope(\_SB) {
  79         Device(PCI0) {
  80             Name(_HID, EisaId("PNP0A03"))
  81             Name(_ADR, 0x00)
  82             Name(_UID, 1)
  83 //#define PX13 S0B_
  84 //            External(PX13, DeviceObj)
  85         }
  86     }
  87
  88 #include "acpi-dsdt-pci-crs.dsl"
  89 #include "acpi-dsdt-hpet.dsl"
  90
  91
  92 /****************************************************************
  93  * PIIX4 PM
  94  ****************************************************************/
  95
  96     Scope(\_SB.PCI0) {
  97         Device(PX13) {
  98             Name(_ADR, 0x00010003)
  99             OperationRegion(P13C, PCI_Config, 0x00, 0xff)
 100         }
 101     }
 102
 103
 104 /****************************************************************
 105  * PIIX3 ISA bridge
 106  ****************************************************************/
 107
 108     Scope(\_SB.PCI0) {
 109
 110         External(ISA, DeviceObj)
 111
 112         Device(ISA) {
 113             Name(_ADR, 0x00010000)
 114
 115             /* PIIX PCI to ISA irq remapping */
 116             OperationRegion(P40C, PCI_Config, 0x60, 0x04)
 117
 118             /* enable bits */
 119             Field(\_SB.PCI0.PX13.P13C, AnyAcc, NoLock, Preserve) {
 120                 Offset(0x5f),
 121                 , 7,
 122                 LPEN, 1,         // LPT
 123                 Offset(0x67),
 124                 , 3,
 125                 CAEN, 1,         // COM1
 126                 , 3,
 127                 CBEN, 1,         // COM2
 128             }
 129             Name(FDEN, 1)
 130         }
 131     }
 132
 133 #define DSDT_APPLESMC_STA piix_dsdt_applesmc_sta
 134 #include "acpi-dsdt-isa.dsl"
 135
 136
 137 /****************************************************************
 138  * PCI hotplug
 139  ****************************************************************/
 140
 141     Scope(\_SB.PCI0) {
 142         OperationRegion(PCST, SystemIO, 0xae00, 0x08)
 143         Field(PCST, DWordAcc, NoLock, WriteAsZeros) {
 144             PCIU, 32,
 145             PCID, 32,
 146         }
 147
 148         OperationRegion(SEJ, SystemIO, 0xae08, 0x04)
 149         Field(SEJ, DWordAcc, NoLock, WriteAsZeros) {
 150             B0EJ, 32,
 151         }
 152
 153         OperationRegion(BNMR, SystemIO, 0xae10, 0x04)
 154         Field(BNMR, DWordAcc, NoLock, WriteAsZeros) {
 155             BNUM, 32,
 156         }
 157
 158         /* Lock to protect access to fields above. */
 159         Mutex(BLCK, 0)
 160
 161         /* Methods called by bulk generated PCI devices below */
 162
 163         /* Methods called by hotplug devices */
 164         Method(PCEJ, 2, NotSerialized) {
 165             // _EJ0 method - eject callback
 166             Acquire(BLCK, 0xFFFF)
 167             Store(Arg0, BNUM)
 168             Store(ShiftLeft(1, Arg1), B0EJ)
 169             Release(BLCK)
 170             Return (0x0)
 171         }
 172
 173         /* Hotplug notification method supplied by SSDT */
 174         External(\_SB.PCI0.PCNT, MethodObj)
 175     }
 176
 177
 178 /****************************************************************
 179  * PCI IRQs
 180  ****************************************************************/
 181
 182     Scope(\_SB) {
 183         Scope(PCI0) {
 184             Method (_PRT, 0) {
 185                 Store(Package(128) {}, Local0)
 186                 Store(Zero, Local1)
 187                 While(LLess(Local1, 128)) {
 188                     // slot = pin >> 2
 189                     Store(ShiftRight(Local1, 2), Local2)
 190
 191                     // lnk = (slot + pin) & 3
 192                     Store(And(Add(Local1, Local2), 3), Local3)
 193                     If (LEqual(Local3, 0)) {
 194                         Store(Package(4) { Zero, Zero, LNKD, Zero }, Local4)
 195                     }
 196                     If (LEqual(Local3, 1)) {
 197                         // device 1 is the power-management device, needs SCI
 198                         If (LEqual(Local1, 4)) {
 199                             Store(Package(4) { Zero, Zero, LNKS, Zero }, Local4)
 200                         } Else {
 201                             Store(Package(4) { Zero, Zero, LNKA, Zero }, Local4)
 202                         }
 203                     }
 204                     If (LEqual(Local3, 2)) {
 205                         Store(Package(4) { Zero, Zero, LNKB, Zero }, Local4)
 206                     }
 207                     If (LEqual(Local3, 3)) {
 208                         Store(Package(4) { Zero, Zero, LNKC, Zero }, Local4)
 209                     }
 210
 211                     // Complete the interrupt routing entry:
 212                     //    Package(4) { 0x[slot]FFFF, [pin], [link], 0) }
 213
 214                     Store(Or(ShiftLeft(Local2, 16), 0xFFFF), Index(Local4, 0))
 215                     Store(And(Local1, 3),                    Index(Local4, 1))
 216                     Store(Local4,                            Index(Local0, Local1))
 217
 218                     Increment(Local1)
 219                 }
 220
 221                 Return(Local0)
 222             }
 223         }
 224
 225         Field(PCI0.ISA.P40C, ByteAcc, NoLock, Preserve) {
 226             PRQ0,   8,
 227             PRQ1,   8,
 228             PRQ2,   8,
 229             PRQ3,   8
 230         }
 231
 232         Method(IQST, 1, NotSerialized) {
 233             // _STA method - get status
 234             If (And(0x80, Arg0)) {
 235                 Return (0x09)
 236             }
 237             Return (0x0B)
 238         }
 239         Method(IQCR, 1, Serialized) {
 240             // _CRS method - get current settings
 241             Name(PRR0, ResourceTemplate() {
 242                 Interrupt(, Level, ActiveHigh, Shared) { 0 }
 243             })
 244             CreateDWordField(PRR0, 0x05, PRRI)
 245             If (LLess(Arg0, 0x80)) {
 246                 Store(Arg0, PRRI)
 247             }
 248             Return (PRR0)
 249         }
 250
 251 #define define_link(link, uid, reg)                             \
 252         Device(link) {                                          \
 253             Name(_HID, EISAID("PNP0C0F"))                       \
 254             Name(_UID, uid)                                     \
 255             Name(_PRS, ResourceTemplate() {                     \
 256                 Interrupt(, Level, ActiveHigh, Shared) {        \
 257                     5, 10, 11                                   \
 258                 }                                               \
 259             })                                                  \
 260             Method(_STA, 0, NotSerialized) {                    \
 261                 Return (IQST(reg))                              \
 262             }                                                   \
 263             Method(_DIS, 0, NotSerialized) {                    \
 264                 Or(reg, 0x80, reg)                              \
 265             }                                                   \
 266             Method(_CRS, 0, NotSerialized) {                    \
 267                 Return (IQCR(reg))                              \
 268             }                                                   \
 269             Method(_SRS, 1, NotSerialized) {                    \
 270                 CreateDWordField(Arg0, 0x05, PRRI)              \
 271                 Store(PRRI, reg)                                \
 272             }                                                   \
 273         }
 274
 275         define_link(LNKA, 0, PRQ0)
 276         define_link(LNKB, 1, PRQ1)
 277         define_link(LNKC, 2, PRQ2)
 278         define_link(LNKD, 3, PRQ3)
 279
 280         Device(LNKS) {
 281             Name(_HID, EISAID("PNP0C0F"))
 282             Name(_UID, 4)
 283             Name(_PRS, ResourceTemplate() {
 284                 Interrupt(, Level, ActiveHigh, Shared) { 9 }
 285             })
 286
 287             // The SCI cannot be disabled and is always attached to GSI 9,
 288             // so these are no-ops.  We only need this link to override the
 289             // polarity to active high and match the content of the MADT.
 290             Method(_STA, 0, NotSerialized) { Return (0x0b) }
 291             Method(_DIS, 0, NotSerialized) { }
 292             Method(_CRS, 0, NotSerialized) { Return (_PRS) }
 293             Method(_SRS, 1, NotSerialized) { }
 294         }
 295     }
 296
 297 #include "hw/acpi/pc-hotplug.h"
 298 #define CPU_STATUS_BASE PIIX4_CPU_HOTPLUG_IO_BASE
 299 #include "acpi-dsdt-cpu-hotplug.dsl"
 300 #include "acpi-dsdt-mem-hotplug.dsl"
 301
 302
 303 /****************************************************************
 304  * General purpose events
 305  ****************************************************************/
 306     Scope(\_GPE) {
 307         Name(_HID, "ACPI0006")
 308
 309         Method(_L00) {
 310         }
 311         Method(_E01) {
 312             // PCI hotplug event
 313             Acquire(\_SB.PCI0.BLCK, 0xFFFF)
 314             \_SB.PCI0.PCNT()
 315             Release(\_SB.PCI0.BLCK)
 316         }
 317         Method(_E02) {
 318             // CPU hotplug event
 319             \_SB.PRSC()
 320         }
 321         Method(_E03) {
 322             // Memory hotplug event
 323             \_SB.PCI0.MEMORY_HOTPLUG_DEVICE.MEMORY_SLOT_SCAN_METHOD()
 324         }
 325         Method(_L04) {
 326         }
 327         Method(_L05) {
 328         }
 329         Method(_L06) {
 330         }
 331         Method(_L07) {
 332         }
 333         Method(_L08) {
 334         }
 335         Method(_L09) {
 336         }
 337         Method(_L0A) {
 338         }
 339         Method(_L0B) {
 340         }
 341         Method(_L0C) {
 342         }
 343         Method(_L0D) {
 344         }
 345         Method(_L0E) {
 346         }
 347         Method(_L0F) {
 348         }
 349     }
 350 }