Update version for 4.1.1 release
[qemu/ar7.git] / hw / s390x / s390-pci-bus.c
blob9a935f22b5b06a67c8fbd7b6abb605ed7a2ecd3f
1 /*
2 * s390 PCI BUS
4 * Copyright 2014 IBM Corp.
5 * Author(s): Frank Blaschka <frank.blaschka@de.ibm.com>
6 * Hong Bo Li <lihbbj@cn.ibm.com>
7 * Yi Min Zhao <zyimin@cn.ibm.com>
9 * This work is licensed under the terms of the GNU GPL, version 2 or (at
10 * your option) any later version. See the COPYING file in the top-level
11 * directory.
14 #include "qemu/osdep.h"
15 #include "qapi/error.h"
16 #include "qapi/visitor.h"
17 #include "cpu.h"
18 #include "s390-pci-bus.h"
19 #include "s390-pci-inst.h"
20 #include "hw/pci/pci_bus.h"
21 #include "hw/pci/pci_bridge.h"
22 #include "hw/pci/msi.h"
23 #include "qemu/error-report.h"
24 #include "qemu/module.h"
26 #ifndef DEBUG_S390PCI_BUS
27 #define DEBUG_S390PCI_BUS 0
28 #endif
30 #define DPRINTF(fmt, ...) \
31 do { \
32 if (DEBUG_S390PCI_BUS) { \
33 fprintf(stderr, "S390pci-bus: " fmt, ## __VA_ARGS__); \
34 } \
35 } while (0)
37 S390pciState *s390_get_phb(void)
39 static S390pciState *phb;
41 if (!phb) {
42 phb = S390_PCI_HOST_BRIDGE(
43 object_resolve_path(TYPE_S390_PCI_HOST_BRIDGE, NULL));
44 assert(phb != NULL);
47 return phb;
50 int pci_chsc_sei_nt2_get_event(void *res)
52 ChscSeiNt2Res *nt2_res = (ChscSeiNt2Res *)res;
53 PciCcdfAvail *accdf;
54 PciCcdfErr *eccdf;
55 int rc = 1;
56 SeiContainer *sei_cont;
57 S390pciState *s = s390_get_phb();
59 sei_cont = QTAILQ_FIRST(&s->pending_sei);
60 if (sei_cont) {
61 QTAILQ_REMOVE(&s->pending_sei, sei_cont, link);
62 nt2_res->nt = 2;
63 nt2_res->cc = sei_cont->cc;
64 nt2_res->length = cpu_to_be16(sizeof(ChscSeiNt2Res));
65 switch (sei_cont->cc) {
66 case 1: /* error event */
67 eccdf = (PciCcdfErr *)nt2_res->ccdf;
68 eccdf->fid = cpu_to_be32(sei_cont->fid);
69 eccdf->fh = cpu_to_be32(sei_cont->fh);
70 eccdf->e = cpu_to_be32(sei_cont->e);
71 eccdf->faddr = cpu_to_be64(sei_cont->faddr);
72 eccdf->pec = cpu_to_be16(sei_cont->pec);
73 break;
74 case 2: /* availability event */
75 accdf = (PciCcdfAvail *)nt2_res->ccdf;
76 accdf->fid = cpu_to_be32(sei_cont->fid);
77 accdf->fh = cpu_to_be32(sei_cont->fh);
78 accdf->pec = cpu_to_be16(sei_cont->pec);
79 break;
80 default:
81 abort();
83 g_free(sei_cont);
84 rc = 0;
87 return rc;
90 int pci_chsc_sei_nt2_have_event(void)
92 S390pciState *s = s390_get_phb();
94 return !QTAILQ_EMPTY(&s->pending_sei);
97 S390PCIBusDevice *s390_pci_find_next_avail_dev(S390pciState *s,
98 S390PCIBusDevice *pbdev)
100 S390PCIBusDevice *ret = pbdev ? QTAILQ_NEXT(pbdev, link) :
101 QTAILQ_FIRST(&s->zpci_devs);
103 while (ret && ret->state == ZPCI_FS_RESERVED) {
104 ret = QTAILQ_NEXT(ret, link);
107 return ret;
110 S390PCIBusDevice *s390_pci_find_dev_by_fid(S390pciState *s, uint32_t fid)
112 S390PCIBusDevice *pbdev;
114 QTAILQ_FOREACH(pbdev, &s->zpci_devs, link) {
115 if (pbdev->fid == fid) {
116 return pbdev;
120 return NULL;
123 void s390_pci_sclp_configure(SCCB *sccb)
125 IoaCfgSccb *psccb = (IoaCfgSccb *)sccb;
126 S390PCIBusDevice *pbdev = s390_pci_find_dev_by_fid(s390_get_phb(),
127 be32_to_cpu(psccb->aid));
128 uint16_t rc;
130 if (!pbdev) {
131 DPRINTF("sclp config no dev found\n");
132 rc = SCLP_RC_ADAPTER_ID_NOT_RECOGNIZED;
133 goto out;
136 switch (pbdev->state) {
137 case ZPCI_FS_RESERVED:
138 rc = SCLP_RC_ADAPTER_IN_RESERVED_STATE;
139 break;
140 case ZPCI_FS_STANDBY:
141 pbdev->state = ZPCI_FS_DISABLED;
142 rc = SCLP_RC_NORMAL_COMPLETION;
143 break;
144 default:
145 rc = SCLP_RC_NO_ACTION_REQUIRED;
147 out:
148 psccb->header.response_code = cpu_to_be16(rc);
151 static void s390_pci_perform_unplug(S390PCIBusDevice *pbdev)
153 HotplugHandler *hotplug_ctrl;
155 /* Unplug the PCI device */
156 if (pbdev->pdev) {
157 DeviceState *pdev = DEVICE(pbdev->pdev);
159 hotplug_ctrl = qdev_get_hotplug_handler(pdev);
160 hotplug_handler_unplug(hotplug_ctrl, pdev, &error_abort);
161 object_unparent(OBJECT(pdev));
164 /* Unplug the zPCI device */
165 hotplug_ctrl = qdev_get_hotplug_handler(DEVICE(pbdev));
166 hotplug_handler_unplug(hotplug_ctrl, DEVICE(pbdev), &error_abort);
167 object_unparent(OBJECT(pbdev));
170 void s390_pci_sclp_deconfigure(SCCB *sccb)
172 IoaCfgSccb *psccb = (IoaCfgSccb *)sccb;
173 S390PCIBusDevice *pbdev = s390_pci_find_dev_by_fid(s390_get_phb(),
174 be32_to_cpu(psccb->aid));
175 uint16_t rc;
177 if (!pbdev) {
178 DPRINTF("sclp deconfig no dev found\n");
179 rc = SCLP_RC_ADAPTER_ID_NOT_RECOGNIZED;
180 goto out;
183 switch (pbdev->state) {
184 case ZPCI_FS_RESERVED:
185 rc = SCLP_RC_ADAPTER_IN_RESERVED_STATE;
186 break;
187 case ZPCI_FS_STANDBY:
188 rc = SCLP_RC_NO_ACTION_REQUIRED;
189 break;
190 default:
191 if (pbdev->summary_ind) {
192 pci_dereg_irqs(pbdev);
194 if (pbdev->iommu->enabled) {
195 pci_dereg_ioat(pbdev->iommu);
197 pbdev->state = ZPCI_FS_STANDBY;
198 rc = SCLP_RC_NORMAL_COMPLETION;
200 if (pbdev->unplug_requested) {
201 s390_pci_perform_unplug(pbdev);
204 out:
205 psccb->header.response_code = cpu_to_be16(rc);
208 static S390PCIBusDevice *s390_pci_find_dev_by_uid(S390pciState *s, uint16_t uid)
210 S390PCIBusDevice *pbdev;
212 QTAILQ_FOREACH(pbdev, &s->zpci_devs, link) {
213 if (pbdev->uid == uid) {
214 return pbdev;
218 return NULL;
221 S390PCIBusDevice *s390_pci_find_dev_by_target(S390pciState *s,
222 const char *target)
224 S390PCIBusDevice *pbdev;
226 if (!target) {
227 return NULL;
230 QTAILQ_FOREACH(pbdev, &s->zpci_devs, link) {
231 if (!strcmp(pbdev->target, target)) {
232 return pbdev;
236 return NULL;
239 static S390PCIBusDevice *s390_pci_find_dev_by_pci(S390pciState *s,
240 PCIDevice *pci_dev)
242 S390PCIBusDevice *pbdev;
244 if (!pci_dev) {
245 return NULL;
248 QTAILQ_FOREACH(pbdev, &s->zpci_devs, link) {
249 if (pbdev->pdev == pci_dev) {
250 return pbdev;
254 return NULL;
257 S390PCIBusDevice *s390_pci_find_dev_by_idx(S390pciState *s, uint32_t idx)
259 return g_hash_table_lookup(s->zpci_table, &idx);
262 S390PCIBusDevice *s390_pci_find_dev_by_fh(S390pciState *s, uint32_t fh)
264 uint32_t idx = FH_MASK_INDEX & fh;
265 S390PCIBusDevice *pbdev = s390_pci_find_dev_by_idx(s, idx);
267 if (pbdev && pbdev->fh == fh) {
268 return pbdev;
271 return NULL;
274 static void s390_pci_generate_event(uint8_t cc, uint16_t pec, uint32_t fh,
275 uint32_t fid, uint64_t faddr, uint32_t e)
277 SeiContainer *sei_cont;
278 S390pciState *s = s390_get_phb();
280 sei_cont = g_new0(SeiContainer, 1);
281 sei_cont->fh = fh;
282 sei_cont->fid = fid;
283 sei_cont->cc = cc;
284 sei_cont->pec = pec;
285 sei_cont->faddr = faddr;
286 sei_cont->e = e;
288 QTAILQ_INSERT_TAIL(&s->pending_sei, sei_cont, link);
289 css_generate_css_crws(0);
292 static void s390_pci_generate_plug_event(uint16_t pec, uint32_t fh,
293 uint32_t fid)
295 s390_pci_generate_event(2, pec, fh, fid, 0, 0);
298 void s390_pci_generate_error_event(uint16_t pec, uint32_t fh, uint32_t fid,
299 uint64_t faddr, uint32_t e)
301 s390_pci_generate_event(1, pec, fh, fid, faddr, e);
304 static void s390_pci_set_irq(void *opaque, int irq, int level)
306 /* nothing to do */
309 static int s390_pci_map_irq(PCIDevice *pci_dev, int irq_num)
311 /* nothing to do */
312 return 0;
315 static uint64_t s390_pci_get_table_origin(uint64_t iota)
317 return iota & ~ZPCI_IOTA_RTTO_FLAG;
320 static unsigned int calc_rtx(dma_addr_t ptr)
322 return ((unsigned long) ptr >> ZPCI_RT_SHIFT) & ZPCI_INDEX_MASK;
325 static unsigned int calc_sx(dma_addr_t ptr)
327 return ((unsigned long) ptr >> ZPCI_ST_SHIFT) & ZPCI_INDEX_MASK;
330 static unsigned int calc_px(dma_addr_t ptr)
332 return ((unsigned long) ptr >> PAGE_SHIFT) & ZPCI_PT_MASK;
335 static uint64_t get_rt_sto(uint64_t entry)
337 return ((entry & ZPCI_TABLE_TYPE_MASK) == ZPCI_TABLE_TYPE_RTX)
338 ? (entry & ZPCI_RTE_ADDR_MASK)
339 : 0;
342 static uint64_t get_st_pto(uint64_t entry)
344 return ((entry & ZPCI_TABLE_TYPE_MASK) == ZPCI_TABLE_TYPE_SX)
345 ? (entry & ZPCI_STE_ADDR_MASK)
346 : 0;
349 static bool rt_entry_isvalid(uint64_t entry)
351 return (entry & ZPCI_TABLE_VALID_MASK) == ZPCI_TABLE_VALID;
354 static bool pt_entry_isvalid(uint64_t entry)
356 return (entry & ZPCI_PTE_VALID_MASK) == ZPCI_PTE_VALID;
359 static bool entry_isprotected(uint64_t entry)
361 return (entry & ZPCI_TABLE_PROT_MASK) == ZPCI_TABLE_PROTECTED;
364 /* ett is expected table type, -1 page table, 0 segment table, 1 region table */
365 static uint64_t get_table_index(uint64_t iova, int8_t ett)
367 switch (ett) {
368 case ZPCI_ETT_PT:
369 return calc_px(iova);
370 case ZPCI_ETT_ST:
371 return calc_sx(iova);
372 case ZPCI_ETT_RT:
373 return calc_rtx(iova);
376 return -1;
379 static bool entry_isvalid(uint64_t entry, int8_t ett)
381 switch (ett) {
382 case ZPCI_ETT_PT:
383 return pt_entry_isvalid(entry);
384 case ZPCI_ETT_ST:
385 case ZPCI_ETT_RT:
386 return rt_entry_isvalid(entry);
389 return false;
392 /* Return true if address translation is done */
393 static bool translate_iscomplete(uint64_t entry, int8_t ett)
395 switch (ett) {
396 case 0:
397 return (entry & ZPCI_TABLE_FC) ? true : false;
398 case 1:
399 return false;
402 return true;
405 static uint64_t get_frame_size(int8_t ett)
407 switch (ett) {
408 case ZPCI_ETT_PT:
409 return 1ULL << 12;
410 case ZPCI_ETT_ST:
411 return 1ULL << 20;
412 case ZPCI_ETT_RT:
413 return 1ULL << 31;
416 return 0;
419 static uint64_t get_next_table_origin(uint64_t entry, int8_t ett)
421 switch (ett) {
422 case ZPCI_ETT_PT:
423 return entry & ZPCI_PTE_ADDR_MASK;
424 case ZPCI_ETT_ST:
425 return get_st_pto(entry);
426 case ZPCI_ETT_RT:
427 return get_rt_sto(entry);
430 return 0;
434 * table_translate: do translation within one table and return the following
435 * table origin
437 * @entry: the entry being translated, the result is stored in this.
438 * @to: the address of table origin.
439 * @ett: expected table type, 1 region table, 0 segment table and -1 page table.
440 * @error: error code
442 static uint64_t table_translate(S390IOTLBEntry *entry, uint64_t to, int8_t ett,
443 uint16_t *error)
445 uint64_t tx, te, nto = 0;
446 uint16_t err = 0;
448 tx = get_table_index(entry->iova, ett);
449 te = address_space_ldq(&address_space_memory, to + tx * sizeof(uint64_t),
450 MEMTXATTRS_UNSPECIFIED, NULL);
452 if (!te) {
453 err = ERR_EVENT_INVALTE;
454 goto out;
457 if (!entry_isvalid(te, ett)) {
458 entry->perm &= IOMMU_NONE;
459 goto out;
462 if (ett == ZPCI_ETT_RT && ((te & ZPCI_TABLE_LEN_RTX) != ZPCI_TABLE_LEN_RTX
463 || te & ZPCI_TABLE_OFFSET_MASK)) {
464 err = ERR_EVENT_INVALTL;
465 goto out;
468 nto = get_next_table_origin(te, ett);
469 if (!nto) {
470 err = ERR_EVENT_TT;
471 goto out;
474 if (entry_isprotected(te)) {
475 entry->perm &= IOMMU_RO;
476 } else {
477 entry->perm &= IOMMU_RW;
480 if (translate_iscomplete(te, ett)) {
481 switch (ett) {
482 case ZPCI_ETT_PT:
483 entry->translated_addr = te & ZPCI_PTE_ADDR_MASK;
484 break;
485 case ZPCI_ETT_ST:
486 entry->translated_addr = (te & ZPCI_SFAA_MASK) |
487 (entry->iova & ~ZPCI_SFAA_MASK);
488 break;
490 nto = 0;
492 out:
493 if (err) {
494 entry->perm = IOMMU_NONE;
495 *error = err;
497 entry->len = get_frame_size(ett);
498 return nto;
501 uint16_t s390_guest_io_table_walk(uint64_t g_iota, hwaddr addr,
502 S390IOTLBEntry *entry)
504 uint64_t to = s390_pci_get_table_origin(g_iota);
505 int8_t ett = 1;
506 uint16_t error = 0;
508 entry->iova = addr & PAGE_MASK;
509 entry->translated_addr = 0;
510 entry->perm = IOMMU_RW;
512 if (entry_isprotected(g_iota)) {
513 entry->perm &= IOMMU_RO;
516 while (to) {
517 to = table_translate(entry, to, ett--, &error);
520 return error;
523 static IOMMUTLBEntry s390_translate_iommu(IOMMUMemoryRegion *mr, hwaddr addr,
524 IOMMUAccessFlags flag, int iommu_idx)
526 S390PCIIOMMU *iommu = container_of(mr, S390PCIIOMMU, iommu_mr);
527 S390IOTLBEntry *entry;
528 uint64_t iova = addr & PAGE_MASK;
529 uint16_t error = 0;
530 IOMMUTLBEntry ret = {
531 .target_as = &address_space_memory,
532 .iova = 0,
533 .translated_addr = 0,
534 .addr_mask = ~(hwaddr)0,
535 .perm = IOMMU_NONE,
538 switch (iommu->pbdev->state) {
539 case ZPCI_FS_ENABLED:
540 case ZPCI_FS_BLOCKED:
541 if (!iommu->enabled) {
542 return ret;
544 break;
545 default:
546 return ret;
549 DPRINTF("iommu trans addr 0x%" PRIx64 "\n", addr);
551 if (addr < iommu->pba || addr > iommu->pal) {
552 error = ERR_EVENT_OORANGE;
553 goto err;
556 entry = g_hash_table_lookup(iommu->iotlb, &iova);
557 if (entry) {
558 ret.iova = entry->iova;
559 ret.translated_addr = entry->translated_addr;
560 ret.addr_mask = entry->len - 1;
561 ret.perm = entry->perm;
562 } else {
563 ret.iova = iova;
564 ret.addr_mask = ~PAGE_MASK;
565 ret.perm = IOMMU_NONE;
568 if (flag != IOMMU_NONE && !(flag & ret.perm)) {
569 error = ERR_EVENT_TPROTE;
571 err:
572 if (error) {
573 iommu->pbdev->state = ZPCI_FS_ERROR;
574 s390_pci_generate_error_event(error, iommu->pbdev->fh,
575 iommu->pbdev->fid, addr, 0);
577 return ret;
580 static void s390_pci_iommu_replay(IOMMUMemoryRegion *iommu,
581 IOMMUNotifier *notifier)
583 /* It's impossible to plug a pci device on s390x that already has iommu
584 * mappings which need to be replayed, that is due to the "one iommu per
585 * zpci device" construct. But when we support migration of vfio-pci
586 * devices in future, we need to revisit this.
588 return;
591 static S390PCIIOMMU *s390_pci_get_iommu(S390pciState *s, PCIBus *bus,
592 int devfn)
594 uint64_t key = (uintptr_t)bus;
595 S390PCIIOMMUTable *table = g_hash_table_lookup(s->iommu_table, &key);
596 S390PCIIOMMU *iommu;
598 if (!table) {
599 table = g_new0(S390PCIIOMMUTable, 1);
600 table->key = key;
601 g_hash_table_insert(s->iommu_table, &table->key, table);
604 iommu = table->iommu[PCI_SLOT(devfn)];
605 if (!iommu) {
606 iommu = S390_PCI_IOMMU(object_new(TYPE_S390_PCI_IOMMU));
608 char *mr_name = g_strdup_printf("iommu-root-%02x:%02x.%01x",
609 pci_bus_num(bus),
610 PCI_SLOT(devfn),
611 PCI_FUNC(devfn));
612 char *as_name = g_strdup_printf("iommu-pci-%02x:%02x.%01x",
613 pci_bus_num(bus),
614 PCI_SLOT(devfn),
615 PCI_FUNC(devfn));
616 memory_region_init(&iommu->mr, OBJECT(iommu), mr_name, UINT64_MAX);
617 address_space_init(&iommu->as, &iommu->mr, as_name);
618 iommu->iotlb = g_hash_table_new_full(g_int64_hash, g_int64_equal,
619 NULL, g_free);
620 table->iommu[PCI_SLOT(devfn)] = iommu;
622 g_free(mr_name);
623 g_free(as_name);
626 return iommu;
629 static AddressSpace *s390_pci_dma_iommu(PCIBus *bus, void *opaque, int devfn)
631 S390pciState *s = opaque;
632 S390PCIIOMMU *iommu = s390_pci_get_iommu(s, bus, devfn);
634 return &iommu->as;
637 static uint8_t set_ind_atomic(uint64_t ind_loc, uint8_t to_be_set)
639 uint8_t ind_old, ind_new;
640 hwaddr len = 1;
641 uint8_t *ind_addr;
643 ind_addr = cpu_physical_memory_map(ind_loc, &len, 1);
644 if (!ind_addr) {
645 s390_pci_generate_error_event(ERR_EVENT_AIRERR, 0, 0, 0, 0);
646 return -1;
648 do {
649 ind_old = *ind_addr;
650 ind_new = ind_old | to_be_set;
651 } while (atomic_cmpxchg(ind_addr, ind_old, ind_new) != ind_old);
652 cpu_physical_memory_unmap(ind_addr, len, 1, len);
654 return ind_old;
657 static void s390_msi_ctrl_write(void *opaque, hwaddr addr, uint64_t data,
658 unsigned int size)
660 S390PCIBusDevice *pbdev = opaque;
661 uint32_t vec = data & ZPCI_MSI_VEC_MASK;
662 uint64_t ind_bit;
663 uint32_t sum_bit;
665 assert(pbdev);
666 DPRINTF("write_msix data 0x%" PRIx64 " idx %d vec 0x%x\n", data,
667 pbdev->idx, vec);
669 if (pbdev->state != ZPCI_FS_ENABLED) {
670 return;
673 ind_bit = pbdev->routes.adapter.ind_offset;
674 sum_bit = pbdev->routes.adapter.summary_offset;
676 set_ind_atomic(pbdev->routes.adapter.ind_addr + (ind_bit + vec) / 8,
677 0x80 >> ((ind_bit + vec) % 8));
678 if (!set_ind_atomic(pbdev->routes.adapter.summary_addr + sum_bit / 8,
679 0x80 >> (sum_bit % 8))) {
680 css_adapter_interrupt(CSS_IO_ADAPTER_PCI, pbdev->isc);
684 static uint64_t s390_msi_ctrl_read(void *opaque, hwaddr addr, unsigned size)
686 return 0xffffffff;
689 static const MemoryRegionOps s390_msi_ctrl_ops = {
690 .write = s390_msi_ctrl_write,
691 .read = s390_msi_ctrl_read,
692 .endianness = DEVICE_LITTLE_ENDIAN,
695 void s390_pci_iommu_enable(S390PCIIOMMU *iommu)
698 * The iommu region is initialized against a 0-mapped address space,
699 * so the smallest IOMMU region we can define runs from 0 to the end
700 * of the PCI address space.
702 char *name = g_strdup_printf("iommu-s390-%04x", iommu->pbdev->uid);
703 memory_region_init_iommu(&iommu->iommu_mr, sizeof(iommu->iommu_mr),
704 TYPE_S390_IOMMU_MEMORY_REGION, OBJECT(&iommu->mr),
705 name, iommu->pal + 1);
706 iommu->enabled = true;
707 memory_region_add_subregion(&iommu->mr, 0, MEMORY_REGION(&iommu->iommu_mr));
708 g_free(name);
711 void s390_pci_iommu_disable(S390PCIIOMMU *iommu)
713 iommu->enabled = false;
714 g_hash_table_remove_all(iommu->iotlb);
715 memory_region_del_subregion(&iommu->mr, MEMORY_REGION(&iommu->iommu_mr));
716 object_unparent(OBJECT(&iommu->iommu_mr));
719 static void s390_pci_iommu_free(S390pciState *s, PCIBus *bus, int32_t devfn)
721 uint64_t key = (uintptr_t)bus;
722 S390PCIIOMMUTable *table = g_hash_table_lookup(s->iommu_table, &key);
723 S390PCIIOMMU *iommu = table ? table->iommu[PCI_SLOT(devfn)] : NULL;
725 if (!table || !iommu) {
726 return;
729 table->iommu[PCI_SLOT(devfn)] = NULL;
730 g_hash_table_destroy(iommu->iotlb);
731 address_space_destroy(&iommu->as);
732 object_unparent(OBJECT(&iommu->mr));
733 object_unparent(OBJECT(iommu));
734 object_unref(OBJECT(iommu));
737 static void s390_pcihost_realize(DeviceState *dev, Error **errp)
739 PCIBus *b;
740 BusState *bus;
741 PCIHostState *phb = PCI_HOST_BRIDGE(dev);
742 S390pciState *s = S390_PCI_HOST_BRIDGE(dev);
743 Error *local_err = NULL;
745 DPRINTF("host_init\n");
747 b = pci_register_root_bus(dev, NULL, s390_pci_set_irq, s390_pci_map_irq,
748 NULL, get_system_memory(), get_system_io(), 0,
749 64, TYPE_PCI_BUS);
750 pci_setup_iommu(b, s390_pci_dma_iommu, s);
752 bus = BUS(b);
753 qbus_set_hotplug_handler(bus, OBJECT(dev), &local_err);
754 if (local_err) {
755 error_propagate(errp, local_err);
756 return;
758 phb->bus = b;
760 s->bus = S390_PCI_BUS(qbus_create(TYPE_S390_PCI_BUS, dev, NULL));
761 qbus_set_hotplug_handler(BUS(s->bus), OBJECT(dev), &local_err);
762 if (local_err) {
763 error_propagate(errp, local_err);
764 return;
767 s->iommu_table = g_hash_table_new_full(g_int64_hash, g_int64_equal,
768 NULL, g_free);
769 s->zpci_table = g_hash_table_new_full(g_int_hash, g_int_equal, NULL, NULL);
770 s->bus_no = 0;
771 QTAILQ_INIT(&s->pending_sei);
772 QTAILQ_INIT(&s->zpci_devs);
774 css_register_io_adapters(CSS_IO_ADAPTER_PCI, true, false,
775 S390_ADAPTER_SUPPRESSIBLE, &local_err);
776 error_propagate(errp, local_err);
779 static int s390_pci_msix_init(S390PCIBusDevice *pbdev)
781 char *name;
782 uint8_t pos;
783 uint16_t ctrl;
784 uint32_t table, pba;
786 pos = pci_find_capability(pbdev->pdev, PCI_CAP_ID_MSIX);
787 if (!pos) {
788 return -1;
791 ctrl = pci_host_config_read_common(pbdev->pdev, pos + PCI_MSIX_FLAGS,
792 pci_config_size(pbdev->pdev), sizeof(ctrl));
793 table = pci_host_config_read_common(pbdev->pdev, pos + PCI_MSIX_TABLE,
794 pci_config_size(pbdev->pdev), sizeof(table));
795 pba = pci_host_config_read_common(pbdev->pdev, pos + PCI_MSIX_PBA,
796 pci_config_size(pbdev->pdev), sizeof(pba));
798 pbdev->msix.table_bar = table & PCI_MSIX_FLAGS_BIRMASK;
799 pbdev->msix.table_offset = table & ~PCI_MSIX_FLAGS_BIRMASK;
800 pbdev->msix.pba_bar = pba & PCI_MSIX_FLAGS_BIRMASK;
801 pbdev->msix.pba_offset = pba & ~PCI_MSIX_FLAGS_BIRMASK;
802 pbdev->msix.entries = (ctrl & PCI_MSIX_FLAGS_QSIZE) + 1;
804 name = g_strdup_printf("msix-s390-%04x", pbdev->uid);
805 memory_region_init_io(&pbdev->msix_notify_mr, OBJECT(pbdev),
806 &s390_msi_ctrl_ops, pbdev, name, PAGE_SIZE);
807 memory_region_add_subregion(&pbdev->iommu->mr, ZPCI_MSI_ADDR,
808 &pbdev->msix_notify_mr);
809 g_free(name);
811 return 0;
814 static void s390_pci_msix_free(S390PCIBusDevice *pbdev)
816 memory_region_del_subregion(&pbdev->iommu->mr, &pbdev->msix_notify_mr);
817 object_unparent(OBJECT(&pbdev->msix_notify_mr));
820 static S390PCIBusDevice *s390_pci_device_new(S390pciState *s,
821 const char *target, Error **errp)
823 Error *local_err = NULL;
824 DeviceState *dev;
826 dev = qdev_try_create(BUS(s->bus), TYPE_S390_PCI_DEVICE);
827 if (!dev) {
828 error_setg(errp, "zPCI device could not be created");
829 return NULL;
832 object_property_set_str(OBJECT(dev), target, "target", &local_err);
833 if (local_err) {
834 object_unparent(OBJECT(dev));
835 error_propagate_prepend(errp, local_err,
836 "zPCI device could not be created: ");
837 return NULL;
839 object_property_set_bool(OBJECT(dev), true, "realized", &local_err);
840 if (local_err) {
841 object_unparent(OBJECT(dev));
842 error_propagate_prepend(errp, local_err,
843 "zPCI device could not be created: ");
844 return NULL;
847 return S390_PCI_DEVICE(dev);
850 static bool s390_pci_alloc_idx(S390pciState *s, S390PCIBusDevice *pbdev)
852 uint32_t idx;
854 idx = s->next_idx;
855 while (s390_pci_find_dev_by_idx(s, idx)) {
856 idx = (idx + 1) & FH_MASK_INDEX;
857 if (idx == s->next_idx) {
858 return false;
862 pbdev->idx = idx;
863 return true;
866 static void s390_pcihost_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev,
867 Error **errp)
869 S390pciState *s = S390_PCI_HOST_BRIDGE(hotplug_dev);
871 if (!s390_has_feat(S390_FEAT_ZPCI)) {
872 warn_report("Plugging a PCI/zPCI device without the 'zpci' CPU "
873 "feature enabled; the guest will not be able to see/use "
874 "this device");
877 if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
878 PCIDevice *pdev = PCI_DEVICE(dev);
880 if (pdev->cap_present & QEMU_PCI_CAP_MULTIFUNCTION) {
881 error_setg(errp, "multifunction not supported in s390");
882 return;
884 } else if (object_dynamic_cast(OBJECT(dev), TYPE_S390_PCI_DEVICE)) {
885 S390PCIBusDevice *pbdev = S390_PCI_DEVICE(dev);
887 if (!s390_pci_alloc_idx(s, pbdev)) {
888 error_setg(errp, "no slot for plugging zpci device");
889 return;
894 static void s390_pci_update_subordinate(PCIDevice *dev, uint32_t nr)
896 uint32_t old_nr;
898 pci_default_write_config(dev, PCI_SUBORDINATE_BUS, nr, 1);
899 while (!pci_bus_is_root(pci_get_bus(dev))) {
900 dev = pci_get_bus(dev)->parent_dev;
902 old_nr = pci_default_read_config(dev, PCI_SUBORDINATE_BUS, 1);
903 if (old_nr < nr) {
904 pci_default_write_config(dev, PCI_SUBORDINATE_BUS, nr, 1);
909 static void s390_pcihost_plug(HotplugHandler *hotplug_dev, DeviceState *dev,
910 Error **errp)
912 S390pciState *s = S390_PCI_HOST_BRIDGE(hotplug_dev);
913 PCIDevice *pdev = NULL;
914 S390PCIBusDevice *pbdev = NULL;
916 if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_BRIDGE)) {
917 PCIBridge *pb = PCI_BRIDGE(dev);
919 pdev = PCI_DEVICE(dev);
920 pci_bridge_map_irq(pb, dev->id, s390_pci_map_irq);
921 pci_setup_iommu(&pb->sec_bus, s390_pci_dma_iommu, s);
923 qbus_set_hotplug_handler(BUS(&pb->sec_bus), OBJECT(s), errp);
925 if (dev->hotplugged) {
926 pci_default_write_config(pdev, PCI_PRIMARY_BUS,
927 pci_dev_bus_num(pdev), 1);
928 s->bus_no += 1;
929 pci_default_write_config(pdev, PCI_SECONDARY_BUS, s->bus_no, 1);
931 s390_pci_update_subordinate(pdev, s->bus_no);
933 } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
934 pdev = PCI_DEVICE(dev);
936 if (!dev->id) {
937 /* In the case the PCI device does not define an id */
938 /* we generate one based on the PCI address */
939 dev->id = g_strdup_printf("auto_%02x:%02x.%01x",
940 pci_dev_bus_num(pdev),
941 PCI_SLOT(pdev->devfn),
942 PCI_FUNC(pdev->devfn));
945 pbdev = s390_pci_find_dev_by_target(s, dev->id);
946 if (!pbdev) {
947 pbdev = s390_pci_device_new(s, dev->id, errp);
948 if (!pbdev) {
949 return;
953 if (object_dynamic_cast(OBJECT(dev), "vfio-pci")) {
954 pbdev->fh |= FH_SHM_VFIO;
955 } else {
956 pbdev->fh |= FH_SHM_EMUL;
959 pbdev->pdev = pdev;
960 pbdev->iommu = s390_pci_get_iommu(s, pci_get_bus(pdev), pdev->devfn);
961 pbdev->iommu->pbdev = pbdev;
962 pbdev->state = ZPCI_FS_DISABLED;
964 if (s390_pci_msix_init(pbdev)) {
965 error_setg(errp, "MSI-X support is mandatory "
966 "in the S390 architecture");
967 return;
970 if (dev->hotplugged) {
971 s390_pci_generate_plug_event(HP_EVENT_TO_CONFIGURED ,
972 pbdev->fh, pbdev->fid);
974 } else if (object_dynamic_cast(OBJECT(dev), TYPE_S390_PCI_DEVICE)) {
975 pbdev = S390_PCI_DEVICE(dev);
977 /* the allocated idx is actually getting used */
978 s->next_idx = (pbdev->idx + 1) & FH_MASK_INDEX;
979 pbdev->fh = pbdev->idx;
980 QTAILQ_INSERT_TAIL(&s->zpci_devs, pbdev, link);
981 g_hash_table_insert(s->zpci_table, &pbdev->idx, pbdev);
982 } else {
983 g_assert_not_reached();
987 static void s390_pcihost_unplug(HotplugHandler *hotplug_dev, DeviceState *dev,
988 Error **errp)
990 S390pciState *s = S390_PCI_HOST_BRIDGE(hotplug_dev);
991 S390PCIBusDevice *pbdev = NULL;
993 if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
994 PCIDevice *pci_dev = PCI_DEVICE(dev);
995 PCIBus *bus;
996 int32_t devfn;
998 pbdev = s390_pci_find_dev_by_pci(s, PCI_DEVICE(dev));
999 g_assert(pbdev);
1001 s390_pci_generate_plug_event(HP_EVENT_STANDBY_TO_RESERVED,
1002 pbdev->fh, pbdev->fid);
1003 bus = pci_get_bus(pci_dev);
1004 devfn = pci_dev->devfn;
1005 object_property_set_bool(OBJECT(dev), false, "realized", NULL);
1007 s390_pci_msix_free(pbdev);
1008 s390_pci_iommu_free(s, bus, devfn);
1009 pbdev->pdev = NULL;
1010 pbdev->state = ZPCI_FS_RESERVED;
1011 } else if (object_dynamic_cast(OBJECT(dev), TYPE_S390_PCI_DEVICE)) {
1012 pbdev = S390_PCI_DEVICE(dev);
1013 pbdev->fid = 0;
1014 QTAILQ_REMOVE(&s->zpci_devs, pbdev, link);
1015 g_hash_table_remove(s->zpci_table, &pbdev->idx);
1016 object_property_set_bool(OBJECT(dev), false, "realized", NULL);
1020 static void s390_pcihost_unplug_request(HotplugHandler *hotplug_dev,
1021 DeviceState *dev,
1022 Error **errp)
1024 S390pciState *s = S390_PCI_HOST_BRIDGE(hotplug_dev);
1025 S390PCIBusDevice *pbdev;
1027 if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_BRIDGE)) {
1028 error_setg(errp, "PCI bridge hot unplug currently not supported");
1029 } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
1031 * Redirect the unplug request to the zPCI device and remember that
1032 * we've checked the PCI device already (to prevent endless recursion).
1034 pbdev = s390_pci_find_dev_by_pci(s, PCI_DEVICE(dev));
1035 g_assert(pbdev);
1036 pbdev->pci_unplug_request_processed = true;
1037 qdev_unplug(DEVICE(pbdev), errp);
1038 } else if (object_dynamic_cast(OBJECT(dev), TYPE_S390_PCI_DEVICE)) {
1039 pbdev = S390_PCI_DEVICE(dev);
1042 * If unplug was initially requested for the zPCI device, we
1043 * first have to redirect to the PCI device, which will in return
1044 * redirect back to us after performing its checks (if the request
1045 * is not blocked, e.g. because it's a PCI bridge).
1047 if (pbdev->pdev && !pbdev->pci_unplug_request_processed) {
1048 qdev_unplug(DEVICE(pbdev->pdev), errp);
1049 return;
1051 pbdev->pci_unplug_request_processed = false;
1053 switch (pbdev->state) {
1054 case ZPCI_FS_STANDBY:
1055 case ZPCI_FS_RESERVED:
1056 s390_pci_perform_unplug(pbdev);
1057 break;
1058 default:
1060 * Allow to send multiple requests, e.g. if the guest crashed
1061 * before releasing the device, we would not be able to send
1062 * another request to the same VM (e.g. fresh OS).
1064 pbdev->unplug_requested = true;
1065 s390_pci_generate_plug_event(HP_EVENT_DECONFIGURE_REQUEST,
1066 pbdev->fh, pbdev->fid);
1068 } else {
1069 g_assert_not_reached();
1073 static void s390_pci_enumerate_bridge(PCIBus *bus, PCIDevice *pdev,
1074 void *opaque)
1076 S390pciState *s = opaque;
1077 PCIBus *sec_bus = NULL;
1079 if ((pci_default_read_config(pdev, PCI_HEADER_TYPE, 1) !=
1080 PCI_HEADER_TYPE_BRIDGE)) {
1081 return;
1084 (s->bus_no)++;
1085 pci_default_write_config(pdev, PCI_PRIMARY_BUS, pci_dev_bus_num(pdev), 1);
1086 pci_default_write_config(pdev, PCI_SECONDARY_BUS, s->bus_no, 1);
1087 pci_default_write_config(pdev, PCI_SUBORDINATE_BUS, s->bus_no, 1);
1089 sec_bus = pci_bridge_get_sec_bus(PCI_BRIDGE(pdev));
1090 if (!sec_bus) {
1091 return;
1094 /* Assign numbers to all child bridges. The last is the highest number. */
1095 pci_for_each_device(sec_bus, pci_bus_num(sec_bus),
1096 s390_pci_enumerate_bridge, s);
1097 pci_default_write_config(pdev, PCI_SUBORDINATE_BUS, s->bus_no, 1);
1100 static void s390_pcihost_reset(DeviceState *dev)
1102 S390pciState *s = S390_PCI_HOST_BRIDGE(dev);
1103 PCIBus *bus = s->parent_obj.bus;
1104 S390PCIBusDevice *pbdev, *next;
1106 /* Process all pending unplug requests */
1107 QTAILQ_FOREACH_SAFE(pbdev, &s->zpci_devs, link, next) {
1108 if (pbdev->unplug_requested) {
1109 if (pbdev->summary_ind) {
1110 pci_dereg_irqs(pbdev);
1112 if (pbdev->iommu->enabled) {
1113 pci_dereg_ioat(pbdev->iommu);
1115 pbdev->state = ZPCI_FS_STANDBY;
1116 s390_pci_perform_unplug(pbdev);
1121 * When resetting a PCI bridge, the assigned numbers are set to 0. So
1122 * on every system reset, we also have to reassign numbers.
1124 s->bus_no = 0;
1125 pci_for_each_device(bus, pci_bus_num(bus), s390_pci_enumerate_bridge, s);
1128 static void s390_pcihost_class_init(ObjectClass *klass, void *data)
1130 DeviceClass *dc = DEVICE_CLASS(klass);
1131 HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(klass);
1133 dc->reset = s390_pcihost_reset;
1134 dc->realize = s390_pcihost_realize;
1135 hc->pre_plug = s390_pcihost_pre_plug;
1136 hc->plug = s390_pcihost_plug;
1137 hc->unplug_request = s390_pcihost_unplug_request;
1138 hc->unplug = s390_pcihost_unplug;
1139 msi_nonbroken = true;
1142 static const TypeInfo s390_pcihost_info = {
1143 .name = TYPE_S390_PCI_HOST_BRIDGE,
1144 .parent = TYPE_PCI_HOST_BRIDGE,
1145 .instance_size = sizeof(S390pciState),
1146 .class_init = s390_pcihost_class_init,
1147 .interfaces = (InterfaceInfo[]) {
1148 { TYPE_HOTPLUG_HANDLER },
1153 static const TypeInfo s390_pcibus_info = {
1154 .name = TYPE_S390_PCI_BUS,
1155 .parent = TYPE_BUS,
1156 .instance_size = sizeof(S390PCIBus),
1159 static uint16_t s390_pci_generate_uid(S390pciState *s)
1161 uint16_t uid = 0;
1163 do {
1164 uid++;
1165 if (!s390_pci_find_dev_by_uid(s, uid)) {
1166 return uid;
1168 } while (uid < ZPCI_MAX_UID);
1170 return UID_UNDEFINED;
1173 static uint32_t s390_pci_generate_fid(S390pciState *s, Error **errp)
1175 uint32_t fid = 0;
1177 do {
1178 if (!s390_pci_find_dev_by_fid(s, fid)) {
1179 return fid;
1181 } while (fid++ != ZPCI_MAX_FID);
1183 error_setg(errp, "no free fid could be found");
1184 return 0;
1187 static void s390_pci_device_realize(DeviceState *dev, Error **errp)
1189 S390PCIBusDevice *zpci = S390_PCI_DEVICE(dev);
1190 S390pciState *s = s390_get_phb();
1192 if (!zpci->target) {
1193 error_setg(errp, "target must be defined");
1194 return;
1197 if (s390_pci_find_dev_by_target(s, zpci->target)) {
1198 error_setg(errp, "target %s already has an associated zpci device",
1199 zpci->target);
1200 return;
1203 if (zpci->uid == UID_UNDEFINED) {
1204 zpci->uid = s390_pci_generate_uid(s);
1205 if (!zpci->uid) {
1206 error_setg(errp, "no free uid could be found");
1207 return;
1209 } else if (s390_pci_find_dev_by_uid(s, zpci->uid)) {
1210 error_setg(errp, "uid %u already in use", zpci->uid);
1211 return;
1214 if (!zpci->fid_defined) {
1215 Error *local_error = NULL;
1217 zpci->fid = s390_pci_generate_fid(s, &local_error);
1218 if (local_error) {
1219 error_propagate(errp, local_error);
1220 return;
1222 } else if (s390_pci_find_dev_by_fid(s, zpci->fid)) {
1223 error_setg(errp, "fid %u already in use", zpci->fid);
1224 return;
1227 zpci->state = ZPCI_FS_RESERVED;
1228 zpci->fmb.format = ZPCI_FMB_FORMAT;
1231 static void s390_pci_device_reset(DeviceState *dev)
1233 S390PCIBusDevice *pbdev = S390_PCI_DEVICE(dev);
1235 switch (pbdev->state) {
1236 case ZPCI_FS_RESERVED:
1237 return;
1238 case ZPCI_FS_STANDBY:
1239 break;
1240 default:
1241 pbdev->fh &= ~FH_MASK_ENABLE;
1242 pbdev->state = ZPCI_FS_DISABLED;
1243 break;
1246 if (pbdev->summary_ind) {
1247 pci_dereg_irqs(pbdev);
1249 if (pbdev->iommu->enabled) {
1250 pci_dereg_ioat(pbdev->iommu);
1253 fmb_timer_free(pbdev);
1256 static void s390_pci_get_fid(Object *obj, Visitor *v, const char *name,
1257 void *opaque, Error **errp)
1259 Property *prop = opaque;
1260 uint32_t *ptr = qdev_get_prop_ptr(DEVICE(obj), prop);
1262 visit_type_uint32(v, name, ptr, errp);
1265 static void s390_pci_set_fid(Object *obj, Visitor *v, const char *name,
1266 void *opaque, Error **errp)
1268 DeviceState *dev = DEVICE(obj);
1269 S390PCIBusDevice *zpci = S390_PCI_DEVICE(obj);
1270 Property *prop = opaque;
1271 uint32_t *ptr = qdev_get_prop_ptr(dev, prop);
1273 if (dev->realized) {
1274 qdev_prop_set_after_realize(dev, name, errp);
1275 return;
1278 visit_type_uint32(v, name, ptr, errp);
1279 zpci->fid_defined = true;
1282 static const PropertyInfo s390_pci_fid_propinfo = {
1283 .name = "zpci_fid",
1284 .get = s390_pci_get_fid,
1285 .set = s390_pci_set_fid,
1288 #define DEFINE_PROP_S390_PCI_FID(_n, _s, _f) \
1289 DEFINE_PROP(_n, _s, _f, s390_pci_fid_propinfo, uint32_t)
1291 static Property s390_pci_device_properties[] = {
1292 DEFINE_PROP_UINT16("uid", S390PCIBusDevice, uid, UID_UNDEFINED),
1293 DEFINE_PROP_S390_PCI_FID("fid", S390PCIBusDevice, fid),
1294 DEFINE_PROP_STRING("target", S390PCIBusDevice, target),
1295 DEFINE_PROP_END_OF_LIST(),
1298 static const VMStateDescription s390_pci_device_vmstate = {
1299 .name = TYPE_S390_PCI_DEVICE,
1301 * TODO: add state handling here, so migration works at least with
1302 * emulated pci devices on s390x
1304 .unmigratable = 1,
1307 static void s390_pci_device_class_init(ObjectClass *klass, void *data)
1309 DeviceClass *dc = DEVICE_CLASS(klass);
1311 dc->desc = "zpci device";
1312 set_bit(DEVICE_CATEGORY_MISC, dc->categories);
1313 dc->reset = s390_pci_device_reset;
1314 dc->bus_type = TYPE_S390_PCI_BUS;
1315 dc->realize = s390_pci_device_realize;
1316 dc->props = s390_pci_device_properties;
1317 dc->vmsd = &s390_pci_device_vmstate;
1320 static const TypeInfo s390_pci_device_info = {
1321 .name = TYPE_S390_PCI_DEVICE,
1322 .parent = TYPE_DEVICE,
1323 .instance_size = sizeof(S390PCIBusDevice),
1324 .class_init = s390_pci_device_class_init,
1327 static TypeInfo s390_pci_iommu_info = {
1328 .name = TYPE_S390_PCI_IOMMU,
1329 .parent = TYPE_OBJECT,
1330 .instance_size = sizeof(S390PCIIOMMU),
1333 static void s390_iommu_memory_region_class_init(ObjectClass *klass, void *data)
1335 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_CLASS(klass);
1337 imrc->translate = s390_translate_iommu;
1338 imrc->replay = s390_pci_iommu_replay;
1341 static const TypeInfo s390_iommu_memory_region_info = {
1342 .parent = TYPE_IOMMU_MEMORY_REGION,
1343 .name = TYPE_S390_IOMMU_MEMORY_REGION,
1344 .class_init = s390_iommu_memory_region_class_init,
1347 static void s390_pci_register_types(void)
1349 type_register_static(&s390_pcihost_info);
1350 type_register_static(&s390_pcibus_info);
1351 type_register_static(&s390_pci_device_info);
1352 type_register_static(&s390_pci_iommu_info);
1353 type_register_static(&s390_iommu_memory_region_info);
1356 type_init(s390_pci_register_types)