3 * QEMU OldWorld PowerMac (currently ~G3 Beige) hardware System Emulator
5 * Copyright (c) 2004-2007 Fabrice Bellard
6 * Copyright (c) 2007 Jocelyn Mayer
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
27 #include "qemu/osdep.h"
28 #include "qemu-common.h"
29 #include "qemu/units.h"
30 #include "qapi/error.h"
32 #include "hw/ppc/ppc.h"
34 #include "hw/input/adb.h"
35 #include "sysemu/sysemu.h"
37 #include "hw/isa/isa.h"
38 #include "hw/pci/pci.h"
39 #include "hw/pci/pci_host.h"
40 #include "hw/boards.h"
41 #include "hw/nvram/fw_cfg.h"
42 #include "hw/char/escc.h"
43 #include "hw/misc/macio/macio.h"
45 #include "hw/loader.h"
46 #include "hw/fw-path-provider.h"
48 #include "qemu/error-report.h"
49 #include "sysemu/kvm.h"
51 #include "exec/address-spaces.h"
54 #define CFG_ADDR 0xf0000510
55 #define TBFREQ 16600000UL
56 #define CLOCKFREQ 266000000UL
57 #define BUSFREQ 66000000UL
59 #define NDRV_VGA_FILENAME "qemu_vga.ndrv"
61 #define GRACKLE_BASE 0xfec00000
63 static void fw_cfg_boot_set(void *opaque
, const char *boot_device
,
66 fw_cfg_modify_i16(opaque
, FW_CFG_BOOT_DEVICE
, boot_device
[0]);
69 static uint64_t translate_kernel_address(void *opaque
, uint64_t addr
)
71 return (addr
& 0x0fffffff) + KERNEL_LOAD_ADDR
;
74 static void ppc_heathrow_reset(void *opaque
)
76 PowerPCCPU
*cpu
= opaque
;
81 static void ppc_heathrow_init(MachineState
*machine
)
83 ram_addr_t ram_size
= machine
->ram_size
;
84 const char *kernel_filename
= machine
->kernel_filename
;
85 const char *kernel_cmdline
= machine
->kernel_cmdline
;
86 const char *initrd_filename
= machine
->initrd_filename
;
87 const char *boot_device
= machine
->boot_order
;
88 MemoryRegion
*sysmem
= get_system_memory();
89 PowerPCCPU
*cpu
= NULL
;
90 CPUPPCState
*env
= NULL
;
93 MemoryRegion
*ram
= g_new(MemoryRegion
, 1);
94 MemoryRegion
*bios
= g_new(MemoryRegion
, 1);
95 uint32_t kernel_base
, initrd_base
, cmdline_base
= 0;
96 int32_t kernel_size
, initrd_size
;
98 OldWorldMacIOState
*macio
;
99 MACIOIDEState
*macio_ide
;
101 DeviceState
*dev
, *pic_dev
;
104 unsigned int smp_cpus
= machine
->smp
.cpus
;
105 uint16_t ppc_boot_device
;
106 DriveInfo
*hd
[MAX_IDE_BUS
* MAX_IDE_DEVS
];
110 linux_boot
= (kernel_filename
!= NULL
);
113 for (i
= 0; i
< smp_cpus
; i
++) {
114 cpu
= POWERPC_CPU(cpu_create(machine
->cpu_type
));
117 /* Set time-base frequency to 16.6 Mhz */
118 cpu_ppc_tb_init(env
, TBFREQ
);
119 qemu_register_reset(ppc_heathrow_reset
, cpu
);
123 if (ram_size
> 2047 * MiB
) {
124 error_report("Too much memory for this machine: %" PRId64
" MB, "
125 "maximum 2047 MB", ram_size
/ MiB
);
129 memory_region_allocate_system_memory(ram
, NULL
, "ppc_heathrow.ram",
131 memory_region_add_subregion(sysmem
, 0, ram
);
133 /* allocate and load BIOS */
134 memory_region_init_ram(bios
, NULL
, "ppc_heathrow.bios", BIOS_SIZE
,
137 if (bios_name
== NULL
)
138 bios_name
= PROM_FILENAME
;
139 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, bios_name
);
140 memory_region_set_readonly(bios
, true);
141 memory_region_add_subregion(sysmem
, PROM_ADDR
, bios
);
143 /* Load OpenBIOS (ELF) */
145 bios_size
= load_elf(filename
, NULL
, 0, NULL
, NULL
, NULL
, NULL
,
146 1, PPC_ELF_MACHINE
, 0, 0);
151 if (bios_size
< 0 || bios_size
> BIOS_SIZE
) {
152 error_report("could not load PowerPC bios '%s'", bios_name
);
157 uint64_t lowaddr
= 0;
165 kernel_base
= KERNEL_LOAD_ADDR
;
166 kernel_size
= load_elf(kernel_filename
, NULL
,
167 translate_kernel_address
, NULL
,
168 NULL
, &lowaddr
, NULL
, 1, PPC_ELF_MACHINE
,
171 kernel_size
= load_aout(kernel_filename
, kernel_base
,
172 ram_size
- kernel_base
, bswap_needed
,
175 kernel_size
= load_image_targphys(kernel_filename
,
177 ram_size
- kernel_base
);
178 if (kernel_size
< 0) {
179 error_report("could not load kernel '%s'", kernel_filename
);
183 if (initrd_filename
) {
184 initrd_base
= TARGET_PAGE_ALIGN(kernel_base
+ kernel_size
+ KERNEL_GAP
);
185 initrd_size
= load_image_targphys(initrd_filename
, initrd_base
,
186 ram_size
- initrd_base
);
187 if (initrd_size
< 0) {
188 error_report("could not load initial ram disk '%s'",
192 cmdline_base
= TARGET_PAGE_ALIGN(initrd_base
+ initrd_size
);
196 cmdline_base
= TARGET_PAGE_ALIGN(kernel_base
+ kernel_size
+ KERNEL_GAP
);
198 ppc_boot_device
= 'm';
204 ppc_boot_device
= '\0';
205 for (i
= 0; boot_device
[i
] != '\0'; i
++) {
206 /* TOFIX: for now, the second IDE channel is not properly
207 * used by OHW. The Mac floppy disk are not emulated.
208 * For now, OHW cannot boot from the network.
211 if (boot_device
[i
] >= 'a' && boot_device
[i
] <= 'f') {
212 ppc_boot_device
= boot_device
[i
];
216 if (boot_device
[i
] >= 'c' && boot_device
[i
] <= 'd') {
217 ppc_boot_device
= boot_device
[i
];
222 if (ppc_boot_device
== '\0') {
223 error_report("No valid boot device for G3 Beige machine");
228 /* XXX: we register only 1 output pin for heathrow PIC */
229 pic_dev
= qdev_create(NULL
, TYPE_HEATHROW
);
230 qdev_init_nofail(pic_dev
);
232 /* Connect the heathrow PIC outputs to the 6xx bus */
233 for (i
= 0; i
< smp_cpus
; i
++) {
234 switch (PPC_INPUT(env
)) {
235 case PPC_FLAGS_INPUT_6xx
:
236 qdev_connect_gpio_out(pic_dev
, 0,
237 ((qemu_irq
*)env
->irq_inputs
)[PPC6xx_INPUT_INT
]);
240 error_report("Bus model not supported on OldWorld Mac machine");
245 /* Timebase Frequency */
247 tbfreq
= kvmppc_get_tbfreq();
252 /* init basic PC hardware */
253 if (PPC_INPUT(env
) != PPC_FLAGS_INPUT_6xx
) {
254 error_report("Only 6xx bus is supported on heathrow machine");
258 /* Grackle PCI host bridge */
259 dev
= qdev_create(NULL
, TYPE_GRACKLE_PCI_HOST_BRIDGE
);
260 qdev_prop_set_uint32(dev
, "ofw-addr", 0x80000000);
261 object_property_set_link(OBJECT(dev
), OBJECT(pic_dev
), "pic",
263 qdev_init_nofail(dev
);
264 s
= SYS_BUS_DEVICE(dev
);
265 sysbus_mmio_map(s
, 0, GRACKLE_BASE
);
266 sysbus_mmio_map(s
, 1, GRACKLE_BASE
+ 0x200000);
268 memory_region_add_subregion(get_system_memory(), 0x80000000ULL
,
269 sysbus_mmio_get_region(s
, 2));
270 /* Register 2 MB of ISA IO space */
271 memory_region_add_subregion(get_system_memory(), 0xfe000000,
272 sysbus_mmio_get_region(s
, 3));
274 pci_bus
= PCI_HOST_BRIDGE(dev
)->bus
;
276 pci_vga_init(pci_bus
);
278 for (i
= 0; i
< nb_nics
; i
++) {
279 pci_nic_init_nofail(&nd_table
[i
], pci_bus
, "ne2k_pci", NULL
);
282 ide_drive_get(hd
, ARRAY_SIZE(hd
));
285 macio
= OLDWORLD_MACIO(pci_create(pci_bus
, -1, TYPE_OLDWORLD_MACIO
));
287 qdev_prop_set_uint64(dev
, "frequency", tbfreq
);
288 object_property_set_link(OBJECT(macio
), OBJECT(pic_dev
), "pic",
290 qdev_init_nofail(dev
);
292 macio_ide
= MACIO_IDE(object_resolve_path_component(OBJECT(macio
),
294 macio_ide_init_drives(macio_ide
, hd
);
296 macio_ide
= MACIO_IDE(object_resolve_path_component(OBJECT(macio
),
298 macio_ide_init_drives(macio_ide
, &hd
[MAX_IDE_DEVS
]);
300 dev
= DEVICE(object_resolve_path_component(OBJECT(macio
), "cuda"));
301 adb_bus
= qdev_get_child_bus(dev
, "adb.0");
302 dev
= qdev_create(adb_bus
, TYPE_ADB_KEYBOARD
);
303 qdev_init_nofail(dev
);
304 dev
= qdev_create(adb_bus
, TYPE_ADB_MOUSE
);
305 qdev_init_nofail(dev
);
307 if (machine_usb(machine
)) {
308 pci_create_simple(pci_bus
, -1, "pci-ohci");
311 if (graphic_depth
!= 15 && graphic_depth
!= 32 && graphic_depth
!= 8)
314 /* No PCI init: the BIOS will do it */
316 dev
= qdev_create(NULL
, TYPE_FW_CFG_MEM
);
317 fw_cfg
= FW_CFG(dev
);
318 qdev_prop_set_uint32(dev
, "data_width", 1);
319 qdev_prop_set_bit(dev
, "dma_enabled", false);
320 object_property_add_child(OBJECT(qdev_get_machine()), TYPE_FW_CFG
,
321 OBJECT(fw_cfg
), NULL
);
322 qdev_init_nofail(dev
);
323 s
= SYS_BUS_DEVICE(dev
);
324 sysbus_mmio_map(s
, 0, CFG_ADDR
);
325 sysbus_mmio_map(s
, 1, CFG_ADDR
+ 2);
327 fw_cfg_add_i16(fw_cfg
, FW_CFG_NB_CPUS
, (uint16_t)smp_cpus
);
328 fw_cfg_add_i16(fw_cfg
, FW_CFG_MAX_CPUS
, (uint16_t)machine
->smp
.max_cpus
);
329 fw_cfg_add_i64(fw_cfg
, FW_CFG_RAM_SIZE
, (uint64_t)ram_size
);
330 fw_cfg_add_i16(fw_cfg
, FW_CFG_MACHINE_ID
, ARCH_HEATHROW
);
331 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_ADDR
, kernel_base
);
332 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_SIZE
, kernel_size
);
333 if (kernel_cmdline
) {
334 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_CMDLINE
, cmdline_base
);
335 pstrcpy_targphys("cmdline", cmdline_base
, TARGET_PAGE_SIZE
, kernel_cmdline
);
337 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_CMDLINE
, 0);
339 fw_cfg_add_i32(fw_cfg
, FW_CFG_INITRD_ADDR
, initrd_base
);
340 fw_cfg_add_i32(fw_cfg
, FW_CFG_INITRD_SIZE
, initrd_size
);
341 fw_cfg_add_i16(fw_cfg
, FW_CFG_BOOT_DEVICE
, ppc_boot_device
);
343 fw_cfg_add_i16(fw_cfg
, FW_CFG_PPC_WIDTH
, graphic_width
);
344 fw_cfg_add_i16(fw_cfg
, FW_CFG_PPC_HEIGHT
, graphic_height
);
345 fw_cfg_add_i16(fw_cfg
, FW_CFG_PPC_DEPTH
, graphic_depth
);
347 fw_cfg_add_i32(fw_cfg
, FW_CFG_PPC_IS_KVM
, kvm_enabled());
351 hypercall
= g_malloc(16);
352 kvmppc_get_hypercall(env
, hypercall
, 16);
353 fw_cfg_add_bytes(fw_cfg
, FW_CFG_PPC_KVM_HC
, hypercall
, 16);
354 fw_cfg_add_i32(fw_cfg
, FW_CFG_PPC_KVM_PID
, getpid());
356 fw_cfg_add_i32(fw_cfg
, FW_CFG_PPC_TBFREQ
, tbfreq
);
357 /* Mac OS X requires a "known good" clock-frequency value; pass it one. */
358 fw_cfg_add_i32(fw_cfg
, FW_CFG_PPC_CLOCKFREQ
, CLOCKFREQ
);
359 fw_cfg_add_i32(fw_cfg
, FW_CFG_PPC_BUSFREQ
, BUSFREQ
);
361 /* MacOS NDRV VGA driver */
362 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, NDRV_VGA_FILENAME
);
367 if (g_file_get_contents(filename
, &ndrv_file
, &ndrv_size
, NULL
)) {
368 fw_cfg_add_file(fw_cfg
, "ndrv/qemu_vga.ndrv", ndrv_file
, ndrv_size
);
373 qemu_register_boot_set(fw_cfg_boot_set
, fw_cfg
);
377 * Implementation of an interface to adjust firmware path
378 * for the bootindex property handling.
380 static char *heathrow_fw_dev_path(FWPathProvider
*p
, BusState
*bus
,
386 MACIOIDEState
*macio_ide
;
388 if (!strcmp(object_get_typename(OBJECT(dev
)), "macio-oldworld")) {
389 pci
= PCI_DEVICE(dev
);
390 return g_strdup_printf("mac-io@%x", PCI_SLOT(pci
->devfn
));
393 if (!strcmp(object_get_typename(OBJECT(dev
)), "macio-ide")) {
394 macio_ide
= MACIO_IDE(dev
);
395 return g_strdup_printf("ata-3@%x", macio_ide
->addr
);
398 if (!strcmp(object_get_typename(OBJECT(dev
)), "ide-drive")) {
399 ide_bus
= IDE_BUS(qdev_get_parent_bus(dev
));
400 ide_s
= idebus_active_if(ide_bus
);
402 if (ide_s
->drive_kind
== IDE_CD
) {
403 return g_strdup("cdrom");
406 return g_strdup("disk");
409 if (!strcmp(object_get_typename(OBJECT(dev
)), "ide-hd")) {
410 return g_strdup("disk");
413 if (!strcmp(object_get_typename(OBJECT(dev
)), "ide-cd")) {
414 return g_strdup("cdrom");
417 if (!strcmp(object_get_typename(OBJECT(dev
)), "virtio-blk-device")) {
418 return g_strdup("disk");
424 static int heathrow_kvm_type(MachineState
*machine
, const char *arg
)
426 /* Always force PR KVM */
430 static void heathrow_class_init(ObjectClass
*oc
, void *data
)
432 MachineClass
*mc
= MACHINE_CLASS(oc
);
433 FWPathProviderClass
*fwc
= FW_PATH_PROVIDER_CLASS(oc
);
435 mc
->desc
= "Heathrow based PowerMAC";
436 mc
->init
= ppc_heathrow_init
;
437 mc
->block_default_type
= IF_IDE
;
438 mc
->max_cpus
= MAX_CPUS
;
442 /* TOFIX "cad" when Mac floppy is implemented */
443 mc
->default_boot_order
= "cd";
444 mc
->kvm_type
= heathrow_kvm_type
;
445 mc
->default_cpu_type
= POWERPC_CPU_TYPE_NAME("750_v3.1");
446 mc
->default_display
= "std";
447 mc
->ignore_boot_device_suffixes
= true;
448 fwc
->get_dev_path
= heathrow_fw_dev_path
;
451 static const TypeInfo ppc_heathrow_machine_info
= {
452 .name
= MACHINE_TYPE_NAME("g3beige"),
453 .parent
= TYPE_MACHINE
,
454 .class_init
= heathrow_class_init
,
455 .interfaces
= (InterfaceInfo
[]) {
456 { TYPE_FW_PATH_PROVIDER
},
461 static void ppc_heathrow_register_types(void)
463 type_register_static(&ppc_heathrow_machine_info
);
466 type_init(ppc_heathrow_register_types
);