4 * Copyright (c) 2006 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License version 2 as published by the Free Software Foundation.
10 * This library is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * Lesser General Public License for more details.
15 * You should have received a copy of the GNU Lesser General Public
16 * License along with this library; if not, see <http://www.gnu.org/licenses/>
18 * Contributions after 2012-01-13 are licensed under the terms of the
19 * GNU GPL, version 2 or (at your option) any later version.
21 #include "qemu/osdep.h"
23 #include "hw/i386/pc.h"
24 #include "hw/isa/apm.h"
25 #include "hw/i2c/pm_smbus.h"
26 #include "hw/pci/pci.h"
27 #include "hw/acpi/acpi.h"
28 #include "sysemu/sysemu.h"
29 #include "qapi/error.h"
30 #include "qemu/range.h"
31 #include "exec/address-spaces.h"
32 #include "hw/acpi/piix4.h"
33 #include "hw/acpi/pcihp.h"
34 #include "hw/acpi/cpu_hotplug.h"
35 #include "hw/acpi/cpu.h"
36 #include "hw/hotplug.h"
37 #include "hw/mem/pc-dimm.h"
38 #include "hw/acpi/memory_hotplug.h"
39 #include "hw/acpi/acpi_dev_interface.h"
40 #include "hw/xen/xen.h"
44 #define GPE_BASE 0xafe0
48 uint32_t up
; /* deprecated, maintained for migration compatibility */
52 typedef struct PIIX4PMState
{
71 Notifier machine_ready
;
72 Notifier powerdown_notifier
;
74 AcpiPciHpState acpi_pci_hotplug
;
75 bool use_acpi_pci_hotplug
;
81 bool cpu_hotplug_legacy
;
82 AcpiCpuHotplug gpe_cpu
;
83 CPUHotplugState cpuhp_state
;
85 MemHotplugState acpi_memory_hotplug
;
88 #define PIIX4_PM(obj) \
89 OBJECT_CHECK(PIIX4PMState, (obj), TYPE_PIIX4_PM)
91 static void piix4_acpi_system_hot_add_init(MemoryRegion
*parent
,
92 PCIBus
*bus
, PIIX4PMState
*s
);
94 #define ACPI_ENABLE 0xf1
95 #define ACPI_DISABLE 0xf0
97 static void pm_tmr_timer(ACPIREGS
*ar
)
99 PIIX4PMState
*s
= container_of(ar
, PIIX4PMState
, ar
);
100 acpi_update_sci(&s
->ar
, s
->irq
);
103 static void apm_ctrl_changed(uint32_t val
, void *arg
)
105 PIIX4PMState
*s
= arg
;
106 PCIDevice
*d
= PCI_DEVICE(s
);
108 /* ACPI specs 3.0, 4.7.2.5 */
109 acpi_pm1_cnt_update(&s
->ar
, val
== ACPI_ENABLE
, val
== ACPI_DISABLE
);
110 if (val
== ACPI_ENABLE
|| val
== ACPI_DISABLE
) {
114 if (d
->config
[0x5b] & (1 << 1)) {
116 qemu_irq_raise(s
->smi_irq
);
121 static void pm_io_space_update(PIIX4PMState
*s
)
123 PCIDevice
*d
= PCI_DEVICE(s
);
125 s
->io_base
= le32_to_cpu(*(uint32_t *)(d
->config
+ 0x40));
126 s
->io_base
&= 0xffc0;
128 memory_region_transaction_begin();
129 memory_region_set_enabled(&s
->io
, d
->config
[0x80] & 1);
130 memory_region_set_address(&s
->io
, s
->io_base
);
131 memory_region_transaction_commit();
134 static void smbus_io_space_update(PIIX4PMState
*s
)
136 PCIDevice
*d
= PCI_DEVICE(s
);
138 s
->smb_io_base
= le32_to_cpu(*(uint32_t *)(d
->config
+ 0x90));
139 s
->smb_io_base
&= 0xffc0;
141 memory_region_transaction_begin();
142 memory_region_set_enabled(&s
->smb
.io
, d
->config
[0xd2] & 1);
143 memory_region_set_address(&s
->smb
.io
, s
->smb_io_base
);
144 memory_region_transaction_commit();
147 static void pm_write_config(PCIDevice
*d
,
148 uint32_t address
, uint32_t val
, int len
)
150 pci_default_write_config(d
, address
, val
, len
);
151 if (range_covers_byte(address
, len
, 0x80) ||
152 ranges_overlap(address
, len
, 0x40, 4)) {
153 pm_io_space_update((PIIX4PMState
*)d
);
155 if (range_covers_byte(address
, len
, 0xd2) ||
156 ranges_overlap(address
, len
, 0x90, 4)) {
157 smbus_io_space_update((PIIX4PMState
*)d
);
161 static int vmstate_acpi_post_load(void *opaque
, int version_id
)
163 PIIX4PMState
*s
= opaque
;
165 pm_io_space_update(s
);
166 smbus_io_space_update(s
);
170 #define VMSTATE_GPE_ARRAY(_field, _state) \
172 .name = (stringify(_field)), \
174 .info = &vmstate_info_uint16, \
175 .size = sizeof(uint16_t), \
176 .flags = VMS_SINGLE | VMS_POINTER, \
177 .offset = vmstate_offset_pointer(_state, _field, uint8_t), \
180 static const VMStateDescription vmstate_gpe
= {
183 .minimum_version_id
= 1,
184 .fields
= (VMStateField
[]) {
185 VMSTATE_GPE_ARRAY(sts
, ACPIGPE
),
186 VMSTATE_GPE_ARRAY(en
, ACPIGPE
),
187 VMSTATE_END_OF_LIST()
191 static const VMStateDescription vmstate_pci_status
= {
192 .name
= "pci_status",
194 .minimum_version_id
= 1,
195 .fields
= (VMStateField
[]) {
196 VMSTATE_UINT32(up
, struct AcpiPciHpPciStatus
),
197 VMSTATE_UINT32(down
, struct AcpiPciHpPciStatus
),
198 VMSTATE_END_OF_LIST()
202 static int acpi_load_old(QEMUFile
*f
, void *opaque
, int version_id
)
204 PIIX4PMState
*s
= opaque
;
208 ret
= pci_device_load(PCI_DEVICE(s
), f
);
212 qemu_get_be16s(f
, &s
->ar
.pm1
.evt
.sts
);
213 qemu_get_be16s(f
, &s
->ar
.pm1
.evt
.en
);
214 qemu_get_be16s(f
, &s
->ar
.pm1
.cnt
.cnt
);
216 ret
= vmstate_load_state(f
, &vmstate_apm
, &s
->apm
, 1);
221 timer_get(f
, s
->ar
.tmr
.timer
);
222 qemu_get_sbe64s(f
, &s
->ar
.tmr
.overflow_time
);
224 qemu_get_be16s(f
, (uint16_t *)s
->ar
.gpe
.sts
);
225 for (i
= 0; i
< 3; i
++) {
226 qemu_get_be16s(f
, &temp
);
229 qemu_get_be16s(f
, (uint16_t *)s
->ar
.gpe
.en
);
230 for (i
= 0; i
< 3; i
++) {
231 qemu_get_be16s(f
, &temp
);
234 ret
= vmstate_load_state(f
, &vmstate_pci_status
,
235 &s
->acpi_pci_hotplug
.acpi_pcihp_pci_status
[ACPI_PCIHP_BSEL_DEFAULT
], 1);
239 static bool vmstate_test_use_acpi_pci_hotplug(void *opaque
, int version_id
)
241 PIIX4PMState
*s
= opaque
;
242 return s
->use_acpi_pci_hotplug
;
245 static bool vmstate_test_no_use_acpi_pci_hotplug(void *opaque
, int version_id
)
247 PIIX4PMState
*s
= opaque
;
248 return !s
->use_acpi_pci_hotplug
;
251 static bool vmstate_test_use_memhp(void *opaque
)
253 PIIX4PMState
*s
= opaque
;
254 return s
->acpi_memory_hotplug
.is_enabled
;
257 static const VMStateDescription vmstate_memhp_state
= {
258 .name
= "piix4_pm/memhp",
260 .minimum_version_id
= 1,
261 .minimum_version_id_old
= 1,
262 .needed
= vmstate_test_use_memhp
,
263 .fields
= (VMStateField
[]) {
264 VMSTATE_MEMORY_HOTPLUG(acpi_memory_hotplug
, PIIX4PMState
),
265 VMSTATE_END_OF_LIST()
269 static bool vmstate_test_use_cpuhp(void *opaque
)
271 PIIX4PMState
*s
= opaque
;
272 return !s
->cpu_hotplug_legacy
;
275 static int vmstate_cpuhp_pre_load(void *opaque
)
277 Object
*obj
= OBJECT(opaque
);
278 object_property_set_bool(obj
, false, "cpu-hotplug-legacy", &error_abort
);
282 static const VMStateDescription vmstate_cpuhp_state
= {
283 .name
= "piix4_pm/cpuhp",
285 .minimum_version_id
= 1,
286 .minimum_version_id_old
= 1,
287 .needed
= vmstate_test_use_cpuhp
,
288 .pre_load
= vmstate_cpuhp_pre_load
,
289 .fields
= (VMStateField
[]) {
290 VMSTATE_CPU_HOTPLUG(cpuhp_state
, PIIX4PMState
),
291 VMSTATE_END_OF_LIST()
295 static bool piix4_vmstate_need_smbus(void *opaque
, int version_id
)
297 return pm_smbus_vmstate_needed();
300 /* qemu-kvm 1.2 uses version 3 but advertised as 2
301 * To support incoming qemu-kvm 1.2 migration, change version_id
302 * and minimum_version_id to 2 below (which breaks migration from
306 static const VMStateDescription vmstate_acpi
= {
309 .minimum_version_id
= 3,
310 .minimum_version_id_old
= 1,
311 .load_state_old
= acpi_load_old
,
312 .post_load
= vmstate_acpi_post_load
,
313 .fields
= (VMStateField
[]) {
314 VMSTATE_PCI_DEVICE(parent_obj
, PIIX4PMState
),
315 VMSTATE_UINT16(ar
.pm1
.evt
.sts
, PIIX4PMState
),
316 VMSTATE_UINT16(ar
.pm1
.evt
.en
, PIIX4PMState
),
317 VMSTATE_UINT16(ar
.pm1
.cnt
.cnt
, PIIX4PMState
),
318 VMSTATE_STRUCT(apm
, PIIX4PMState
, 0, vmstate_apm
, APMState
),
319 VMSTATE_STRUCT_TEST(smb
, PIIX4PMState
, piix4_vmstate_need_smbus
, 3,
320 pmsmb_vmstate
, PMSMBus
),
321 VMSTATE_TIMER_PTR(ar
.tmr
.timer
, PIIX4PMState
),
322 VMSTATE_INT64(ar
.tmr
.overflow_time
, PIIX4PMState
),
323 VMSTATE_STRUCT(ar
.gpe
, PIIX4PMState
, 2, vmstate_gpe
, ACPIGPE
),
325 acpi_pci_hotplug
.acpi_pcihp_pci_status
[ACPI_PCIHP_BSEL_DEFAULT
],
327 vmstate_test_no_use_acpi_pci_hotplug
,
328 2, vmstate_pci_status
,
329 struct AcpiPciHpPciStatus
),
330 VMSTATE_PCI_HOTPLUG(acpi_pci_hotplug
, PIIX4PMState
,
331 vmstate_test_use_acpi_pci_hotplug
),
332 VMSTATE_END_OF_LIST()
334 .subsections
= (const VMStateDescription
*[]) {
335 &vmstate_memhp_state
,
336 &vmstate_cpuhp_state
,
341 static void piix4_reset(void *opaque
)
343 PIIX4PMState
*s
= opaque
;
344 PCIDevice
*d
= PCI_DEVICE(s
);
345 uint8_t *pci_conf
= d
->config
;
352 pci_conf
[0x40] = 0x01; /* PM io base read only bit */
355 if (!s
->smm_enabled
) {
356 /* Mark SMM as already inited (until KVM supports SMM). */
357 pci_conf
[0x5B] = 0x02;
359 pm_io_space_update(s
);
360 acpi_pcihp_reset(&s
->acpi_pci_hotplug
);
363 static void piix4_pm_powerdown_req(Notifier
*n
, void *opaque
)
365 PIIX4PMState
*s
= container_of(n
, PIIX4PMState
, powerdown_notifier
);
368 acpi_pm1_evt_power_down(&s
->ar
);
371 static void piix4_device_pre_plug_cb(HotplugHandler
*hotplug_dev
,
372 DeviceState
*dev
, Error
**errp
)
374 PIIX4PMState
*s
= PIIX4_PM(hotplug_dev
);
376 if (object_dynamic_cast(OBJECT(dev
), TYPE_PCI_DEVICE
)) {
377 acpi_pcihp_device_pre_plug_cb(hotplug_dev
, dev
, errp
);
378 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
)) {
379 if (!s
->acpi_memory_hotplug
.is_enabled
) {
381 "memory hotplug is not enabled: %s.memory-hotplug-support "
382 "is not set", object_get_typename(OBJECT(s
)));
385 !object_dynamic_cast(OBJECT(dev
), TYPE_CPU
)) {
386 error_setg(errp
, "acpi: device pre plug request for not supported"
387 " device type: %s", object_get_typename(OBJECT(dev
)));
391 static void piix4_device_plug_cb(HotplugHandler
*hotplug_dev
,
392 DeviceState
*dev
, Error
**errp
)
394 PIIX4PMState
*s
= PIIX4_PM(hotplug_dev
);
396 if (object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
)) {
397 if (object_dynamic_cast(OBJECT(dev
), TYPE_NVDIMM
)) {
398 nvdimm_acpi_plug_cb(hotplug_dev
, dev
);
400 acpi_memory_plug_cb(hotplug_dev
, &s
->acpi_memory_hotplug
,
403 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_PCI_DEVICE
)) {
404 acpi_pcihp_device_plug_cb(hotplug_dev
, &s
->acpi_pci_hotplug
, dev
, errp
);
405 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_CPU
)) {
406 if (s
->cpu_hotplug_legacy
) {
407 legacy_acpi_cpu_plug_cb(hotplug_dev
, &s
->gpe_cpu
, dev
, errp
);
409 acpi_cpu_plug_cb(hotplug_dev
, &s
->cpuhp_state
, dev
, errp
);
412 g_assert_not_reached();
416 static void piix4_device_unplug_request_cb(HotplugHandler
*hotplug_dev
,
417 DeviceState
*dev
, Error
**errp
)
419 PIIX4PMState
*s
= PIIX4_PM(hotplug_dev
);
421 if (s
->acpi_memory_hotplug
.is_enabled
&&
422 object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
)) {
423 acpi_memory_unplug_request_cb(hotplug_dev
, &s
->acpi_memory_hotplug
,
425 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_PCI_DEVICE
)) {
426 acpi_pcihp_device_unplug_request_cb(hotplug_dev
, &s
->acpi_pci_hotplug
,
428 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_CPU
) &&
429 !s
->cpu_hotplug_legacy
) {
430 acpi_cpu_unplug_request_cb(hotplug_dev
, &s
->cpuhp_state
, dev
, errp
);
432 error_setg(errp
, "acpi: device unplug request for not supported device"
433 " type: %s", object_get_typename(OBJECT(dev
)));
437 static void piix4_device_unplug_cb(HotplugHandler
*hotplug_dev
,
438 DeviceState
*dev
, Error
**errp
)
440 PIIX4PMState
*s
= PIIX4_PM(hotplug_dev
);
442 if (s
->acpi_memory_hotplug
.is_enabled
&&
443 object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
)) {
444 acpi_memory_unplug_cb(&s
->acpi_memory_hotplug
, dev
, errp
);
445 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_PCI_DEVICE
)) {
446 acpi_pcihp_device_unplug_cb(hotplug_dev
, &s
->acpi_pci_hotplug
, dev
,
448 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_CPU
) &&
449 !s
->cpu_hotplug_legacy
) {
450 acpi_cpu_unplug_cb(&s
->cpuhp_state
, dev
, errp
);
452 error_setg(errp
, "acpi: device unplug for not supported device"
453 " type: %s", object_get_typename(OBJECT(dev
)));
457 static void piix4_pm_machine_ready(Notifier
*n
, void *opaque
)
459 PIIX4PMState
*s
= container_of(n
, PIIX4PMState
, machine_ready
);
460 PCIDevice
*d
= PCI_DEVICE(s
);
461 MemoryRegion
*io_as
= pci_address_space_io(d
);
464 pci_conf
= d
->config
;
465 pci_conf
[0x5f] = 0x10 |
466 (memory_region_present(io_as
, 0x378) ? 0x80 : 0);
467 pci_conf
[0x63] = 0x60;
468 pci_conf
[0x67] = (memory_region_present(io_as
, 0x3f8) ? 0x08 : 0) |
469 (memory_region_present(io_as
, 0x2f8) ? 0x90 : 0);
472 static void piix4_pm_add_propeties(PIIX4PMState
*s
)
474 static const uint8_t acpi_enable_cmd
= ACPI_ENABLE
;
475 static const uint8_t acpi_disable_cmd
= ACPI_DISABLE
;
476 static const uint32_t gpe0_blk
= GPE_BASE
;
477 static const uint32_t gpe0_blk_len
= GPE_LEN
;
478 static const uint16_t sci_int
= 9;
480 object_property_add_uint8_ptr(OBJECT(s
), ACPI_PM_PROP_ACPI_ENABLE_CMD
,
481 &acpi_enable_cmd
, NULL
);
482 object_property_add_uint8_ptr(OBJECT(s
), ACPI_PM_PROP_ACPI_DISABLE_CMD
,
483 &acpi_disable_cmd
, NULL
);
484 object_property_add_uint32_ptr(OBJECT(s
), ACPI_PM_PROP_GPE0_BLK
,
486 object_property_add_uint32_ptr(OBJECT(s
), ACPI_PM_PROP_GPE0_BLK_LEN
,
487 &gpe0_blk_len
, NULL
);
488 object_property_add_uint16_ptr(OBJECT(s
), ACPI_PM_PROP_SCI_INT
,
490 object_property_add_uint32_ptr(OBJECT(s
), ACPI_PM_PROP_PM_IO_BASE
,
494 static void piix4_pm_realize(PCIDevice
*dev
, Error
**errp
)
496 PIIX4PMState
*s
= PIIX4_PM(dev
);
499 pci_conf
= dev
->config
;
500 pci_conf
[0x06] = 0x80;
501 pci_conf
[0x07] = 0x02;
502 pci_conf
[0x09] = 0x00;
503 pci_conf
[0x3d] = 0x01; // interrupt pin 1
506 apm_init(dev
, &s
->apm
, apm_ctrl_changed
, s
);
508 if (!s
->smm_enabled
) {
509 /* Mark SMM as already inited to prevent SMM from running. KVM does not
510 * support SMM mode. */
511 pci_conf
[0x5B] = 0x02;
514 /* XXX: which specification is used ? The i82731AB has different
516 pci_conf
[0x90] = s
->smb_io_base
| 1;
517 pci_conf
[0x91] = s
->smb_io_base
>> 8;
518 pci_conf
[0xd2] = 0x09;
519 pm_smbus_init(DEVICE(dev
), &s
->smb
, true);
520 memory_region_set_enabled(&s
->smb
.io
, pci_conf
[0xd2] & 1);
521 memory_region_add_subregion(pci_address_space_io(dev
),
522 s
->smb_io_base
, &s
->smb
.io
);
524 memory_region_init(&s
->io
, OBJECT(s
), "piix4-pm", 64);
525 memory_region_set_enabled(&s
->io
, false);
526 memory_region_add_subregion(pci_address_space_io(dev
),
529 acpi_pm_tmr_init(&s
->ar
, pm_tmr_timer
, &s
->io
);
530 acpi_pm1_evt_init(&s
->ar
, pm_tmr_timer
, &s
->io
);
531 acpi_pm1_cnt_init(&s
->ar
, &s
->io
, s
->disable_s3
, s
->disable_s4
, s
->s4_val
);
532 acpi_gpe_init(&s
->ar
, GPE_LEN
);
534 s
->powerdown_notifier
.notify
= piix4_pm_powerdown_req
;
535 qemu_register_powerdown_notifier(&s
->powerdown_notifier
);
537 s
->machine_ready
.notify
= piix4_pm_machine_ready
;
538 qemu_add_machine_init_done_notifier(&s
->machine_ready
);
539 qemu_register_reset(piix4_reset
, s
);
541 piix4_acpi_system_hot_add_init(pci_address_space_io(dev
),
542 pci_get_bus(dev
), s
);
543 qbus_set_hotplug_handler(BUS(pci_get_bus(dev
)), OBJECT(s
), &error_abort
);
545 piix4_pm_add_propeties(s
);
548 I2CBus
*piix4_pm_init(PCIBus
*bus
, int devfn
, uint32_t smb_io_base
,
549 qemu_irq sci_irq
, qemu_irq smi_irq
,
550 int smm_enabled
, DeviceState
**piix4_pm
)
555 dev
= DEVICE(pci_create(bus
, devfn
, TYPE_PIIX4_PM
));
556 qdev_prop_set_uint32(dev
, "smb_io_base", smb_io_base
);
563 s
->smi_irq
= smi_irq
;
564 s
->smm_enabled
= smm_enabled
;
566 s
->use_acpi_pci_hotplug
= false;
569 qdev_init_nofail(dev
);
574 static uint64_t gpe_readb(void *opaque
, hwaddr addr
, unsigned width
)
576 PIIX4PMState
*s
= opaque
;
577 uint32_t val
= acpi_gpe_ioport_readb(&s
->ar
, addr
);
579 trace_piix4_gpe_readb(addr
, width
, val
);
583 static void gpe_writeb(void *opaque
, hwaddr addr
, uint64_t val
,
586 PIIX4PMState
*s
= opaque
;
588 trace_piix4_gpe_writeb(addr
, width
, val
);
589 acpi_gpe_ioport_writeb(&s
->ar
, addr
, val
);
590 acpi_update_sci(&s
->ar
, s
->irq
);
593 static const MemoryRegionOps piix4_gpe_ops
= {
596 .valid
.min_access_size
= 1,
597 .valid
.max_access_size
= 4,
598 .impl
.min_access_size
= 1,
599 .impl
.max_access_size
= 1,
600 .endianness
= DEVICE_LITTLE_ENDIAN
,
604 static bool piix4_get_cpu_hotplug_legacy(Object
*obj
, Error
**errp
)
606 PIIX4PMState
*s
= PIIX4_PM(obj
);
608 return s
->cpu_hotplug_legacy
;
611 static void piix4_set_cpu_hotplug_legacy(Object
*obj
, bool value
, Error
**errp
)
613 PIIX4PMState
*s
= PIIX4_PM(obj
);
616 if (s
->cpu_hotplug_legacy
&& value
== false) {
617 acpi_switch_to_modern_cphp(&s
->gpe_cpu
, &s
->cpuhp_state
,
618 PIIX4_CPU_HOTPLUG_IO_BASE
);
620 s
->cpu_hotplug_legacy
= value
;
623 static void piix4_acpi_system_hot_add_init(MemoryRegion
*parent
,
624 PCIBus
*bus
, PIIX4PMState
*s
)
626 memory_region_init_io(&s
->io_gpe
, OBJECT(s
), &piix4_gpe_ops
, s
,
627 "acpi-gpe0", GPE_LEN
);
628 memory_region_add_subregion(parent
, GPE_BASE
, &s
->io_gpe
);
630 acpi_pcihp_init(OBJECT(s
), &s
->acpi_pci_hotplug
, bus
, parent
,
631 s
->use_acpi_pci_hotplug
);
633 s
->cpu_hotplug_legacy
= true;
634 object_property_add_bool(OBJECT(s
), "cpu-hotplug-legacy",
635 piix4_get_cpu_hotplug_legacy
,
636 piix4_set_cpu_hotplug_legacy
,
638 legacy_acpi_cpu_hotplug_init(parent
, OBJECT(s
), &s
->gpe_cpu
,
639 PIIX4_CPU_HOTPLUG_IO_BASE
);
641 if (s
->acpi_memory_hotplug
.is_enabled
) {
642 acpi_memory_hotplug_init(parent
, OBJECT(s
), &s
->acpi_memory_hotplug
,
643 ACPI_MEMORY_HOTPLUG_BASE
);
647 static void piix4_ospm_status(AcpiDeviceIf
*adev
, ACPIOSTInfoList
***list
)
649 PIIX4PMState
*s
= PIIX4_PM(adev
);
651 acpi_memory_ospm_status(&s
->acpi_memory_hotplug
, list
);
652 if (!s
->cpu_hotplug_legacy
) {
653 acpi_cpu_ospm_status(&s
->cpuhp_state
, list
);
657 static void piix4_send_gpe(AcpiDeviceIf
*adev
, AcpiEventStatusBits ev
)
659 PIIX4PMState
*s
= PIIX4_PM(adev
);
661 acpi_send_gpe_event(&s
->ar
, s
->irq
, ev
);
664 static Property piix4_pm_properties
[] = {
665 DEFINE_PROP_UINT32("smb_io_base", PIIX4PMState
, smb_io_base
, 0),
666 DEFINE_PROP_UINT8(ACPI_PM_PROP_S3_DISABLED
, PIIX4PMState
, disable_s3
, 0),
667 DEFINE_PROP_UINT8(ACPI_PM_PROP_S4_DISABLED
, PIIX4PMState
, disable_s4
, 0),
668 DEFINE_PROP_UINT8(ACPI_PM_PROP_S4_VAL
, PIIX4PMState
, s4_val
, 2),
669 DEFINE_PROP_BOOL("acpi-pci-hotplug-with-bridge-support", PIIX4PMState
,
670 use_acpi_pci_hotplug
, true),
671 DEFINE_PROP_BOOL("memory-hotplug-support", PIIX4PMState
,
672 acpi_memory_hotplug
.is_enabled
, true),
673 DEFINE_PROP_END_OF_LIST(),
676 static void piix4_pm_class_init(ObjectClass
*klass
, void *data
)
678 DeviceClass
*dc
= DEVICE_CLASS(klass
);
679 PCIDeviceClass
*k
= PCI_DEVICE_CLASS(klass
);
680 HotplugHandlerClass
*hc
= HOTPLUG_HANDLER_CLASS(klass
);
681 AcpiDeviceIfClass
*adevc
= ACPI_DEVICE_IF_CLASS(klass
);
683 k
->realize
= piix4_pm_realize
;
684 k
->config_write
= pm_write_config
;
685 k
->vendor_id
= PCI_VENDOR_ID_INTEL
;
686 k
->device_id
= PCI_DEVICE_ID_INTEL_82371AB_3
;
688 k
->class_id
= PCI_CLASS_BRIDGE_OTHER
;
690 dc
->vmsd
= &vmstate_acpi
;
691 dc
->props
= piix4_pm_properties
;
693 * Reason: part of PIIX4 southbridge, needs to be wired up,
694 * e.g. by mips_malta_init()
696 dc
->user_creatable
= false;
697 dc
->hotpluggable
= false;
698 hc
->pre_plug
= piix4_device_pre_plug_cb
;
699 hc
->plug
= piix4_device_plug_cb
;
700 hc
->unplug_request
= piix4_device_unplug_request_cb
;
701 hc
->unplug
= piix4_device_unplug_cb
;
702 adevc
->ospm_status
= piix4_ospm_status
;
703 adevc
->send_event
= piix4_send_gpe
;
704 adevc
->madt_cpu
= pc_madt_cpu_entry
;
707 static const TypeInfo piix4_pm_info
= {
708 .name
= TYPE_PIIX4_PM
,
709 .parent
= TYPE_PCI_DEVICE
,
710 .instance_size
= sizeof(PIIX4PMState
),
711 .class_init
= piix4_pm_class_init
,
712 .interfaces
= (InterfaceInfo
[]) {
713 { TYPE_HOTPLUG_HANDLER
},
714 { TYPE_ACPI_DEVICE_IF
},
715 { INTERFACE_CONVENTIONAL_PCI_DEVICE
},
720 static void piix4_pm_register_types(void)
722 type_register_static(&piix4_pm_info
);
725 type_init(piix4_pm_register_types
)