target-arm: Recognize UXTB, UXTH, LSR, LSL
[qemu/ar7.git] / cpu-exec.c
blob6b6942de698c076d6e7dbb8dbe70760f9bd68830
1 /*
2 * emulator main execution loop
4 * Copyright (c) 2003-2005 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
19 #include "config.h"
20 #include "cpu.h"
21 #include "trace.h"
22 #include "disas/disas.h"
23 #include "tcg.h"
24 #include "qemu/atomic.h"
25 #include "sysemu/qtest.h"
26 #include "qemu/timer.h"
27 #include "exec/address-spaces.h"
28 #include "exec/memory-internal.h"
29 #include "qemu/rcu.h"
30 #include "exec/tb-hash.h"
32 /* -icount align implementation. */
34 typedef struct SyncClocks {
35 int64_t diff_clk;
36 int64_t last_cpu_icount;
37 int64_t realtime_clock;
38 } SyncClocks;
40 #if !defined(CONFIG_USER_ONLY)
41 /* Allow the guest to have a max 3ms advance.
42 * The difference between the 2 clocks could therefore
43 * oscillate around 0.
45 #define VM_CLOCK_ADVANCE 3000000
46 #define THRESHOLD_REDUCE 1.5
47 #define MAX_DELAY_PRINT_RATE 2000000000LL
48 #define MAX_NB_PRINTS 100
50 static void align_clocks(SyncClocks *sc, const CPUState *cpu)
52 int64_t cpu_icount;
54 if (!icount_align_option) {
55 return;
58 cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low;
59 sc->diff_clk += cpu_icount_to_ns(sc->last_cpu_icount - cpu_icount);
60 sc->last_cpu_icount = cpu_icount;
62 if (sc->diff_clk > VM_CLOCK_ADVANCE) {
63 #ifndef _WIN32
64 struct timespec sleep_delay, rem_delay;
65 sleep_delay.tv_sec = sc->diff_clk / 1000000000LL;
66 sleep_delay.tv_nsec = sc->diff_clk % 1000000000LL;
67 if (nanosleep(&sleep_delay, &rem_delay) < 0) {
68 sc->diff_clk = rem_delay.tv_sec * 1000000000LL + rem_delay.tv_nsec;
69 } else {
70 sc->diff_clk = 0;
72 #else
73 Sleep(sc->diff_clk / SCALE_MS);
74 sc->diff_clk = 0;
75 #endif
79 static void print_delay(const SyncClocks *sc)
81 static float threshold_delay;
82 static int64_t last_realtime_clock;
83 static int nb_prints;
85 if (icount_align_option &&
86 sc->realtime_clock - last_realtime_clock >= MAX_DELAY_PRINT_RATE &&
87 nb_prints < MAX_NB_PRINTS) {
88 if ((-sc->diff_clk / (float)1000000000LL > threshold_delay) ||
89 (-sc->diff_clk / (float)1000000000LL <
90 (threshold_delay - THRESHOLD_REDUCE))) {
91 threshold_delay = (-sc->diff_clk / 1000000000LL) + 1;
92 printf("Warning: The guest is now late by %.1f to %.1f seconds\n",
93 threshold_delay - 1,
94 threshold_delay);
95 nb_prints++;
96 last_realtime_clock = sc->realtime_clock;
101 static void init_delay_params(SyncClocks *sc,
102 const CPUState *cpu)
104 if (!icount_align_option) {
105 return;
107 sc->realtime_clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL_RT);
108 sc->diff_clk = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - sc->realtime_clock;
109 sc->last_cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low;
110 if (sc->diff_clk < max_delay) {
111 max_delay = sc->diff_clk;
113 if (sc->diff_clk > max_advance) {
114 max_advance = sc->diff_clk;
117 /* Print every 2s max if the guest is late. We limit the number
118 of printed messages to NB_PRINT_MAX(currently 100) */
119 print_delay(sc);
121 #else
122 static void align_clocks(SyncClocks *sc, const CPUState *cpu)
126 static void init_delay_params(SyncClocks *sc, const CPUState *cpu)
129 #endif /* CONFIG USER ONLY */
131 void cpu_loop_exit(CPUState *cpu)
133 cpu->current_tb = NULL;
134 siglongjmp(cpu->jmp_env, 1);
137 void cpu_loop_exit_restore(CPUState *cpu, uintptr_t pc)
139 if (pc) {
140 cpu_restore_state(cpu, pc);
142 cpu->current_tb = NULL;
143 siglongjmp(cpu->jmp_env, 1);
146 /* exit the current TB from a signal handler. The host registers are
147 restored in a state compatible with the CPU emulator
149 #if defined(CONFIG_SOFTMMU)
150 void cpu_resume_from_signal(CPUState *cpu, void *puc)
152 /* XXX: restore cpu registers saved in host registers */
154 cpu->exception_index = -1;
155 siglongjmp(cpu->jmp_env, 1);
158 void cpu_reload_memory_map(CPUState *cpu)
160 AddressSpaceDispatch *d;
162 if (qemu_in_vcpu_thread()) {
163 /* Do not let the guest prolong the critical section as much as it
164 * as it desires.
166 * Currently, this is prevented by the I/O thread's periodinc kicking
167 * of the VCPU thread (iothread_requesting_mutex, qemu_cpu_kick_thread)
168 * but this will go away once TCG's execution moves out of the global
169 * mutex.
171 * This pair matches cpu_exec's rcu_read_lock()/rcu_read_unlock(), which
172 * only protects cpu->as->dispatch. Since we reload it below, we can
173 * split the critical section.
175 rcu_read_unlock();
176 rcu_read_lock();
179 /* The CPU and TLB are protected by the iothread lock. */
180 d = atomic_rcu_read(&cpu->as->dispatch);
181 cpu->memory_dispatch = d;
182 tlb_flush(cpu, 1);
184 #endif
186 /* Execute a TB, and fix up the CPU state afterwards if necessary */
187 static inline tcg_target_ulong cpu_tb_exec(CPUState *cpu, uint8_t *tb_ptr)
189 CPUArchState *env = cpu->env_ptr;
190 uintptr_t next_tb;
192 #if defined(DEBUG_DISAS)
193 if (qemu_loglevel_mask(CPU_LOG_TB_CPU)) {
194 #if defined(TARGET_I386)
195 log_cpu_state(cpu, CPU_DUMP_CCOP);
196 #elif defined(TARGET_M68K)
197 /* ??? Should not modify env state for dumping. */
198 cpu_m68k_flush_flags(env, env->cc_op);
199 env->cc_op = CC_OP_FLAGS;
200 env->sr = (env->sr & 0xffe0) | env->cc_dest | (env->cc_x << 4);
201 log_cpu_state(cpu, 0);
202 #else
203 log_cpu_state(cpu, 0);
204 #endif
206 #endif /* DEBUG_DISAS */
208 cpu->can_do_io = !use_icount;
209 next_tb = tcg_qemu_tb_exec(env, tb_ptr);
210 cpu->can_do_io = 1;
211 trace_exec_tb_exit((void *) (next_tb & ~TB_EXIT_MASK),
212 next_tb & TB_EXIT_MASK);
214 if ((next_tb & TB_EXIT_MASK) > TB_EXIT_IDX1) {
215 /* We didn't start executing this TB (eg because the instruction
216 * counter hit zero); we must restore the guest PC to the address
217 * of the start of the TB.
219 CPUClass *cc = CPU_GET_CLASS(cpu);
220 TranslationBlock *tb = (TranslationBlock *)(next_tb & ~TB_EXIT_MASK);
221 if (cc->synchronize_from_tb) {
222 cc->synchronize_from_tb(cpu, tb);
223 } else {
224 assert(cc->set_pc);
225 cc->set_pc(cpu, tb->pc);
228 if ((next_tb & TB_EXIT_MASK) == TB_EXIT_REQUESTED) {
229 /* We were asked to stop executing TBs (probably a pending
230 * interrupt. We've now stopped, so clear the flag.
232 cpu->tcg_exit_req = 0;
234 return next_tb;
237 /* Execute the code without caching the generated code. An interpreter
238 could be used if available. */
239 static void cpu_exec_nocache(CPUState *cpu, int max_cycles,
240 TranslationBlock *orig_tb)
242 TranslationBlock *tb;
244 /* Should never happen.
245 We only end up here when an existing TB is too long. */
246 if (max_cycles > CF_COUNT_MASK)
247 max_cycles = CF_COUNT_MASK;
249 tb = tb_gen_code(cpu, orig_tb->pc, orig_tb->cs_base, orig_tb->flags,
250 max_cycles | CF_NOCACHE);
251 tb->orig_tb = tcg_ctx.tb_ctx.tb_invalidated_flag ? NULL : orig_tb;
252 cpu->current_tb = tb;
253 /* execute the generated code */
254 trace_exec_tb_nocache(tb, tb->pc);
255 cpu_tb_exec(cpu, tb->tc_ptr);
256 cpu->current_tb = NULL;
257 tb_phys_invalidate(tb, -1);
258 tb_free(tb);
261 static TranslationBlock *tb_find_slow(CPUState *cpu,
262 target_ulong pc,
263 target_ulong cs_base,
264 uint64_t flags)
266 CPUArchState *env = (CPUArchState *)cpu->env_ptr;
267 TranslationBlock *tb, **ptb1;
268 unsigned int h;
269 tb_page_addr_t phys_pc, phys_page1;
270 target_ulong virt_page2;
272 tcg_ctx.tb_ctx.tb_invalidated_flag = 0;
274 /* find translated block using physical mappings */
275 phys_pc = get_page_addr_code(env, pc);
276 phys_page1 = phys_pc & TARGET_PAGE_MASK;
277 h = tb_phys_hash_func(phys_pc);
278 ptb1 = &tcg_ctx.tb_ctx.tb_phys_hash[h];
279 for(;;) {
280 tb = *ptb1;
281 if (!tb)
282 goto not_found;
283 if (tb->pc == pc &&
284 tb->page_addr[0] == phys_page1 &&
285 tb->cs_base == cs_base &&
286 tb->flags == flags) {
287 /* check next page if needed */
288 if (tb->page_addr[1] != -1) {
289 tb_page_addr_t phys_page2;
291 virt_page2 = (pc & TARGET_PAGE_MASK) +
292 TARGET_PAGE_SIZE;
293 phys_page2 = get_page_addr_code(env, virt_page2);
294 if (tb->page_addr[1] == phys_page2)
295 goto found;
296 } else {
297 goto found;
300 ptb1 = &tb->phys_hash_next;
302 not_found:
303 /* if no translated code available, then translate it now */
304 tb = tb_gen_code(cpu, pc, cs_base, flags, 0);
306 found:
307 /* Move the last found TB to the head of the list */
308 if (likely(*ptb1)) {
309 *ptb1 = tb->phys_hash_next;
310 tb->phys_hash_next = tcg_ctx.tb_ctx.tb_phys_hash[h];
311 tcg_ctx.tb_ctx.tb_phys_hash[h] = tb;
313 /* we add the TB in the virtual pc hash table */
314 cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)] = tb;
315 return tb;
318 static inline TranslationBlock *tb_find_fast(CPUState *cpu)
320 CPUArchState *env = (CPUArchState *)cpu->env_ptr;
321 TranslationBlock *tb;
322 target_ulong cs_base, pc;
323 int flags;
325 /* we record a subset of the CPU state. It will
326 always be the same before a given translated block
327 is executed. */
328 cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags);
329 tb = cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)];
330 if (unlikely(!tb || tb->pc != pc || tb->cs_base != cs_base ||
331 tb->flags != flags)) {
332 tb = tb_find_slow(cpu, pc, cs_base, flags);
334 return tb;
337 static void cpu_handle_debug_exception(CPUState *cpu)
339 CPUClass *cc = CPU_GET_CLASS(cpu);
340 CPUWatchpoint *wp;
342 if (!cpu->watchpoint_hit) {
343 QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
344 wp->flags &= ~BP_WATCHPOINT_HIT;
348 cc->debug_excp_handler(cpu);
351 /* main execution loop */
353 volatile sig_atomic_t exit_request;
355 int cpu_exec(CPUState *cpu)
357 CPUClass *cc = CPU_GET_CLASS(cpu);
358 #ifdef TARGET_I386
359 X86CPU *x86_cpu = X86_CPU(cpu);
360 CPUArchState *env = &x86_cpu->env;
361 #endif
362 int ret, interrupt_request;
363 TranslationBlock *tb;
364 uint8_t *tc_ptr;
365 uintptr_t next_tb;
366 SyncClocks sc;
368 /* This must be volatile so it is not trashed by longjmp() */
369 volatile bool have_tb_lock = false;
371 if (cpu->halted) {
372 if (!cpu_has_work(cpu)) {
373 return EXCP_HALTED;
376 cpu->halted = 0;
379 current_cpu = cpu;
381 /* As long as current_cpu is null, up to the assignment just above,
382 * requests by other threads to exit the execution loop are expected to
383 * be issued using the exit_request global. We must make sure that our
384 * evaluation of the global value is performed past the current_cpu
385 * value transition point, which requires a memory barrier as well as
386 * an instruction scheduling constraint on modern architectures. */
387 smp_mb();
389 rcu_read_lock();
391 if (unlikely(exit_request)) {
392 cpu->exit_request = 1;
395 cc->cpu_exec_enter(cpu);
397 /* Calculate difference between guest clock and host clock.
398 * This delay includes the delay of the last cycle, so
399 * what we have to do is sleep until it is 0. As for the
400 * advance/delay we gain here, we try to fix it next time.
402 init_delay_params(&sc, cpu);
404 /* prepare setjmp context for exception handling */
405 for(;;) {
406 if (sigsetjmp(cpu->jmp_env, 0) == 0) {
407 /* if an exception is pending, we execute it here */
408 if (cpu->exception_index >= 0) {
409 if (cpu->exception_index >= EXCP_INTERRUPT) {
410 /* exit request from the cpu execution loop */
411 ret = cpu->exception_index;
412 if (ret == EXCP_DEBUG) {
413 cpu_handle_debug_exception(cpu);
415 cpu->exception_index = -1;
416 break;
417 } else {
418 #if defined(CONFIG_USER_ONLY)
419 /* if user mode only, we simulate a fake exception
420 which will be handled outside the cpu execution
421 loop */
422 #if defined(TARGET_I386)
423 cc->do_interrupt(cpu);
424 #endif
425 ret = cpu->exception_index;
426 cpu->exception_index = -1;
427 break;
428 #else
429 cc->do_interrupt(cpu);
430 cpu->exception_index = -1;
431 #endif
435 next_tb = 0; /* force lookup of first TB */
436 for(;;) {
437 interrupt_request = cpu->interrupt_request;
438 if (unlikely(interrupt_request)) {
439 if (unlikely(cpu->singlestep_enabled & SSTEP_NOIRQ)) {
440 /* Mask out external interrupts for this step. */
441 interrupt_request &= ~CPU_INTERRUPT_SSTEP_MASK;
443 if (interrupt_request & CPU_INTERRUPT_DEBUG) {
444 cpu->interrupt_request &= ~CPU_INTERRUPT_DEBUG;
445 cpu->exception_index = EXCP_DEBUG;
446 cpu_loop_exit(cpu);
448 if (interrupt_request & CPU_INTERRUPT_HALT) {
449 cpu->interrupt_request &= ~CPU_INTERRUPT_HALT;
450 cpu->halted = 1;
451 cpu->exception_index = EXCP_HLT;
452 cpu_loop_exit(cpu);
454 #if defined(TARGET_I386)
455 if (interrupt_request & CPU_INTERRUPT_INIT) {
456 cpu_svm_check_intercept_param(env, SVM_EXIT_INIT, 0);
457 do_cpu_init(x86_cpu);
458 cpu->exception_index = EXCP_HALTED;
459 cpu_loop_exit(cpu);
461 #else
462 if (interrupt_request & CPU_INTERRUPT_RESET) {
463 cpu_reset(cpu);
465 #endif
466 /* The target hook has 3 exit conditions:
467 False when the interrupt isn't processed,
468 True when it is, and we should restart on a new TB,
469 and via longjmp via cpu_loop_exit. */
470 if (cc->cpu_exec_interrupt(cpu, interrupt_request)) {
471 next_tb = 0;
473 /* Don't use the cached interrupt_request value,
474 do_interrupt may have updated the EXITTB flag. */
475 if (cpu->interrupt_request & CPU_INTERRUPT_EXITTB) {
476 cpu->interrupt_request &= ~CPU_INTERRUPT_EXITTB;
477 /* ensure that no TB jump will be modified as
478 the program flow was changed */
479 next_tb = 0;
482 if (unlikely(cpu->exit_request)) {
483 cpu->exit_request = 0;
484 cpu->exception_index = EXCP_INTERRUPT;
485 cpu_loop_exit(cpu);
487 spin_lock(&tcg_ctx.tb_ctx.tb_lock);
488 have_tb_lock = true;
489 tb = tb_find_fast(cpu);
490 /* Note: we do it here to avoid a gcc bug on Mac OS X when
491 doing it in tb_find_slow */
492 if (tcg_ctx.tb_ctx.tb_invalidated_flag) {
493 /* as some TB could have been invalidated because
494 of memory exceptions while generating the code, we
495 must recompute the hash index here */
496 next_tb = 0;
497 tcg_ctx.tb_ctx.tb_invalidated_flag = 0;
499 if (qemu_loglevel_mask(CPU_LOG_EXEC)) {
500 qemu_log("Trace %p [" TARGET_FMT_lx "] %s\n",
501 tb->tc_ptr, tb->pc, lookup_symbol(tb->pc));
503 /* see if we can patch the calling TB. When the TB
504 spans two pages, we cannot safely do a direct
505 jump. */
506 if (next_tb != 0 && tb->page_addr[1] == -1) {
507 tb_add_jump((TranslationBlock *)(next_tb & ~TB_EXIT_MASK),
508 next_tb & TB_EXIT_MASK, tb);
510 have_tb_lock = false;
511 spin_unlock(&tcg_ctx.tb_ctx.tb_lock);
513 /* cpu_interrupt might be called while translating the
514 TB, but before it is linked into a potentially
515 infinite loop and becomes env->current_tb. Avoid
516 starting execution if there is a pending interrupt. */
517 cpu->current_tb = tb;
518 barrier();
519 if (likely(!cpu->exit_request)) {
520 trace_exec_tb(tb, tb->pc);
521 tc_ptr = tb->tc_ptr;
522 /* execute the generated code */
523 next_tb = cpu_tb_exec(cpu, tc_ptr);
524 switch (next_tb & TB_EXIT_MASK) {
525 case TB_EXIT_REQUESTED:
526 /* Something asked us to stop executing
527 * chained TBs; just continue round the main
528 * loop. Whatever requested the exit will also
529 * have set something else (eg exit_request or
530 * interrupt_request) which we will handle
531 * next time around the loop.
533 next_tb = 0;
534 break;
535 case TB_EXIT_ICOUNT_EXPIRED:
537 /* Instruction counter expired. */
538 int insns_left = cpu->icount_decr.u32;
539 if (cpu->icount_extra && insns_left >= 0) {
540 /* Refill decrementer and continue execution. */
541 cpu->icount_extra += insns_left;
542 insns_left = MIN(0xffff, cpu->icount_extra);
543 cpu->icount_extra -= insns_left;
544 cpu->icount_decr.u16.low = insns_left;
545 } else {
546 if (insns_left > 0) {
547 /* Execute remaining instructions. */
548 tb = (TranslationBlock *)(next_tb & ~TB_EXIT_MASK);
549 cpu_exec_nocache(cpu, insns_left, tb);
550 align_clocks(&sc, cpu);
552 cpu->exception_index = EXCP_INTERRUPT;
553 next_tb = 0;
554 cpu_loop_exit(cpu);
556 break;
558 default:
559 break;
562 cpu->current_tb = NULL;
563 /* Try to align the host and virtual clocks
564 if the guest is in advance */
565 align_clocks(&sc, cpu);
566 /* reset soft MMU for next block (it can currently
567 only be set by a memory fault) */
568 } /* for(;;) */
569 } else {
570 /* Reload env after longjmp - the compiler may have smashed all
571 * local variables as longjmp is marked 'noreturn'. */
572 cpu = current_cpu;
573 cc = CPU_GET_CLASS(cpu);
574 cpu->can_do_io = 1;
575 #ifdef TARGET_I386
576 x86_cpu = X86_CPU(cpu);
577 env = &x86_cpu->env;
578 #endif
579 if (have_tb_lock) {
580 spin_unlock(&tcg_ctx.tb_ctx.tb_lock);
581 have_tb_lock = false;
584 } /* for(;;) */
586 cc->cpu_exec_exit(cpu);
587 rcu_read_unlock();
589 /* fail safe : never use current_cpu outside cpu_exec() */
590 current_cpu = NULL;
591 return ret;