hw/isa/apm.c

   1 /*
   2  * QEMU PC APM controller Emulation
   3  * This is split out from acpi.c
   4  *
   5  * Copyright (c) 2006 Fabrice Bellard
   6  *
   7  * This library is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU Lesser General Public
   9  * License version 2 as published by the Free Software Foundation.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, see <http://www.gnu.org/licenses/>
  18  *
  19  * Contributions after 2012-01-13 are licensed under the terms of the
  20  * GNU GPL, version 2 or (at your option) any later version.
  21  */
  22
  23 #include "qemu/osdep.h"
  24 #include "hw/isa/apm.h"
  25 #include "hw/hw.h"
  26 #include "hw/pci/pci.h"
  27
  28 //#define DEBUG
  29
  30 #ifdef DEBUG
  31 # define APM_DPRINTF(format, ...)       printf(format, ## __VA_ARGS__)
  32 #else
  33 # define APM_DPRINTF(format, ...)       do { } while (0)
  34 #endif
  35
  36 /* fixed I/O location */
  37 #define APM_CNT_IOPORT  0xb2
  38 #define APM_STS_IOPORT  0xb3
  39
  40 static void apm_ioport_writeb(void *opaque, hwaddr addr, uint64_t val,
  41                               unsigned size)
  42 {
  43     APMState *apm = opaque;
  44     addr &= 1;
  45     APM_DPRINTF("apm_ioport_writeb addr=0x%" HWADDR_PRIx
  46                 " val=0x%02" PRIx64 "\n", addr, val);
  47     if (addr == 0) {
  48         apm->apmc = val;
  49
  50         if (apm->callback) {
  51             (apm->callback)(val, apm->arg);
  52         }
  53     } else {
  54         apm->apms = val;
  55     }
  56 }
  57
  58 static uint64_t apm_ioport_readb(void *opaque, hwaddr addr, unsigned size)
  59 {
  60     APMState *apm = opaque;
  61     uint32_t val;
  62
  63     addr &= 1;
  64     if (addr == 0) {
  65         val = apm->apmc;
  66     } else {
  67         val = apm->apms;
  68     }
  69     APM_DPRINTF("apm_ioport_readb addr=0x%" HWADDR_PRIx " val=0x%02x\n", addr, val);
  70     return val;
  71 }
  72
  73 const VMStateDescription vmstate_apm = {
  74     .name = "APM State",
  75     .version_id = 1,
  76     .minimum_version_id = 1,
  77     .fields = (VMStateField[]) {
  78         VMSTATE_UINT8(apmc, APMState),
  79         VMSTATE_UINT8(apms, APMState),
  80         VMSTATE_END_OF_LIST()
  81     }
  82 };
  83
  84 static const MemoryRegionOps apm_ops = {
  85     .read = apm_ioport_readb,
  86     .write = apm_ioport_writeb,
  87     .impl = {
  88         .min_access_size = 1,
  89         .max_access_size = 1,
  90     },
  91 };
  92
  93 void apm_init(PCIDevice *dev, APMState *apm, apm_ctrl_changed_t callback,
  94               void *arg)
  95 {
  96     apm->callback = callback;
  97     apm->arg = arg;
  98
  99     /* ioport 0xb2, 0xb3 */
 100     memory_region_init_io(&apm->io, OBJECT(dev), &apm_ops, apm, "apm-io", 2);
 101     memory_region_add_subregion(pci_address_space_io(dev), APM_CNT_IOPORT,
 102                                 &apm->io);
 103 }