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hw/dma: Add SiFive platform DMA controller emulation
[qemu/ar7.git] / target / mips / msa_helper.c
blob6865addaf6ae7b601c89871399beea6e9e925fe2
1 /*
2 * MIPS SIMD Architecture Module Instruction emulation helpers for QEMU.
3 *
4 * Copyright (c) 2014 Imagination Technologies
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
18 */
19
20 #include "qemu/osdep.h"
21 #include "cpu.h"
22 #include "internal.h"
23 #include "exec/exec-all.h"
24 #include "exec/helper-proto.h"
25 #include "fpu/softfloat.h"
26
27 /* Data format min and max values */
28 #define DF_BITS(df) (1 << ((df) + 3))
29
30 #define DF_MAX_INT(df) (int64_t)((1LL << (DF_BITS(df) - 1)) - 1)
31 #define M_MAX_INT(m) (int64_t)((1LL << ((m) - 1)) - 1)
32
33 #define DF_MIN_INT(df) (int64_t)(-(1LL << (DF_BITS(df) - 1)))
34 #define M_MIN_INT(m) (int64_t)(-(1LL << ((m) - 1)))
35
36 #define DF_MAX_UINT(df) (uint64_t)(-1ULL >> (64 - DF_BITS(df)))
37 #define M_MAX_UINT(m) (uint64_t)(-1ULL >> (64 - (m)))
38
39 #define UNSIGNED(x, df) ((x) & DF_MAX_UINT(df))
40 #define SIGNED(x, df) \
41 ((((int64_t)x) << (64 - DF_BITS(df))) >> (64 - DF_BITS(df)))
42
43 /* Element-by-element access macros */
44 #define DF_ELEMENTS(df) (MSA_WRLEN / DF_BITS(df))
45
46
47
48 /*
49 * Bit Count
50 * ---------
51 *
52 * +---------------+----------------------------------------------------------+
53 * | NLOC.B | Vector Leading Ones Count (byte) |
54 * | NLOC.H | Vector Leading Ones Count (halfword) |
55 * | NLOC.W | Vector Leading Ones Count (word) |
56 * | NLOC.D | Vector Leading Ones Count (doubleword) |
57 * | NLZC.B | Vector Leading Zeros Count (byte) |
58 * | NLZC.H | Vector Leading Zeros Count (halfword) |
59 * | NLZC.W | Vector Leading Zeros Count (word) |
60 * | NLZC.D | Vector Leading Zeros Count (doubleword) |
61 * | PCNT.B | Vector Population Count (byte) |
62 * | PCNT.H | Vector Population Count (halfword) |
63 * | PCNT.W | Vector Population Count (word) |
64 * | PCNT.D | Vector Population Count (doubleword) |
65 * +---------------+----------------------------------------------------------+
66 */
67
68 static inline int64_t msa_nlzc_df(uint32_t df, int64_t arg)
69 {
70 uint64_t x, y;
71 int n, c;
72
73 x = UNSIGNED(arg, df);
74 n = DF_BITS(df);
75 c = DF_BITS(df) / 2;
76
77 do {
78 y = x >> c;
79 if (y != 0) {
80 n = n - c;
81 x = y;
82 }
83 c = c >> 1;
84 } while (c != 0);
85
86 return n - x;
87 }
88
89 static inline int64_t msa_nloc_df(uint32_t df, int64_t arg)
90 {
91 return msa_nlzc_df(df, UNSIGNED((~arg), df));
92 }
93
94 void helper_msa_nloc_b(CPUMIPSState *env, uint32_t wd, uint32_t ws)
95 {
96 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
97 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
98
99 pwd->b[0] = msa_nloc_df(DF_BYTE, pws->b[0]);
100 pwd->b[1] = msa_nloc_df(DF_BYTE, pws->b[1]);
101 pwd->b[2] = msa_nloc_df(DF_BYTE, pws->b[2]);
102 pwd->b[3] = msa_nloc_df(DF_BYTE, pws->b[3]);
103 pwd->b[4] = msa_nloc_df(DF_BYTE, pws->b[4]);
104 pwd->b[5] = msa_nloc_df(DF_BYTE, pws->b[5]);
105 pwd->b[6] = msa_nloc_df(DF_BYTE, pws->b[6]);
106 pwd->b[7] = msa_nloc_df(DF_BYTE, pws->b[7]);
107 pwd->b[8] = msa_nloc_df(DF_BYTE, pws->b[8]);
108 pwd->b[9] = msa_nloc_df(DF_BYTE, pws->b[9]);
109 pwd->b[10] = msa_nloc_df(DF_BYTE, pws->b[10]);
110 pwd->b[11] = msa_nloc_df(DF_BYTE, pws->b[11]);
111 pwd->b[12] = msa_nloc_df(DF_BYTE, pws->b[12]);
112 pwd->b[13] = msa_nloc_df(DF_BYTE, pws->b[13]);
113 pwd->b[14] = msa_nloc_df(DF_BYTE, pws->b[14]);
114 pwd->b[15] = msa_nloc_df(DF_BYTE, pws->b[15]);
115 }
116
117 void helper_msa_nloc_h(CPUMIPSState *env, uint32_t wd, uint32_t ws)
118 {
119 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
120 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
121
122 pwd->h[0] = msa_nloc_df(DF_HALF, pws->h[0]);
123 pwd->h[1] = msa_nloc_df(DF_HALF, pws->h[1]);
124 pwd->h[2] = msa_nloc_df(DF_HALF, pws->h[2]);
125 pwd->h[3] = msa_nloc_df(DF_HALF, pws->h[3]);
126 pwd->h[4] = msa_nloc_df(DF_HALF, pws->h[4]);
127 pwd->h[5] = msa_nloc_df(DF_HALF, pws->h[5]);
128 pwd->h[6] = msa_nloc_df(DF_HALF, pws->h[6]);
129 pwd->h[7] = msa_nloc_df(DF_HALF, pws->h[7]);
130 }
131
132 void helper_msa_nloc_w(CPUMIPSState *env, uint32_t wd, uint32_t ws)
133 {
134 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
135 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
136
137 pwd->w[0] = msa_nloc_df(DF_WORD, pws->w[0]);
138 pwd->w[1] = msa_nloc_df(DF_WORD, pws->w[1]);
139 pwd->w[2] = msa_nloc_df(DF_WORD, pws->w[2]);
140 pwd->w[3] = msa_nloc_df(DF_WORD, pws->w[3]);
141 }
142
143 void helper_msa_nloc_d(CPUMIPSState *env, uint32_t wd, uint32_t ws)
144 {
145 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
146 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
147
148 pwd->d[0] = msa_nloc_df(DF_DOUBLE, pws->d[0]);
149 pwd->d[1] = msa_nloc_df(DF_DOUBLE, pws->d[1]);
150 }
151
152 void helper_msa_nlzc_b(CPUMIPSState *env, uint32_t wd, uint32_t ws)
153 {
154 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
155 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
156
157 pwd->b[0] = msa_nlzc_df(DF_BYTE, pws->b[0]);
158 pwd->b[1] = msa_nlzc_df(DF_BYTE, pws->b[1]);
159 pwd->b[2] = msa_nlzc_df(DF_BYTE, pws->b[2]);
160 pwd->b[3] = msa_nlzc_df(DF_BYTE, pws->b[3]);
161 pwd->b[4] = msa_nlzc_df(DF_BYTE, pws->b[4]);
162 pwd->b[5] = msa_nlzc_df(DF_BYTE, pws->b[5]);
163 pwd->b[6] = msa_nlzc_df(DF_BYTE, pws->b[6]);
164 pwd->b[7] = msa_nlzc_df(DF_BYTE, pws->b[7]);
165 pwd->b[8] = msa_nlzc_df(DF_BYTE, pws->b[8]);
166 pwd->b[9] = msa_nlzc_df(DF_BYTE, pws->b[9]);
167 pwd->b[10] = msa_nlzc_df(DF_BYTE, pws->b[10]);
168 pwd->b[11] = msa_nlzc_df(DF_BYTE, pws->b[11]);
169 pwd->b[12] = msa_nlzc_df(DF_BYTE, pws->b[12]);
170 pwd->b[13] = msa_nlzc_df(DF_BYTE, pws->b[13]);
171 pwd->b[14] = msa_nlzc_df(DF_BYTE, pws->b[14]);
172 pwd->b[15] = msa_nlzc_df(DF_BYTE, pws->b[15]);
173 }
174
175 void helper_msa_nlzc_h(CPUMIPSState *env, uint32_t wd, uint32_t ws)
176 {
177 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
178 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
179
180 pwd->h[0] = msa_nlzc_df(DF_HALF, pws->h[0]);
181 pwd->h[1] = msa_nlzc_df(DF_HALF, pws->h[1]);
182 pwd->h[2] = msa_nlzc_df(DF_HALF, pws->h[2]);
183 pwd->h[3] = msa_nlzc_df(DF_HALF, pws->h[3]);
184 pwd->h[4] = msa_nlzc_df(DF_HALF, pws->h[4]);
185 pwd->h[5] = msa_nlzc_df(DF_HALF, pws->h[5]);
186 pwd->h[6] = msa_nlzc_df(DF_HALF, pws->h[6]);
187 pwd->h[7] = msa_nlzc_df(DF_HALF, pws->h[7]);
188 }
189
190 void helper_msa_nlzc_w(CPUMIPSState *env, uint32_t wd, uint32_t ws)
191 {
192 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
193 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
194
195 pwd->w[0] = msa_nlzc_df(DF_WORD, pws->w[0]);
196 pwd->w[1] = msa_nlzc_df(DF_WORD, pws->w[1]);
197 pwd->w[2] = msa_nlzc_df(DF_WORD, pws->w[2]);
198 pwd->w[3] = msa_nlzc_df(DF_WORD, pws->w[3]);
199 }
200
201 void helper_msa_nlzc_d(CPUMIPSState *env, uint32_t wd, uint32_t ws)
202 {
203 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
204 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
205
206 pwd->d[0] = msa_nlzc_df(DF_DOUBLE, pws->d[0]);
207 pwd->d[1] = msa_nlzc_df(DF_DOUBLE, pws->d[1]);
208 }
209
210 static inline int64_t msa_pcnt_df(uint32_t df, int64_t arg)
211 {
212 uint64_t x;
213
214 x = UNSIGNED(arg, df);
215
216 x = (x & 0x5555555555555555ULL) + ((x >> 1) & 0x5555555555555555ULL);
217 x = (x & 0x3333333333333333ULL) + ((x >> 2) & 0x3333333333333333ULL);
218 x = (x & 0x0F0F0F0F0F0F0F0FULL) + ((x >> 4) & 0x0F0F0F0F0F0F0F0FULL);
219 x = (x & 0x00FF00FF00FF00FFULL) + ((x >> 8) & 0x00FF00FF00FF00FFULL);
220 x = (x & 0x0000FFFF0000FFFFULL) + ((x >> 16) & 0x0000FFFF0000FFFFULL);
221 x = (x & 0x00000000FFFFFFFFULL) + ((x >> 32));
222
223 return x;
224 }
225
226 void helper_msa_pcnt_b(CPUMIPSState *env, uint32_t wd, uint32_t ws)
227 {
228 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
229 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
230
231 pwd->b[0] = msa_pcnt_df(DF_BYTE, pws->b[0]);
232 pwd->b[1] = msa_pcnt_df(DF_BYTE, pws->b[1]);
233 pwd->b[2] = msa_pcnt_df(DF_BYTE, pws->b[2]);
234 pwd->b[3] = msa_pcnt_df(DF_BYTE, pws->b[3]);
235 pwd->b[4] = msa_pcnt_df(DF_BYTE, pws->b[4]);
236 pwd->b[5] = msa_pcnt_df(DF_BYTE, pws->b[5]);
237 pwd->b[6] = msa_pcnt_df(DF_BYTE, pws->b[6]);
238 pwd->b[7] = msa_pcnt_df(DF_BYTE, pws->b[7]);
239 pwd->b[8] = msa_pcnt_df(DF_BYTE, pws->b[8]);
240 pwd->b[9] = msa_pcnt_df(DF_BYTE, pws->b[9]);
241 pwd->b[10] = msa_pcnt_df(DF_BYTE, pws->b[10]);
242 pwd->b[11] = msa_pcnt_df(DF_BYTE, pws->b[11]);
243 pwd->b[12] = msa_pcnt_df(DF_BYTE, pws->b[12]);
244 pwd->b[13] = msa_pcnt_df(DF_BYTE, pws->b[13]);
245 pwd->b[14] = msa_pcnt_df(DF_BYTE, pws->b[14]);
246 pwd->b[15] = msa_pcnt_df(DF_BYTE, pws->b[15]);
247 }
248
249 void helper_msa_pcnt_h(CPUMIPSState *env, uint32_t wd, uint32_t ws)
250 {
251 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
252 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
253
254 pwd->h[0] = msa_pcnt_df(DF_HALF, pws->h[0]);
255 pwd->h[1] = msa_pcnt_df(DF_HALF, pws->h[1]);
256 pwd->h[2] = msa_pcnt_df(DF_HALF, pws->h[2]);
257 pwd->h[3] = msa_pcnt_df(DF_HALF, pws->h[3]);
258 pwd->h[4] = msa_pcnt_df(DF_HALF, pws->h[4]);
259 pwd->h[5] = msa_pcnt_df(DF_HALF, pws->h[5]);
260 pwd->h[6] = msa_pcnt_df(DF_HALF, pws->h[6]);
261 pwd->h[7] = msa_pcnt_df(DF_HALF, pws->h[7]);
262 }
263
264 void helper_msa_pcnt_w(CPUMIPSState *env, uint32_t wd, uint32_t ws)
265 {
266 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
267 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
268
269 pwd->w[0] = msa_pcnt_df(DF_WORD, pws->w[0]);
270 pwd->w[1] = msa_pcnt_df(DF_WORD, pws->w[1]);
271 pwd->w[2] = msa_pcnt_df(DF_WORD, pws->w[2]);
272 pwd->w[3] = msa_pcnt_df(DF_WORD, pws->w[3]);
273 }
274
275 void helper_msa_pcnt_d(CPUMIPSState *env, uint32_t wd, uint32_t ws)
276 {
277 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
278 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
279
280 pwd->d[0] = msa_pcnt_df(DF_DOUBLE, pws->d[0]);
281 pwd->d[1] = msa_pcnt_df(DF_DOUBLE, pws->d[1]);
282 }
283
284
285 /*
286 * Bit Move
287 * --------
288 *
289 * +---------------+----------------------------------------------------------+
290 * | BINSL.B | Vector Bit Insert Left (byte) |
291 * | BINSL.H | Vector Bit Insert Left (halfword) |
292 * | BINSL.W | Vector Bit Insert Left (word) |
293 * | BINSL.D | Vector Bit Insert Left (doubleword) |
294 * | BINSR.B | Vector Bit Insert Right (byte) |
295 * | BINSR.H | Vector Bit Insert Right (halfword) |
296 * | BINSR.W | Vector Bit Insert Right (word) |
297 * | BINSR.D | Vector Bit Insert Right (doubleword) |
298 * | BMNZ.V | Vector Bit Move If Not Zero |
299 * | BMZ.V | Vector Bit Move If Zero |
300 * | BSEL.V | Vector Bit Select |
301 * +---------------+----------------------------------------------------------+
302 */
303
304 /* Data format bit position and unsigned values */
305 #define BIT_POSITION(x, df) ((uint64_t)(x) % DF_BITS(df))
306
307 static inline int64_t msa_binsl_df(uint32_t df,
308 int64_t dest, int64_t arg1, int64_t arg2)
309 {
310 uint64_t u_arg1 = UNSIGNED(arg1, df);
311 uint64_t u_dest = UNSIGNED(dest, df);
312 int32_t sh_d = BIT_POSITION(arg2, df) + 1;
313 int32_t sh_a = DF_BITS(df) - sh_d;
314 if (sh_d == DF_BITS(df)) {
315 return u_arg1;
316 } else {
317 return UNSIGNED(UNSIGNED(u_dest << sh_d, df) >> sh_d, df) |
318 UNSIGNED(UNSIGNED(u_arg1 >> sh_a, df) << sh_a, df);
319 }
320 }
321
322 void helper_msa_binsl_b(CPUMIPSState *env,
323 uint32_t wd, uint32_t ws, uint32_t wt)
324 {
325 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
326 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
327 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
328
329 pwd->b[0] = msa_binsl_df(DF_BYTE, pwd->b[0], pws->b[0], pwt->b[0]);
330 pwd->b[1] = msa_binsl_df(DF_BYTE, pwd->b[1], pws->b[1], pwt->b[1]);
331 pwd->b[2] = msa_binsl_df(DF_BYTE, pwd->b[2], pws->b[2], pwt->b[2]);
332 pwd->b[3] = msa_binsl_df(DF_BYTE, pwd->b[3], pws->b[3], pwt->b[3]);
333 pwd->b[4] = msa_binsl_df(DF_BYTE, pwd->b[4], pws->b[4], pwt->b[4]);
334 pwd->b[5] = msa_binsl_df(DF_BYTE, pwd->b[5], pws->b[5], pwt->b[5]);
335 pwd->b[6] = msa_binsl_df(DF_BYTE, pwd->b[6], pws->b[6], pwt->b[6]);
336 pwd->b[7] = msa_binsl_df(DF_BYTE, pwd->b[7], pws->b[7], pwt->b[7]);
337 pwd->b[8] = msa_binsl_df(DF_BYTE, pwd->b[8], pws->b[8], pwt->b[8]);
338 pwd->b[9] = msa_binsl_df(DF_BYTE, pwd->b[9], pws->b[9], pwt->b[9]);
339 pwd->b[10] = msa_binsl_df(DF_BYTE, pwd->b[10], pws->b[10], pwt->b[10]);
340 pwd->b[11] = msa_binsl_df(DF_BYTE, pwd->b[11], pws->b[11], pwt->b[11]);
341 pwd->b[12] = msa_binsl_df(DF_BYTE, pwd->b[12], pws->b[12], pwt->b[12]);
342 pwd->b[13] = msa_binsl_df(DF_BYTE, pwd->b[13], pws->b[13], pwt->b[13]);
343 pwd->b[14] = msa_binsl_df(DF_BYTE, pwd->b[14], pws->b[14], pwt->b[14]);
344 pwd->b[15] = msa_binsl_df(DF_BYTE, pwd->b[15], pws->b[15], pwt->b[15]);
345 }
346
347 void helper_msa_binsl_h(CPUMIPSState *env,
348 uint32_t wd, uint32_t ws, uint32_t wt)
349 {
350 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
351 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
352 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
353
354 pwd->h[0] = msa_binsl_df(DF_HALF, pwd->h[0], pws->h[0], pwt->h[0]);
355 pwd->h[1] = msa_binsl_df(DF_HALF, pwd->h[1], pws->h[1], pwt->h[1]);
356 pwd->h[2] = msa_binsl_df(DF_HALF, pwd->h[2], pws->h[2], pwt->h[2]);
357 pwd->h[3] = msa_binsl_df(DF_HALF, pwd->h[3], pws->h[3], pwt->h[3]);
358 pwd->h[4] = msa_binsl_df(DF_HALF, pwd->h[4], pws->h[4], pwt->h[4]);
359 pwd->h[5] = msa_binsl_df(DF_HALF, pwd->h[5], pws->h[5], pwt->h[5]);
360 pwd->h[6] = msa_binsl_df(DF_HALF, pwd->h[6], pws->h[6], pwt->h[6]);
361 pwd->h[7] = msa_binsl_df(DF_HALF, pwd->h[7], pws->h[7], pwt->h[7]);
362 }
363
364 void helper_msa_binsl_w(CPUMIPSState *env,
365 uint32_t wd, uint32_t ws, uint32_t wt)
366 {
367 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
368 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
369 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
370
371 pwd->w[0] = msa_binsl_df(DF_WORD, pwd->w[0], pws->w[0], pwt->w[0]);
372 pwd->w[1] = msa_binsl_df(DF_WORD, pwd->w[1], pws->w[1], pwt->w[1]);
373 pwd->w[2] = msa_binsl_df(DF_WORD, pwd->w[2], pws->w[2], pwt->w[2]);
374 pwd->w[3] = msa_binsl_df(DF_WORD, pwd->w[3], pws->w[3], pwt->w[3]);
375 }
376
377 void helper_msa_binsl_d(CPUMIPSState *env,
378 uint32_t wd, uint32_t ws, uint32_t wt)
379 {
380 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
381 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
382 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
383
384 pwd->d[0] = msa_binsl_df(DF_DOUBLE, pwd->d[0], pws->d[0], pwt->d[0]);
385 pwd->d[1] = msa_binsl_df(DF_DOUBLE, pwd->d[1], pws->d[1], pwt->d[1]);
386 }
387
388 static inline int64_t msa_binsr_df(uint32_t df,
389 int64_t dest, int64_t arg1, int64_t arg2)
390 {
391 uint64_t u_arg1 = UNSIGNED(arg1, df);
392 uint64_t u_dest = UNSIGNED(dest, df);
393 int32_t sh_d = BIT_POSITION(arg2, df) + 1;
394 int32_t sh_a = DF_BITS(df) - sh_d;
395 if (sh_d == DF_BITS(df)) {
396 return u_arg1;
397 } else {
398 return UNSIGNED(UNSIGNED(u_dest >> sh_d, df) << sh_d, df) |
399 UNSIGNED(UNSIGNED(u_arg1 << sh_a, df) >> sh_a, df);
400 }
401 }
402
403 void helper_msa_binsr_b(CPUMIPSState *env,
404 uint32_t wd, uint32_t ws, uint32_t wt)
405 {
406 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
407 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
408 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
409
410 pwd->b[0] = msa_binsr_df(DF_BYTE, pwd->b[0], pws->b[0], pwt->b[0]);
411 pwd->b[1] = msa_binsr_df(DF_BYTE, pwd->b[1], pws->b[1], pwt->b[1]);
412 pwd->b[2] = msa_binsr_df(DF_BYTE, pwd->b[2], pws->b[2], pwt->b[2]);
413 pwd->b[3] = msa_binsr_df(DF_BYTE, pwd->b[3], pws->b[3], pwt->b[3]);
414 pwd->b[4] = msa_binsr_df(DF_BYTE, pwd->b[4], pws->b[4], pwt->b[4]);
415 pwd->b[5] = msa_binsr_df(DF_BYTE, pwd->b[5], pws->b[5], pwt->b[5]);
416 pwd->b[6] = msa_binsr_df(DF_BYTE, pwd->b[6], pws->b[6], pwt->b[6]);
417 pwd->b[7] = msa_binsr_df(DF_BYTE, pwd->b[7], pws->b[7], pwt->b[7]);
418 pwd->b[8] = msa_binsr_df(DF_BYTE, pwd->b[8], pws->b[8], pwt->b[8]);
419 pwd->b[9] = msa_binsr_df(DF_BYTE, pwd->b[9], pws->b[9], pwt->b[9]);
420 pwd->b[10] = msa_binsr_df(DF_BYTE, pwd->b[10], pws->b[10], pwt->b[10]);
421 pwd->b[11] = msa_binsr_df(DF_BYTE, pwd->b[11], pws->b[11], pwt->b[11]);
422 pwd->b[12] = msa_binsr_df(DF_BYTE, pwd->b[12], pws->b[12], pwt->b[12]);
423 pwd->b[13] = msa_binsr_df(DF_BYTE, pwd->b[13], pws->b[13], pwt->b[13]);
424 pwd->b[14] = msa_binsr_df(DF_BYTE, pwd->b[14], pws->b[14], pwt->b[14]);
425 pwd->b[15] = msa_binsr_df(DF_BYTE, pwd->b[15], pws->b[15], pwt->b[15]);
426 }
427
428 void helper_msa_binsr_h(CPUMIPSState *env,
429 uint32_t wd, uint32_t ws, uint32_t wt)
430 {
431 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
432 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
433 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
434
435 pwd->h[0] = msa_binsr_df(DF_HALF, pwd->h[0], pws->h[0], pwt->h[0]);
436 pwd->h[1] = msa_binsr_df(DF_HALF, pwd->h[1], pws->h[1], pwt->h[1]);
437 pwd->h[2] = msa_binsr_df(DF_HALF, pwd->h[2], pws->h[2], pwt->h[2]);
438 pwd->h[3] = msa_binsr_df(DF_HALF, pwd->h[3], pws->h[3], pwt->h[3]);
439 pwd->h[4] = msa_binsr_df(DF_HALF, pwd->h[4], pws->h[4], pwt->h[4]);
440 pwd->h[5] = msa_binsr_df(DF_HALF, pwd->h[5], pws->h[5], pwt->h[5]);
441 pwd->h[6] = msa_binsr_df(DF_HALF, pwd->h[6], pws->h[6], pwt->h[6]);
442 pwd->h[7] = msa_binsr_df(DF_HALF, pwd->h[7], pws->h[7], pwt->h[7]);
443 }
444
445 void helper_msa_binsr_w(CPUMIPSState *env,
446 uint32_t wd, uint32_t ws, uint32_t wt)
447 {
448 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
449 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
450 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
451
452 pwd->w[0] = msa_binsr_df(DF_WORD, pwd->w[0], pws->w[0], pwt->w[0]);
453 pwd->w[1] = msa_binsr_df(DF_WORD, pwd->w[1], pws->w[1], pwt->w[1]);
454 pwd->w[2] = msa_binsr_df(DF_WORD, pwd->w[2], pws->w[2], pwt->w[2]);
455 pwd->w[3] = msa_binsr_df(DF_WORD, pwd->w[3], pws->w[3], pwt->w[3]);
456 }
457
458 void helper_msa_binsr_d(CPUMIPSState *env,
459 uint32_t wd, uint32_t ws, uint32_t wt)
460 {
461 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
462 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
463 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
464
465 pwd->d[0] = msa_binsr_df(DF_DOUBLE, pwd->d[0], pws->d[0], pwt->d[0]);
466 pwd->d[1] = msa_binsr_df(DF_DOUBLE, pwd->d[1], pws->d[1], pwt->d[1]);
467 }
468
469 void helper_msa_bmnz_v(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
470 {
471 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
472 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
473 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
474
475 pwd->d[0] = UNSIGNED( \
476 ((pwd->d[0] & (~pwt->d[0])) | (pws->d[0] & pwt->d[0])), DF_DOUBLE);
477 pwd->d[1] = UNSIGNED( \
478 ((pwd->d[1] & (~pwt->d[1])) | (pws->d[1] & pwt->d[1])), DF_DOUBLE);
479 }
480
481 void helper_msa_bmz_v(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
482 {
483 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
484 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
485 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
486
487 pwd->d[0] = UNSIGNED( \
488 ((pwd->d[0] & pwt->d[0]) | (pws->d[0] & (~pwt->d[0]))), DF_DOUBLE);
489 pwd->d[1] = UNSIGNED( \
490 ((pwd->d[1] & pwt->d[1]) | (pws->d[1] & (~pwt->d[1]))), DF_DOUBLE);
491 }
492
493 void helper_msa_bsel_v(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
494 {
495 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
496 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
497 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
498
499 pwd->d[0] = UNSIGNED( \
500 (pws->d[0] & (~pwd->d[0])) | (pwt->d[0] & pwd->d[0]), DF_DOUBLE);
501 pwd->d[1] = UNSIGNED( \
502 (pws->d[1] & (~pwd->d[1])) | (pwt->d[1] & pwd->d[1]), DF_DOUBLE);
503 }
504
505
506 /*
507 * Bit Set
508 * -------
509 *
510 * +---------------+----------------------------------------------------------+
511 * | BCLR.B | Vector Bit Clear (byte) |
512 * | BCLR.H | Vector Bit Clear (halfword) |
513 * | BCLR.W | Vector Bit Clear (word) |
514 * | BCLR.D | Vector Bit Clear (doubleword) |
515 * | BNEG.B | Vector Bit Negate (byte) |
516 * | BNEG.H | Vector Bit Negate (halfword) |
517 * | BNEG.W | Vector Bit Negate (word) |
518 * | BNEG.D | Vector Bit Negate (doubleword) |
519 * | BSET.B | Vector Bit Set (byte) |
520 * | BSET.H | Vector Bit Set (halfword) |
521 * | BSET.W | Vector Bit Set (word) |
522 * | BSET.D | Vector Bit Set (doubleword) |
523 * +---------------+----------------------------------------------------------+
524 */
525
526 static inline int64_t msa_bclr_df(uint32_t df, int64_t arg1, int64_t arg2)
527 {
528 int32_t b_arg2 = BIT_POSITION(arg2, df);
529 return UNSIGNED(arg1 & (~(1LL << b_arg2)), df);
530 }
531
532 void helper_msa_bclr_b(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
533 {
534 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
535 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
536 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
537
538 pwd->b[0] = msa_bclr_df(DF_BYTE, pws->b[0], pwt->b[0]);
539 pwd->b[1] = msa_bclr_df(DF_BYTE, pws->b[1], pwt->b[1]);
540 pwd->b[2] = msa_bclr_df(DF_BYTE, pws->b[2], pwt->b[2]);
541 pwd->b[3] = msa_bclr_df(DF_BYTE, pws->b[3], pwt->b[3]);
542 pwd->b[4] = msa_bclr_df(DF_BYTE, pws->b[4], pwt->b[4]);
543 pwd->b[5] = msa_bclr_df(DF_BYTE, pws->b[5], pwt->b[5]);
544 pwd->b[6] = msa_bclr_df(DF_BYTE, pws->b[6], pwt->b[6]);
545 pwd->b[7] = msa_bclr_df(DF_BYTE, pws->b[7], pwt->b[7]);
546 pwd->b[8] = msa_bclr_df(DF_BYTE, pws->b[8], pwt->b[8]);
547 pwd->b[9] = msa_bclr_df(DF_BYTE, pws->b[9], pwt->b[9]);
548 pwd->b[10] = msa_bclr_df(DF_BYTE, pws->b[10], pwt->b[10]);
549 pwd->b[11] = msa_bclr_df(DF_BYTE, pws->b[11], pwt->b[11]);
550 pwd->b[12] = msa_bclr_df(DF_BYTE, pws->b[12], pwt->b[12]);
551 pwd->b[13] = msa_bclr_df(DF_BYTE, pws->b[13], pwt->b[13]);
552 pwd->b[14] = msa_bclr_df(DF_BYTE, pws->b[14], pwt->b[14]);
553 pwd->b[15] = msa_bclr_df(DF_BYTE, pws->b[15], pwt->b[15]);
554 }
555
556 void helper_msa_bclr_h(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
557 {
558 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
559 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
560 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
561
562 pwd->h[0] = msa_bclr_df(DF_HALF, pws->h[0], pwt->h[0]);
563 pwd->h[1] = msa_bclr_df(DF_HALF, pws->h[1], pwt->h[1]);
564 pwd->h[2] = msa_bclr_df(DF_HALF, pws->h[2], pwt->h[2]);
565 pwd->h[3] = msa_bclr_df(DF_HALF, pws->h[3], pwt->h[3]);
566 pwd->h[4] = msa_bclr_df(DF_HALF, pws->h[4], pwt->h[4]);
567 pwd->h[5] = msa_bclr_df(DF_HALF, pws->h[5], pwt->h[5]);
568 pwd->h[6] = msa_bclr_df(DF_HALF, pws->h[6], pwt->h[6]);
569 pwd->h[7] = msa_bclr_df(DF_HALF, pws->h[7], pwt->h[7]);
570 }
571
572 void helper_msa_bclr_w(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
573 {
574 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
575 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
576 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
577
578 pwd->w[0] = msa_bclr_df(DF_WORD, pws->w[0], pwt->w[0]);
579 pwd->w[1] = msa_bclr_df(DF_WORD, pws->w[1], pwt->w[1]);
580 pwd->w[2] = msa_bclr_df(DF_WORD, pws->w[2], pwt->w[2]);
581 pwd->w[3] = msa_bclr_df(DF_WORD, pws->w[3], pwt->w[3]);
582 }
583
584 void helper_msa_bclr_d(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
585 {
586 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
587 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
588 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
589
590 pwd->d[0] = msa_bclr_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
591 pwd->d[1] = msa_bclr_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
592 }
593
594 static inline int64_t msa_bneg_df(uint32_t df, int64_t arg1, int64_t arg2)
595 {
596 int32_t b_arg2 = BIT_POSITION(arg2, df);
597 return UNSIGNED(arg1 ^ (1LL << b_arg2), df);
598 }
599
600 void helper_msa_bneg_b(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
601 {
602 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
603 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
604 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
605
606 pwd->b[0] = msa_bneg_df(DF_BYTE, pws->b[0], pwt->b[0]);
607 pwd->b[1] = msa_bneg_df(DF_BYTE, pws->b[1], pwt->b[1]);
608 pwd->b[2] = msa_bneg_df(DF_BYTE, pws->b[2], pwt->b[2]);
609 pwd->b[3] = msa_bneg_df(DF_BYTE, pws->b[3], pwt->b[3]);
610 pwd->b[4] = msa_bneg_df(DF_BYTE, pws->b[4], pwt->b[4]);
611 pwd->b[5] = msa_bneg_df(DF_BYTE, pws->b[5], pwt->b[5]);
612 pwd->b[6] = msa_bneg_df(DF_BYTE, pws->b[6], pwt->b[6]);
613 pwd->b[7] = msa_bneg_df(DF_BYTE, pws->b[7], pwt->b[7]);
614 pwd->b[8] = msa_bneg_df(DF_BYTE, pws->b[8], pwt->b[8]);
615 pwd->b[9] = msa_bneg_df(DF_BYTE, pws->b[9], pwt->b[9]);
616 pwd->b[10] = msa_bneg_df(DF_BYTE, pws->b[10], pwt->b[10]);
617 pwd->b[11] = msa_bneg_df(DF_BYTE, pws->b[11], pwt->b[11]);
618 pwd->b[12] = msa_bneg_df(DF_BYTE, pws->b[12], pwt->b[12]);
619 pwd->b[13] = msa_bneg_df(DF_BYTE, pws->b[13], pwt->b[13]);
620 pwd->b[14] = msa_bneg_df(DF_BYTE, pws->b[14], pwt->b[14]);
621 pwd->b[15] = msa_bneg_df(DF_BYTE, pws->b[15], pwt->b[15]);
622 }
623
624 void helper_msa_bneg_h(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
625 {
626 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
627 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
628 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
629
630 pwd->h[0] = msa_bneg_df(DF_HALF, pws->h[0], pwt->h[0]);
631 pwd->h[1] = msa_bneg_df(DF_HALF, pws->h[1], pwt->h[1]);
632 pwd->h[2] = msa_bneg_df(DF_HALF, pws->h[2], pwt->h[2]);
633 pwd->h[3] = msa_bneg_df(DF_HALF, pws->h[3], pwt->h[3]);
634 pwd->h[4] = msa_bneg_df(DF_HALF, pws->h[4], pwt->h[4]);
635 pwd->h[5] = msa_bneg_df(DF_HALF, pws->h[5], pwt->h[5]);
636 pwd->h[6] = msa_bneg_df(DF_HALF, pws->h[6], pwt->h[6]);
637 pwd->h[7] = msa_bneg_df(DF_HALF, pws->h[7], pwt->h[7]);
638 }
639
640 void helper_msa_bneg_w(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
641 {
642 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
643 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
644 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
645
646 pwd->w[0] = msa_bneg_df(DF_WORD, pws->w[0], pwt->w[0]);
647 pwd->w[1] = msa_bneg_df(DF_WORD, pws->w[1], pwt->w[1]);
648 pwd->w[2] = msa_bneg_df(DF_WORD, pws->w[2], pwt->w[2]);
649 pwd->w[3] = msa_bneg_df(DF_WORD, pws->w[3], pwt->w[3]);
650 }
651
652 void helper_msa_bneg_d(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
653 {
654 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
655 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
656 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
657
658 pwd->d[0] = msa_bneg_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
659 pwd->d[1] = msa_bneg_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
660 }
661
662 static inline int64_t msa_bset_df(uint32_t df, int64_t arg1,
663 int64_t arg2)
664 {
665 int32_t b_arg2 = BIT_POSITION(arg2, df);
666 return UNSIGNED(arg1 | (1LL << b_arg2), df);
667 }
668
669 void helper_msa_bset_b(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
670 {
671 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
672 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
673 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
674
675 pwd->b[0] = msa_bset_df(DF_BYTE, pws->b[0], pwt->b[0]);
676 pwd->b[1] = msa_bset_df(DF_BYTE, pws->b[1], pwt->b[1]);
677 pwd->b[2] = msa_bset_df(DF_BYTE, pws->b[2], pwt->b[2]);
678 pwd->b[3] = msa_bset_df(DF_BYTE, pws->b[3], pwt->b[3]);
679 pwd->b[4] = msa_bset_df(DF_BYTE, pws->b[4], pwt->b[4]);
680 pwd->b[5] = msa_bset_df(DF_BYTE, pws->b[5], pwt->b[5]);
681 pwd->b[6] = msa_bset_df(DF_BYTE, pws->b[6], pwt->b[6]);
682 pwd->b[7] = msa_bset_df(DF_BYTE, pws->b[7], pwt->b[7]);
683 pwd->b[8] = msa_bset_df(DF_BYTE, pws->b[8], pwt->b[8]);
684 pwd->b[9] = msa_bset_df(DF_BYTE, pws->b[9], pwt->b[9]);
685 pwd->b[10] = msa_bset_df(DF_BYTE, pws->b[10], pwt->b[10]);
686 pwd->b[11] = msa_bset_df(DF_BYTE, pws->b[11], pwt->b[11]);
687 pwd->b[12] = msa_bset_df(DF_BYTE, pws->b[12], pwt->b[12]);
688 pwd->b[13] = msa_bset_df(DF_BYTE, pws->b[13], pwt->b[13]);
689 pwd->b[14] = msa_bset_df(DF_BYTE, pws->b[14], pwt->b[14]);
690 pwd->b[15] = msa_bset_df(DF_BYTE, pws->b[15], pwt->b[15]);
691 }
692
693 void helper_msa_bset_h(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
694 {
695 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
696 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
697 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
698
699 pwd->h[0] = msa_bset_df(DF_HALF, pws->h[0], pwt->h[0]);
700 pwd->h[1] = msa_bset_df(DF_HALF, pws->h[1], pwt->h[1]);
701 pwd->h[2] = msa_bset_df(DF_HALF, pws->h[2], pwt->h[2]);
702 pwd->h[3] = msa_bset_df(DF_HALF, pws->h[3], pwt->h[3]);
703 pwd->h[4] = msa_bset_df(DF_HALF, pws->h[4], pwt->h[4]);
704 pwd->h[5] = msa_bset_df(DF_HALF, pws->h[5], pwt->h[5]);
705 pwd->h[6] = msa_bset_df(DF_HALF, pws->h[6], pwt->h[6]);
706 pwd->h[7] = msa_bset_df(DF_HALF, pws->h[7], pwt->h[7]);
707 }
708
709 void helper_msa_bset_w(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
710 {
711 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
712 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
713 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
714
715 pwd->w[0] = msa_bset_df(DF_WORD, pws->w[0], pwt->w[0]);
716 pwd->w[1] = msa_bset_df(DF_WORD, pws->w[1], pwt->w[1]);
717 pwd->w[2] = msa_bset_df(DF_WORD, pws->w[2], pwt->w[2]);
718 pwd->w[3] = msa_bset_df(DF_WORD, pws->w[3], pwt->w[3]);
719 }
720
721 void helper_msa_bset_d(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
722 {
723 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
724 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
725 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
726
727 pwd->d[0] = msa_bset_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
728 pwd->d[1] = msa_bset_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
729 }
730
731
732 /*
733 * Fixed Multiply
734 * --------------
735 *
736 * +---------------+----------------------------------------------------------+
737 * | MADD_Q.H | Vector Fixed-Point Multiply and Add (halfword) |
738 * | MADD_Q.W | Vector Fixed-Point Multiply and Add (word) |
739 * | MADDR_Q.H | Vector Fixed-Point Multiply and Add Rounded (halfword) |
740 * | MADDR_Q.W | Vector Fixed-Point Multiply and Add Rounded (word) |
741 * | MSUB_Q.H | Vector Fixed-Point Multiply and Subtr. (halfword) |
742 * | MSUB_Q.W | Vector Fixed-Point Multiply and Subtr. (word) |
743 * | MSUBR_Q.H | Vector Fixed-Point Multiply and Subtr. Rounded (halfword)|
744 * | MSUBR_Q.W | Vector Fixed-Point Multiply and Subtr. Rounded (word) |
745 * | MUL_Q.H | Vector Fixed-Point Multiply (halfword) |
746 * | MUL_Q.W | Vector Fixed-Point Multiply (word) |
747 * | MULR_Q.H | Vector Fixed-Point Multiply Rounded (halfword) |
748 * | MULR_Q.W | Vector Fixed-Point Multiply Rounded (word) |
749 * +---------------+----------------------------------------------------------+
750 */
751
752 /* TODO: insert Fixed Multiply group helpers here */
753
754
755 /*
756 * Float Max Min
757 * -------------
758 *
759 * +---------------+----------------------------------------------------------+
760 * | FMAX_A.W | Vector Floating-Point Maximum (Absolute) (word) |
761 * | FMAX_A.D | Vector Floating-Point Maximum (Absolute) (doubleword) |
762 * | FMAX.W | Vector Floating-Point Maximum (word) |
763 * | FMAX.D | Vector Floating-Point Maximum (doubleword) |
764 * | FMIN_A.W | Vector Floating-Point Minimum (Absolute) (word) |
765 * | FMIN_A.D | Vector Floating-Point Minimum (Absolute) (doubleword) |
766 * | FMIN.W | Vector Floating-Point Minimum (word) |
767 * | FMIN.D | Vector Floating-Point Minimum (doubleword) |
768 * +---------------+----------------------------------------------------------+
769 */
770
771 /* TODO: insert Float Max Min group helpers here */
772
773
774 /*
775 * Int Add
776 * -------
777 *
778 * +---------------+----------------------------------------------------------+
779 * | ADD_A.B | Vector Add Absolute Values (byte) |
780 * | ADD_A.H | Vector Add Absolute Values (halfword) |
781 * | ADD_A.W | Vector Add Absolute Values (word) |
782 * | ADD_A.D | Vector Add Absolute Values (doubleword) |
783 * | ADDS_A.B | Vector Signed Saturated Add (of Absolute) (byte) |
784 * | ADDS_A.H | Vector Signed Saturated Add (of Absolute) (halfword) |
785 * | ADDS_A.W | Vector Signed Saturated Add (of Absolute) (word) |
786 * | ADDS_A.D | Vector Signed Saturated Add (of Absolute) (doubleword) |
787 * | ADDS_S.B | Vector Signed Saturated Add (of Signed) (byte) |
788 * | ADDS_S.H | Vector Signed Saturated Add (of Signed) (halfword) |
789 * | ADDS_S.W | Vector Signed Saturated Add (of Signed) (word) |
790 * | ADDS_S.D | Vector Signed Saturated Add (of Signed) (doubleword) |
791 * | ADDS_U.B | Vector Unsigned Saturated Add (of Unsigned) (byte) |
792 * | ADDS_U.H | Vector Unsigned Saturated Add (of Unsigned) (halfword) |
793 * | ADDS_U.W | Vector Unsigned Saturated Add (of Unsigned) (word) |
794 * | ADDS_U.D | Vector Unsigned Saturated Add (of Unsigned) (doubleword) |
795 * | ADDV.B | Vector Add (byte) |
796 * | ADDV.H | Vector Add (halfword) |
797 * | ADDV.W | Vector Add (word) |
798 * | ADDV.D | Vector Add (doubleword) |
799 * | HADD_S.H | Vector Signed Horizontal Add (halfword) |
800 * | HADD_S.W | Vector Signed Horizontal Add (word) |
801 * | HADD_S.D | Vector Signed Horizontal Add (doubleword) |
802 * | HADD_U.H | Vector Unigned Horizontal Add (halfword) |
803 * | HADD_U.W | Vector Unigned Horizontal Add (word) |
804 * | HADD_U.D | Vector Unigned Horizontal Add (doubleword) |
805 * +---------------+----------------------------------------------------------+
806 */
807
808
809 static inline int64_t msa_add_a_df(uint32_t df, int64_t arg1, int64_t arg2)
810 {
811 uint64_t abs_arg1 = arg1 >= 0 ? arg1 : -arg1;
812 uint64_t abs_arg2 = arg2 >= 0 ? arg2 : -arg2;
813 return abs_arg1 + abs_arg2;
814 }
815
816 void helper_msa_add_a_b(CPUMIPSState *env,
817 uint32_t wd, uint32_t ws, uint32_t wt)
818 {
819 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
820 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
821 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
822
823 pwd->b[0] = msa_add_a_df(DF_BYTE, pws->b[0], pwt->b[0]);
824 pwd->b[1] = msa_add_a_df(DF_BYTE, pws->b[1], pwt->b[1]);
825 pwd->b[2] = msa_add_a_df(DF_BYTE, pws->b[2], pwt->b[2]);
826 pwd->b[3] = msa_add_a_df(DF_BYTE, pws->b[3], pwt->b[3]);
827 pwd->b[4] = msa_add_a_df(DF_BYTE, pws->b[4], pwt->b[4]);
828 pwd->b[5] = msa_add_a_df(DF_BYTE, pws->b[5], pwt->b[5]);
829 pwd->b[6] = msa_add_a_df(DF_BYTE, pws->b[6], pwt->b[6]);
830 pwd->b[7] = msa_add_a_df(DF_BYTE, pws->b[7], pwt->b[7]);
831 pwd->b[8] = msa_add_a_df(DF_BYTE, pws->b[8], pwt->b[8]);
832 pwd->b[9] = msa_add_a_df(DF_BYTE, pws->b[9], pwt->b[9]);
833 pwd->b[10] = msa_add_a_df(DF_BYTE, pws->b[10], pwt->b[10]);
834 pwd->b[11] = msa_add_a_df(DF_BYTE, pws->b[11], pwt->b[11]);
835 pwd->b[12] = msa_add_a_df(DF_BYTE, pws->b[12], pwt->b[12]);
836 pwd->b[13] = msa_add_a_df(DF_BYTE, pws->b[13], pwt->b[13]);
837 pwd->b[14] = msa_add_a_df(DF_BYTE, pws->b[14], pwt->b[14]);
838 pwd->b[15] = msa_add_a_df(DF_BYTE, pws->b[15], pwt->b[15]);
839 }
840
841 void helper_msa_add_a_h(CPUMIPSState *env,
842 uint32_t wd, uint32_t ws, uint32_t wt)
843 {
844 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
845 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
846 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
847
848 pwd->h[0] = msa_add_a_df(DF_HALF, pws->h[0], pwt->h[0]);
849 pwd->h[1] = msa_add_a_df(DF_HALF, pws->h[1], pwt->h[1]);
850 pwd->h[2] = msa_add_a_df(DF_HALF, pws->h[2], pwt->h[2]);
851 pwd->h[3] = msa_add_a_df(DF_HALF, pws->h[3], pwt->h[3]);
852 pwd->h[4] = msa_add_a_df(DF_HALF, pws->h[4], pwt->h[4]);
853 pwd->h[5] = msa_add_a_df(DF_HALF, pws->h[5], pwt->h[5]);
854 pwd->h[6] = msa_add_a_df(DF_HALF, pws->h[6], pwt->h[6]);
855 pwd->h[7] = msa_add_a_df(DF_HALF, pws->h[7], pwt->h[7]);
856 }
857
858 void helper_msa_add_a_w(CPUMIPSState *env,
859 uint32_t wd, uint32_t ws, uint32_t wt)
860 {
861 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
862 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
863 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
864
865 pwd->w[0] = msa_add_a_df(DF_WORD, pws->w[0], pwt->w[0]);
866 pwd->w[1] = msa_add_a_df(DF_WORD, pws->w[1], pwt->w[1]);
867 pwd->w[2] = msa_add_a_df(DF_WORD, pws->w[2], pwt->w[2]);
868 pwd->w[3] = msa_add_a_df(DF_WORD, pws->w[3], pwt->w[3]);
869 }
870
871 void helper_msa_add_a_d(CPUMIPSState *env,
872 uint32_t wd, uint32_t ws, uint32_t wt)
873 {
874 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
875 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
876 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
877
878 pwd->d[0] = msa_add_a_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
879 pwd->d[1] = msa_add_a_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
880 }
881
882
883 static inline int64_t msa_adds_a_df(uint32_t df, int64_t arg1, int64_t arg2)
884 {
885 uint64_t max_int = (uint64_t)DF_MAX_INT(df);
886 uint64_t abs_arg1 = arg1 >= 0 ? arg1 : -arg1;
887 uint64_t abs_arg2 = arg2 >= 0 ? arg2 : -arg2;
888 if (abs_arg1 > max_int || abs_arg2 > max_int) {
889 return (int64_t)max_int;
890 } else {
891 return (abs_arg1 < max_int - abs_arg2) ? abs_arg1 + abs_arg2 : max_int;
892 }
893 }
894
895 void helper_msa_adds_a_b(CPUMIPSState *env,
896 uint32_t wd, uint32_t ws, uint32_t wt)
897 {
898 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
899 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
900 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
901
902 pwd->b[0] = msa_adds_a_df(DF_BYTE, pws->b[0], pwt->b[0]);
903 pwd->b[1] = msa_adds_a_df(DF_BYTE, pws->b[1], pwt->b[1]);
904 pwd->b[2] = msa_adds_a_df(DF_BYTE, pws->b[2], pwt->b[2]);
905 pwd->b[3] = msa_adds_a_df(DF_BYTE, pws->b[3], pwt->b[3]);
906 pwd->b[4] = msa_adds_a_df(DF_BYTE, pws->b[4], pwt->b[4]);
907 pwd->b[5] = msa_adds_a_df(DF_BYTE, pws->b[5], pwt->b[5]);
908 pwd->b[6] = msa_adds_a_df(DF_BYTE, pws->b[6], pwt->b[6]);
909 pwd->b[7] = msa_adds_a_df(DF_BYTE, pws->b[7], pwt->b[7]);
910 pwd->b[8] = msa_adds_a_df(DF_BYTE, pws->b[8], pwt->b[8]);
911 pwd->b[9] = msa_adds_a_df(DF_BYTE, pws->b[9], pwt->b[9]);
912 pwd->b[10] = msa_adds_a_df(DF_BYTE, pws->b[10], pwt->b[10]);
913 pwd->b[11] = msa_adds_a_df(DF_BYTE, pws->b[11], pwt->b[11]);
914 pwd->b[12] = msa_adds_a_df(DF_BYTE, pws->b[12], pwt->b[12]);
915 pwd->b[13] = msa_adds_a_df(DF_BYTE, pws->b[13], pwt->b[13]);
916 pwd->b[14] = msa_adds_a_df(DF_BYTE, pws->b[14], pwt->b[14]);
917 pwd->b[15] = msa_adds_a_df(DF_BYTE, pws->b[15], pwt->b[15]);
918 }
919
920 void helper_msa_adds_a_h(CPUMIPSState *env,
921 uint32_t wd, uint32_t ws, uint32_t wt)
922 {
923 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
924 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
925 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
926
927 pwd->h[0] = msa_adds_a_df(DF_HALF, pws->h[0], pwt->h[0]);
928 pwd->h[1] = msa_adds_a_df(DF_HALF, pws->h[1], pwt->h[1]);
929 pwd->h[2] = msa_adds_a_df(DF_HALF, pws->h[2], pwt->h[2]);
930 pwd->h[3] = msa_adds_a_df(DF_HALF, pws->h[3], pwt->h[3]);
931 pwd->h[4] = msa_adds_a_df(DF_HALF, pws->h[4], pwt->h[4]);
932 pwd->h[5] = msa_adds_a_df(DF_HALF, pws->h[5], pwt->h[5]);
933 pwd->h[6] = msa_adds_a_df(DF_HALF, pws->h[6], pwt->h[6]);
934 pwd->h[7] = msa_adds_a_df(DF_HALF, pws->h[7], pwt->h[7]);
935 }
936
937 void helper_msa_adds_a_w(CPUMIPSState *env,
938 uint32_t wd, uint32_t ws, uint32_t wt)
939 {
940 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
941 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
942 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
943
944 pwd->w[0] = msa_adds_a_df(DF_WORD, pws->w[0], pwt->w[0]);
945 pwd->w[1] = msa_adds_a_df(DF_WORD, pws->w[1], pwt->w[1]);
946 pwd->w[2] = msa_adds_a_df(DF_WORD, pws->w[2], pwt->w[2]);
947 pwd->w[3] = msa_adds_a_df(DF_WORD, pws->w[3], pwt->w[3]);
948 }
949
950 void helper_msa_adds_a_d(CPUMIPSState *env,
951 uint32_t wd, uint32_t ws, uint32_t wt)
952 {
953 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
954 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
955 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
956
957 pwd->d[0] = msa_adds_a_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
958 pwd->d[1] = msa_adds_a_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
959 }
960
961
962 static inline int64_t msa_adds_s_df(uint32_t df, int64_t arg1, int64_t arg2)
963 {
964 int64_t max_int = DF_MAX_INT(df);
965 int64_t min_int = DF_MIN_INT(df);
966 if (arg1 < 0) {
967 return (min_int - arg1 < arg2) ? arg1 + arg2 : min_int;
968 } else {
969 return (arg2 < max_int - arg1) ? arg1 + arg2 : max_int;
970 }
971 }
972
973 void helper_msa_adds_s_b(CPUMIPSState *env,
974 uint32_t wd, uint32_t ws, uint32_t wt)
975 {
976 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
977 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
978 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
979
980 pwd->b[0] = msa_adds_s_df(DF_BYTE, pws->b[0], pwt->b[0]);
981 pwd->b[1] = msa_adds_s_df(DF_BYTE, pws->b[1], pwt->b[1]);
982 pwd->b[2] = msa_adds_s_df(DF_BYTE, pws->b[2], pwt->b[2]);
983 pwd->b[3] = msa_adds_s_df(DF_BYTE, pws->b[3], pwt->b[3]);
984 pwd->b[4] = msa_adds_s_df(DF_BYTE, pws->b[4], pwt->b[4]);
985 pwd->b[5] = msa_adds_s_df(DF_BYTE, pws->b[5], pwt->b[5]);
986 pwd->b[6] = msa_adds_s_df(DF_BYTE, pws->b[6], pwt->b[6]);
987 pwd->b[7] = msa_adds_s_df(DF_BYTE, pws->b[7], pwt->b[7]);
988 pwd->b[8] = msa_adds_s_df(DF_BYTE, pws->b[8], pwt->b[8]);
989 pwd->b[9] = msa_adds_s_df(DF_BYTE, pws->b[9], pwt->b[9]);
990 pwd->b[10] = msa_adds_s_df(DF_BYTE, pws->b[10], pwt->b[10]);
991 pwd->b[11] = msa_adds_s_df(DF_BYTE, pws->b[11], pwt->b[11]);
992 pwd->b[12] = msa_adds_s_df(DF_BYTE, pws->b[12], pwt->b[12]);
993 pwd->b[13] = msa_adds_s_df(DF_BYTE, pws->b[13], pwt->b[13]);
994 pwd->b[14] = msa_adds_s_df(DF_BYTE, pws->b[14], pwt->b[14]);
995 pwd->b[15] = msa_adds_s_df(DF_BYTE, pws->b[15], pwt->b[15]);
996 }
997
998 void helper_msa_adds_s_h(CPUMIPSState *env,
999 uint32_t wd, uint32_t ws, uint32_t wt)
1000 {
1001 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1002 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1003 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1004
1005 pwd->h[0] = msa_adds_s_df(DF_HALF, pws->h[0], pwt->h[0]);
1006 pwd->h[1] = msa_adds_s_df(DF_HALF, pws->h[1], pwt->h[1]);
1007 pwd->h[2] = msa_adds_s_df(DF_HALF, pws->h[2], pwt->h[2]);
1008 pwd->h[3] = msa_adds_s_df(DF_HALF, pws->h[3], pwt->h[3]);
1009 pwd->h[4] = msa_adds_s_df(DF_HALF, pws->h[4], pwt->h[4]);
1010 pwd->h[5] = msa_adds_s_df(DF_HALF, pws->h[5], pwt->h[5]);
1011 pwd->h[6] = msa_adds_s_df(DF_HALF, pws->h[6], pwt->h[6]);
1012 pwd->h[7] = msa_adds_s_df(DF_HALF, pws->h[7], pwt->h[7]);
1013 }
1014
1015 void helper_msa_adds_s_w(CPUMIPSState *env,
1016 uint32_t wd, uint32_t ws, uint32_t wt)
1017 {
1018 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1019 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1020 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1021
1022 pwd->w[0] = msa_adds_s_df(DF_WORD, pws->w[0], pwt->w[0]);
1023 pwd->w[1] = msa_adds_s_df(DF_WORD, pws->w[1], pwt->w[1]);
1024 pwd->w[2] = msa_adds_s_df(DF_WORD, pws->w[2], pwt->w[2]);
1025 pwd->w[3] = msa_adds_s_df(DF_WORD, pws->w[3], pwt->w[3]);
1026 }
1027
1028 void helper_msa_adds_s_d(CPUMIPSState *env,
1029 uint32_t wd, uint32_t ws, uint32_t wt)
1030 {
1031 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1032 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1033 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1034
1035 pwd->d[0] = msa_adds_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
1036 pwd->d[1] = msa_adds_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
1037 }
1038
1039
1040 static inline uint64_t msa_adds_u_df(uint32_t df, uint64_t arg1, uint64_t arg2)
1041 {
1042 uint64_t max_uint = DF_MAX_UINT(df);
1043 uint64_t u_arg1 = UNSIGNED(arg1, df);
1044 uint64_t u_arg2 = UNSIGNED(arg2, df);
1045 return (u_arg1 < max_uint - u_arg2) ? u_arg1 + u_arg2 : max_uint;
1046 }
1047
1048 void helper_msa_adds_u_b(CPUMIPSState *env,
1049 uint32_t wd, uint32_t ws, uint32_t wt)
1050 {
1051 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1052 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1053 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1054
1055 pwd->b[0] = msa_adds_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
1056 pwd->b[1] = msa_adds_u_df(DF_BYTE, pws->b[1], pwt->b[1]);
1057 pwd->b[2] = msa_adds_u_df(DF_BYTE, pws->b[2], pwt->b[2]);
1058 pwd->b[3] = msa_adds_u_df(DF_BYTE, pws->b[3], pwt->b[3]);
1059 pwd->b[4] = msa_adds_u_df(DF_BYTE, pws->b[4], pwt->b[4]);
1060 pwd->b[5] = msa_adds_u_df(DF_BYTE, pws->b[5], pwt->b[5]);
1061 pwd->b[6] = msa_adds_u_df(DF_BYTE, pws->b[6], pwt->b[6]);
1062 pwd->b[7] = msa_adds_u_df(DF_BYTE, pws->b[7], pwt->b[7]);
1063 pwd->b[8] = msa_adds_u_df(DF_BYTE, pws->b[8], pwt->b[8]);
1064 pwd->b[9] = msa_adds_u_df(DF_BYTE, pws->b[9], pwt->b[9]);
1065 pwd->b[10] = msa_adds_u_df(DF_BYTE, pws->b[10], pwt->b[10]);
1066 pwd->b[11] = msa_adds_u_df(DF_BYTE, pws->b[11], pwt->b[11]);
1067 pwd->b[12] = msa_adds_u_df(DF_BYTE, pws->b[12], pwt->b[12]);
1068 pwd->b[13] = msa_adds_u_df(DF_BYTE, pws->b[13], pwt->b[13]);
1069 pwd->b[14] = msa_adds_u_df(DF_BYTE, pws->b[14], pwt->b[14]);
1070 pwd->b[15] = msa_adds_u_df(DF_BYTE, pws->b[15], pwt->b[15]);
1071 }
1072
1073 void helper_msa_adds_u_h(CPUMIPSState *env,
1074 uint32_t wd, uint32_t ws, uint32_t wt)
1075 {
1076 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1077 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1078 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1079
1080 pwd->h[0] = msa_adds_u_df(DF_HALF, pws->h[0], pwt->h[0]);
1081 pwd->h[1] = msa_adds_u_df(DF_HALF, pws->h[1], pwt->h[1]);
1082 pwd->h[2] = msa_adds_u_df(DF_HALF, pws->h[2], pwt->h[2]);
1083 pwd->h[3] = msa_adds_u_df(DF_HALF, pws->h[3], pwt->h[3]);
1084 pwd->h[4] = msa_adds_u_df(DF_HALF, pws->h[4], pwt->h[4]);
1085 pwd->h[5] = msa_adds_u_df(DF_HALF, pws->h[5], pwt->h[5]);
1086 pwd->h[6] = msa_adds_u_df(DF_HALF, pws->h[6], pwt->h[6]);
1087 pwd->h[7] = msa_adds_u_df(DF_HALF, pws->h[7], pwt->h[7]);
1088 }
1089
1090 void helper_msa_adds_u_w(CPUMIPSState *env,
1091 uint32_t wd, uint32_t ws, uint32_t wt)
1092 {
1093 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1094 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1095 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1096
1097 pwd->w[0] = msa_adds_u_df(DF_WORD, pws->w[0], pwt->w[0]);
1098 pwd->w[1] = msa_adds_u_df(DF_WORD, pws->w[1], pwt->w[1]);
1099 pwd->w[2] = msa_adds_u_df(DF_WORD, pws->w[2], pwt->w[2]);
1100 pwd->w[3] = msa_adds_u_df(DF_WORD, pws->w[3], pwt->w[3]);
1101 }
1102
1103 void helper_msa_adds_u_d(CPUMIPSState *env,
1104 uint32_t wd, uint32_t ws, uint32_t wt)
1105 {
1106 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1107 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1108 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1109
1110 pwd->d[0] = msa_adds_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
1111 pwd->d[1] = msa_adds_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
1112 }
1113
1114
1115 static inline int64_t msa_addv_df(uint32_t df, int64_t arg1, int64_t arg2)
1116 {
1117 return arg1 + arg2;
1118 }
1119
1120 void helper_msa_addv_b(CPUMIPSState *env,
1121 uint32_t wd, uint32_t ws, uint32_t wt)
1122 {
1123 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1124 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1125 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1126
1127 pwd->b[0] = msa_addv_df(DF_BYTE, pws->b[0], pwt->b[0]);
1128 pwd->b[1] = msa_addv_df(DF_BYTE, pws->b[1], pwt->b[1]);
1129 pwd->b[2] = msa_addv_df(DF_BYTE, pws->b[2], pwt->b[2]);
1130 pwd->b[3] = msa_addv_df(DF_BYTE, pws->b[3], pwt->b[3]);
1131 pwd->b[4] = msa_addv_df(DF_BYTE, pws->b[4], pwt->b[4]);
1132 pwd->b[5] = msa_addv_df(DF_BYTE, pws->b[5], pwt->b[5]);
1133 pwd->b[6] = msa_addv_df(DF_BYTE, pws->b[6], pwt->b[6]);
1134 pwd->b[7] = msa_addv_df(DF_BYTE, pws->b[7], pwt->b[7]);
1135 pwd->b[8] = msa_addv_df(DF_BYTE, pws->b[8], pwt->b[8]);
1136 pwd->b[9] = msa_addv_df(DF_BYTE, pws->b[9], pwt->b[9]);
1137 pwd->b[10] = msa_addv_df(DF_BYTE, pws->b[10], pwt->b[10]);
1138 pwd->b[11] = msa_addv_df(DF_BYTE, pws->b[11], pwt->b[11]);
1139 pwd->b[12] = msa_addv_df(DF_BYTE, pws->b[12], pwt->b[12]);
1140 pwd->b[13] = msa_addv_df(DF_BYTE, pws->b[13], pwt->b[13]);
1141 pwd->b[14] = msa_addv_df(DF_BYTE, pws->b[14], pwt->b[14]);
1142 pwd->b[15] = msa_addv_df(DF_BYTE, pws->b[15], pwt->b[15]);
1143 }
1144
1145 void helper_msa_addv_h(CPUMIPSState *env,
1146 uint32_t wd, uint32_t ws, uint32_t wt)
1147 {
1148 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1149 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1150 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1151
1152 pwd->h[0] = msa_addv_df(DF_HALF, pws->h[0], pwt->h[0]);
1153 pwd->h[1] = msa_addv_df(DF_HALF, pws->h[1], pwt->h[1]);
1154 pwd->h[2] = msa_addv_df(DF_HALF, pws->h[2], pwt->h[2]);
1155 pwd->h[3] = msa_addv_df(DF_HALF, pws->h[3], pwt->h[3]);
1156 pwd->h[4] = msa_addv_df(DF_HALF, pws->h[4], pwt->h[4]);
1157 pwd->h[5] = msa_addv_df(DF_HALF, pws->h[5], pwt->h[5]);
1158 pwd->h[6] = msa_addv_df(DF_HALF, pws->h[6], pwt->h[6]);
1159 pwd->h[7] = msa_addv_df(DF_HALF, pws->h[7], pwt->h[7]);
1160 }
1161
1162 void helper_msa_addv_w(CPUMIPSState *env,
1163 uint32_t wd, uint32_t ws, uint32_t wt)
1164 {
1165 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1166 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1167 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1168
1169 pwd->w[0] = msa_addv_df(DF_WORD, pws->w[0], pwt->w[0]);
1170 pwd->w[1] = msa_addv_df(DF_WORD, pws->w[1], pwt->w[1]);
1171 pwd->w[2] = msa_addv_df(DF_WORD, pws->w[2], pwt->w[2]);
1172 pwd->w[3] = msa_addv_df(DF_WORD, pws->w[3], pwt->w[3]);
1173 }
1174
1175 void helper_msa_addv_d(CPUMIPSState *env,
1176 uint32_t wd, uint32_t ws, uint32_t wt)
1177 {
1178 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1179 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1180 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1181
1182 pwd->d[0] = msa_addv_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
1183 pwd->d[1] = msa_addv_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
1184 }
1185
1186
1187 #define SIGNED_EVEN(a, df) \
1188 ((((int64_t)(a)) << (64 - DF_BITS(df) / 2)) >> (64 - DF_BITS(df) / 2))
1189
1190 #define UNSIGNED_EVEN(a, df) \
1191 ((((uint64_t)(a)) << (64 - DF_BITS(df) / 2)) >> (64 - DF_BITS(df) / 2))
1192
1193 #define SIGNED_ODD(a, df) \
1194 ((((int64_t)(a)) << (64 - DF_BITS(df))) >> (64 - DF_BITS(df) / 2))
1195
1196 #define UNSIGNED_ODD(a, df) \
1197 ((((uint64_t)(a)) << (64 - DF_BITS(df))) >> (64 - DF_BITS(df) / 2))
1198
1199
1200 static inline int64_t msa_hadd_s_df(uint32_t df, int64_t arg1, int64_t arg2)
1201 {
1202 return SIGNED_ODD(arg1, df) + SIGNED_EVEN(arg2, df);
1203 }
1204
1205 void helper_msa_hadd_s_h(CPUMIPSState *env,
1206 uint32_t wd, uint32_t ws, uint32_t wt)
1207 {
1208 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1209 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1210 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1211
1212 pwd->h[0] = msa_hadd_s_df(DF_HALF, pws->h[0], pwt->h[0]);
1213 pwd->h[1] = msa_hadd_s_df(DF_HALF, pws->h[1], pwt->h[1]);
1214 pwd->h[2] = msa_hadd_s_df(DF_HALF, pws->h[2], pwt->h[2]);
1215 pwd->h[3] = msa_hadd_s_df(DF_HALF, pws->h[3], pwt->h[3]);
1216 pwd->h[4] = msa_hadd_s_df(DF_HALF, pws->h[4], pwt->h[4]);
1217 pwd->h[5] = msa_hadd_s_df(DF_HALF, pws->h[5], pwt->h[5]);
1218 pwd->h[6] = msa_hadd_s_df(DF_HALF, pws->h[6], pwt->h[6]);
1219 pwd->h[7] = msa_hadd_s_df(DF_HALF, pws->h[7], pwt->h[7]);
1220 }
1221
1222 void helper_msa_hadd_s_w(CPUMIPSState *env,
1223 uint32_t wd, uint32_t ws, uint32_t wt)
1224 {
1225 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1226 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1227 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1228
1229 pwd->w[0] = msa_hadd_s_df(DF_WORD, pws->w[0], pwt->w[0]);
1230 pwd->w[1] = msa_hadd_s_df(DF_WORD, pws->w[1], pwt->w[1]);
1231 pwd->w[2] = msa_hadd_s_df(DF_WORD, pws->w[2], pwt->w[2]);
1232 pwd->w[3] = msa_hadd_s_df(DF_WORD, pws->w[3], pwt->w[3]);
1233 }
1234
1235 void helper_msa_hadd_s_d(CPUMIPSState *env,
1236 uint32_t wd, uint32_t ws, uint32_t wt)
1237 {
1238 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1239 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1240 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1241
1242 pwd->d[0] = msa_hadd_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
1243 pwd->d[1] = msa_hadd_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
1244 }
1245
1246
1247 static inline int64_t msa_hadd_u_df(uint32_t df, int64_t arg1, int64_t arg2)
1248 {
1249 return UNSIGNED_ODD(arg1, df) + UNSIGNED_EVEN(arg2, df);
1250 }
1251
1252 void helper_msa_hadd_u_h(CPUMIPSState *env,
1253 uint32_t wd, uint32_t ws, uint32_t wt)
1254 {
1255 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1256 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1257 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1258
1259 pwd->h[0] = msa_hadd_u_df(DF_HALF, pws->h[0], pwt->h[0]);
1260 pwd->h[1] = msa_hadd_u_df(DF_HALF, pws->h[1], pwt->h[1]);
1261 pwd->h[2] = msa_hadd_u_df(DF_HALF, pws->h[2], pwt->h[2]);
1262 pwd->h[3] = msa_hadd_u_df(DF_HALF, pws->h[3], pwt->h[3]);
1263 pwd->h[4] = msa_hadd_u_df(DF_HALF, pws->h[4], pwt->h[4]);
1264 pwd->h[5] = msa_hadd_u_df(DF_HALF, pws->h[5], pwt->h[5]);
1265 pwd->h[6] = msa_hadd_u_df(DF_HALF, pws->h[6], pwt->h[6]);
1266 pwd->h[7] = msa_hadd_u_df(DF_HALF, pws->h[7], pwt->h[7]);
1267 }
1268
1269 void helper_msa_hadd_u_w(CPUMIPSState *env,
1270 uint32_t wd, uint32_t ws, uint32_t wt)
1271 {
1272 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1273 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1274 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1275
1276 pwd->w[0] = msa_hadd_u_df(DF_WORD, pws->w[0], pwt->w[0]);
1277 pwd->w[1] = msa_hadd_u_df(DF_WORD, pws->w[1], pwt->w[1]);
1278 pwd->w[2] = msa_hadd_u_df(DF_WORD, pws->w[2], pwt->w[2]);
1279 pwd->w[3] = msa_hadd_u_df(DF_WORD, pws->w[3], pwt->w[3]);
1280 }
1281
1282 void helper_msa_hadd_u_d(CPUMIPSState *env,
1283 uint32_t wd, uint32_t ws, uint32_t wt)
1284 {
1285 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1286 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1287 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1288
1289 pwd->d[0] = msa_hadd_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
1290 pwd->d[1] = msa_hadd_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
1291 }
1292
1293
1294 /*
1295 * Int Average
1296 * -----------
1297 *
1298 * +---------------+----------------------------------------------------------+
1299 * | AVE_S.B | Vector Signed Average (byte) |
1300 * | AVE_S.H | Vector Signed Average (halfword) |
1301 * | AVE_S.W | Vector Signed Average (word) |
1302 * | AVE_S.D | Vector Signed Average (doubleword) |
1303 * | AVE_U.B | Vector Unsigned Average (byte) |
1304 * | AVE_U.H | Vector Unsigned Average (halfword) |
1305 * | AVE_U.W | Vector Unsigned Average (word) |
1306 * | AVE_U.D | Vector Unsigned Average (doubleword) |
1307 * | AVER_S.B | Vector Signed Average Rounded (byte) |
1308 * | AVER_S.H | Vector Signed Average Rounded (halfword) |
1309 * | AVER_S.W | Vector Signed Average Rounded (word) |
1310 * | AVER_S.D | Vector Signed Average Rounded (doubleword) |
1311 * | AVER_U.B | Vector Unsigned Average Rounded (byte) |
1312 * | AVER_U.H | Vector Unsigned Average Rounded (halfword) |
1313 * | AVER_U.W | Vector Unsigned Average Rounded (word) |
1314 * | AVER_U.D | Vector Unsigned Average Rounded (doubleword) |
1315 * +---------------+----------------------------------------------------------+
1316 */
1317
1318 static inline int64_t msa_ave_s_df(uint32_t df, int64_t arg1, int64_t arg2)
1319 {
1320 /* signed shift */
1321 return (arg1 >> 1) + (arg2 >> 1) + (arg1 & arg2 & 1);
1322 }
1323
1324 void helper_msa_ave_s_b(CPUMIPSState *env,
1325 uint32_t wd, uint32_t ws, uint32_t wt)
1326 {
1327 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1328 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1329 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1330
1331 pwd->b[0] = msa_ave_s_df(DF_BYTE, pws->b[0], pwt->b[0]);
1332 pwd->b[1] = msa_ave_s_df(DF_BYTE, pws->b[1], pwt->b[1]);
1333 pwd->b[2] = msa_ave_s_df(DF_BYTE, pws->b[2], pwt->b[2]);
1334 pwd->b[3] = msa_ave_s_df(DF_BYTE, pws->b[3], pwt->b[3]);
1335 pwd->b[4] = msa_ave_s_df(DF_BYTE, pws->b[4], pwt->b[4]);
1336 pwd->b[5] = msa_ave_s_df(DF_BYTE, pws->b[5], pwt->b[5]);
1337 pwd->b[6] = msa_ave_s_df(DF_BYTE, pws->b[6], pwt->b[6]);
1338 pwd->b[7] = msa_ave_s_df(DF_BYTE, pws->b[7], pwt->b[7]);
1339 pwd->b[8] = msa_ave_s_df(DF_BYTE, pws->b[8], pwt->b[8]);
1340 pwd->b[9] = msa_ave_s_df(DF_BYTE, pws->b[9], pwt->b[9]);
1341 pwd->b[10] = msa_ave_s_df(DF_BYTE, pws->b[10], pwt->b[10]);
1342 pwd->b[11] = msa_ave_s_df(DF_BYTE, pws->b[11], pwt->b[11]);
1343 pwd->b[12] = msa_ave_s_df(DF_BYTE, pws->b[12], pwt->b[12]);
1344 pwd->b[13] = msa_ave_s_df(DF_BYTE, pws->b[13], pwt->b[13]);
1345 pwd->b[14] = msa_ave_s_df(DF_BYTE, pws->b[14], pwt->b[14]);
1346 pwd->b[15] = msa_ave_s_df(DF_BYTE, pws->b[15], pwt->b[15]);
1347 }
1348
1349 void helper_msa_ave_s_h(CPUMIPSState *env,
1350 uint32_t wd, uint32_t ws, uint32_t wt)
1351 {
1352 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1353 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1354 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1355
1356 pwd->h[0] = msa_ave_s_df(DF_HALF, pws->h[0], pwt->h[0]);
1357 pwd->h[1] = msa_ave_s_df(DF_HALF, pws->h[1], pwt->h[1]);
1358 pwd->h[2] = msa_ave_s_df(DF_HALF, pws->h[2], pwt->h[2]);
1359 pwd->h[3] = msa_ave_s_df(DF_HALF, pws->h[3], pwt->h[3]);
1360 pwd->h[4] = msa_ave_s_df(DF_HALF, pws->h[4], pwt->h[4]);
1361 pwd->h[5] = msa_ave_s_df(DF_HALF, pws->h[5], pwt->h[5]);
1362 pwd->h[6] = msa_ave_s_df(DF_HALF, pws->h[6], pwt->h[6]);
1363 pwd->h[7] = msa_ave_s_df(DF_HALF, pws->h[7], pwt->h[7]);
1364 }
1365
1366 void helper_msa_ave_s_w(CPUMIPSState *env,
1367 uint32_t wd, uint32_t ws, uint32_t wt)
1368 {
1369 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1370 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1371 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1372
1373 pwd->w[0] = msa_ave_s_df(DF_WORD, pws->w[0], pwt->w[0]);
1374 pwd->w[1] = msa_ave_s_df(DF_WORD, pws->w[1], pwt->w[1]);
1375 pwd->w[2] = msa_ave_s_df(DF_WORD, pws->w[2], pwt->w[2]);
1376 pwd->w[3] = msa_ave_s_df(DF_WORD, pws->w[3], pwt->w[3]);
1377 }
1378
1379 void helper_msa_ave_s_d(CPUMIPSState *env,
1380 uint32_t wd, uint32_t ws, uint32_t wt)
1381 {
1382 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1383 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1384 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1385
1386 pwd->d[0] = msa_ave_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
1387 pwd->d[1] = msa_ave_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
1388 }
1389
1390 static inline uint64_t msa_ave_u_df(uint32_t df, uint64_t arg1, uint64_t arg2)
1391 {
1392 uint64_t u_arg1 = UNSIGNED(arg1, df);
1393 uint64_t u_arg2 = UNSIGNED(arg2, df);
1394 /* unsigned shift */
1395 return (u_arg1 >> 1) + (u_arg2 >> 1) + (u_arg1 & u_arg2 & 1);
1396 }
1397
1398 void helper_msa_ave_u_b(CPUMIPSState *env,
1399 uint32_t wd, uint32_t ws, uint32_t wt)
1400 {
1401 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1402 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1403 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1404
1405 pwd->b[0] = msa_ave_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
1406 pwd->b[1] = msa_ave_u_df(DF_BYTE, pws->b[1], pwt->b[1]);
1407 pwd->b[2] = msa_ave_u_df(DF_BYTE, pws->b[2], pwt->b[2]);
1408 pwd->b[3] = msa_ave_u_df(DF_BYTE, pws->b[3], pwt->b[3]);
1409 pwd->b[4] = msa_ave_u_df(DF_BYTE, pws->b[4], pwt->b[4]);
1410 pwd->b[5] = msa_ave_u_df(DF_BYTE, pws->b[5], pwt->b[5]);
1411 pwd->b[6] = msa_ave_u_df(DF_BYTE, pws->b[6], pwt->b[6]);
1412 pwd->b[7] = msa_ave_u_df(DF_BYTE, pws->b[7], pwt->b[7]);
1413 pwd->b[8] = msa_ave_u_df(DF_BYTE, pws->b[8], pwt->b[8]);
1414 pwd->b[9] = msa_ave_u_df(DF_BYTE, pws->b[9], pwt->b[9]);
1415 pwd->b[10] = msa_ave_u_df(DF_BYTE, pws->b[10], pwt->b[10]);
1416 pwd->b[11] = msa_ave_u_df(DF_BYTE, pws->b[11], pwt->b[11]);
1417 pwd->b[12] = msa_ave_u_df(DF_BYTE, pws->b[12], pwt->b[12]);
1418 pwd->b[13] = msa_ave_u_df(DF_BYTE, pws->b[13], pwt->b[13]);
1419 pwd->b[14] = msa_ave_u_df(DF_BYTE, pws->b[14], pwt->b[14]);
1420 pwd->b[15] = msa_ave_u_df(DF_BYTE, pws->b[15], pwt->b[15]);
1421 }
1422
1423 void helper_msa_ave_u_h(CPUMIPSState *env,
1424 uint32_t wd, uint32_t ws, uint32_t wt)
1425 {
1426 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1427 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1428 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1429
1430 pwd->h[0] = msa_ave_u_df(DF_HALF, pws->h[0], pwt->h[0]);
1431 pwd->h[1] = msa_ave_u_df(DF_HALF, pws->h[1], pwt->h[1]);
1432 pwd->h[2] = msa_ave_u_df(DF_HALF, pws->h[2], pwt->h[2]);
1433 pwd->h[3] = msa_ave_u_df(DF_HALF, pws->h[3], pwt->h[3]);
1434 pwd->h[4] = msa_ave_u_df(DF_HALF, pws->h[4], pwt->h[4]);
1435 pwd->h[5] = msa_ave_u_df(DF_HALF, pws->h[5], pwt->h[5]);
1436 pwd->h[6] = msa_ave_u_df(DF_HALF, pws->h[6], pwt->h[6]);
1437 pwd->h[7] = msa_ave_u_df(DF_HALF, pws->h[7], pwt->h[7]);
1438 }
1439
1440 void helper_msa_ave_u_w(CPUMIPSState *env,
1441 uint32_t wd, uint32_t ws, uint32_t wt)
1442 {
1443 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1444 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1445 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1446
1447 pwd->w[0] = msa_ave_u_df(DF_WORD, pws->w[0], pwt->w[0]);
1448 pwd->w[1] = msa_ave_u_df(DF_WORD, pws->w[1], pwt->w[1]);
1449 pwd->w[2] = msa_ave_u_df(DF_WORD, pws->w[2], pwt->w[2]);
1450 pwd->w[3] = msa_ave_u_df(DF_WORD, pws->w[3], pwt->w[3]);
1451 }
1452
1453 void helper_msa_ave_u_d(CPUMIPSState *env,
1454 uint32_t wd, uint32_t ws, uint32_t wt)
1455 {
1456 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1457 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1458 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1459
1460 pwd->d[0] = msa_ave_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
1461 pwd->d[1] = msa_ave_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
1462 }
1463
1464 static inline int64_t msa_aver_s_df(uint32_t df, int64_t arg1, int64_t arg2)
1465 {
1466 /* signed shift */
1467 return (arg1 >> 1) + (arg2 >> 1) + ((arg1 | arg2) & 1);
1468 }
1469
1470 void helper_msa_aver_s_b(CPUMIPSState *env,
1471 uint32_t wd, uint32_t ws, uint32_t wt)
1472 {
1473 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1474 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1475 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1476
1477 pwd->b[0] = msa_aver_s_df(DF_BYTE, pws->b[0], pwt->b[0]);
1478 pwd->b[1] = msa_aver_s_df(DF_BYTE, pws->b[1], pwt->b[1]);
1479 pwd->b[2] = msa_aver_s_df(DF_BYTE, pws->b[2], pwt->b[2]);
1480 pwd->b[3] = msa_aver_s_df(DF_BYTE, pws->b[3], pwt->b[3]);
1481 pwd->b[4] = msa_aver_s_df(DF_BYTE, pws->b[4], pwt->b[4]);
1482 pwd->b[5] = msa_aver_s_df(DF_BYTE, pws->b[5], pwt->b[5]);
1483 pwd->b[6] = msa_aver_s_df(DF_BYTE, pws->b[6], pwt->b[6]);
1484 pwd->b[7] = msa_aver_s_df(DF_BYTE, pws->b[7], pwt->b[7]);
1485 pwd->b[8] = msa_aver_s_df(DF_BYTE, pws->b[8], pwt->b[8]);
1486 pwd->b[9] = msa_aver_s_df(DF_BYTE, pws->b[9], pwt->b[9]);
1487 pwd->b[10] = msa_aver_s_df(DF_BYTE, pws->b[10], pwt->b[10]);
1488 pwd->b[11] = msa_aver_s_df(DF_BYTE, pws->b[11], pwt->b[11]);
1489 pwd->b[12] = msa_aver_s_df(DF_BYTE, pws->b[12], pwt->b[12]);
1490 pwd->b[13] = msa_aver_s_df(DF_BYTE, pws->b[13], pwt->b[13]);
1491 pwd->b[14] = msa_aver_s_df(DF_BYTE, pws->b[14], pwt->b[14]);
1492 pwd->b[15] = msa_aver_s_df(DF_BYTE, pws->b[15], pwt->b[15]);
1493 }
1494
1495 void helper_msa_aver_s_h(CPUMIPSState *env,
1496 uint32_t wd, uint32_t ws, uint32_t wt)
1497 {
1498 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1499 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1500 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1501
1502 pwd->h[0] = msa_aver_s_df(DF_HALF, pws->h[0], pwt->h[0]);
1503 pwd->h[1] = msa_aver_s_df(DF_HALF, pws->h[1], pwt->h[1]);
1504 pwd->h[2] = msa_aver_s_df(DF_HALF, pws->h[2], pwt->h[2]);
1505 pwd->h[3] = msa_aver_s_df(DF_HALF, pws->h[3], pwt->h[3]);
1506 pwd->h[4] = msa_aver_s_df(DF_HALF, pws->h[4], pwt->h[4]);
1507 pwd->h[5] = msa_aver_s_df(DF_HALF, pws->h[5], pwt->h[5]);
1508 pwd->h[6] = msa_aver_s_df(DF_HALF, pws->h[6], pwt->h[6]);
1509 pwd->h[7] = msa_aver_s_df(DF_HALF, pws->h[7], pwt->h[7]);
1510 }
1511
1512 void helper_msa_aver_s_w(CPUMIPSState *env,
1513 uint32_t wd, uint32_t ws, uint32_t wt)
1514 {
1515 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1516 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1517 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1518
1519 pwd->w[0] = msa_aver_s_df(DF_WORD, pws->w[0], pwt->w[0]);
1520 pwd->w[1] = msa_aver_s_df(DF_WORD, pws->w[1], pwt->w[1]);
1521 pwd->w[2] = msa_aver_s_df(DF_WORD, pws->w[2], pwt->w[2]);
1522 pwd->w[3] = msa_aver_s_df(DF_WORD, pws->w[3], pwt->w[3]);
1523 }
1524
1525 void helper_msa_aver_s_d(CPUMIPSState *env,
1526 uint32_t wd, uint32_t ws, uint32_t wt)
1527 {
1528 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1529 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1530 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1531
1532 pwd->d[0] = msa_aver_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
1533 pwd->d[1] = msa_aver_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
1534 }
1535
1536 static inline uint64_t msa_aver_u_df(uint32_t df, uint64_t arg1, uint64_t arg2)
1537 {
1538 uint64_t u_arg1 = UNSIGNED(arg1, df);
1539 uint64_t u_arg2 = UNSIGNED(arg2, df);
1540 /* unsigned shift */
1541 return (u_arg1 >> 1) + (u_arg2 >> 1) + ((u_arg1 | u_arg2) & 1);
1542 }
1543
1544 void helper_msa_aver_u_b(CPUMIPSState *env,
1545 uint32_t wd, uint32_t ws, uint32_t wt)
1546 {
1547 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1548 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1549 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1550
1551 pwd->b[0] = msa_aver_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
1552 pwd->b[1] = msa_aver_u_df(DF_BYTE, pws->b[1], pwt->b[1]);
1553 pwd->b[2] = msa_aver_u_df(DF_BYTE, pws->b[2], pwt->b[2]);
1554 pwd->b[3] = msa_aver_u_df(DF_BYTE, pws->b[3], pwt->b[3]);
1555 pwd->b[4] = msa_aver_u_df(DF_BYTE, pws->b[4], pwt->b[4]);
1556 pwd->b[5] = msa_aver_u_df(DF_BYTE, pws->b[5], pwt->b[5]);
1557 pwd->b[6] = msa_aver_u_df(DF_BYTE, pws->b[6], pwt->b[6]);
1558 pwd->b[7] = msa_aver_u_df(DF_BYTE, pws->b[7], pwt->b[7]);
1559 pwd->b[8] = msa_aver_u_df(DF_BYTE, pws->b[8], pwt->b[8]);
1560 pwd->b[9] = msa_aver_u_df(DF_BYTE, pws->b[9], pwt->b[9]);
1561 pwd->b[10] = msa_aver_u_df(DF_BYTE, pws->b[10], pwt->b[10]);
1562 pwd->b[11] = msa_aver_u_df(DF_BYTE, pws->b[11], pwt->b[11]);
1563 pwd->b[12] = msa_aver_u_df(DF_BYTE, pws->b[12], pwt->b[12]);
1564 pwd->b[13] = msa_aver_u_df(DF_BYTE, pws->b[13], pwt->b[13]);
1565 pwd->b[14] = msa_aver_u_df(DF_BYTE, pws->b[14], pwt->b[14]);
1566 pwd->b[15] = msa_aver_u_df(DF_BYTE, pws->b[15], pwt->b[15]);
1567 }
1568
1569 void helper_msa_aver_u_h(CPUMIPSState *env,
1570 uint32_t wd, uint32_t ws, uint32_t wt)
1571 {
1572 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1573 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1574 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1575
1576 pwd->h[0] = msa_aver_u_df(DF_HALF, pws->h[0], pwt->h[0]);
1577 pwd->h[1] = msa_aver_u_df(DF_HALF, pws->h[1], pwt->h[1]);
1578 pwd->h[2] = msa_aver_u_df(DF_HALF, pws->h[2], pwt->h[2]);
1579 pwd->h[3] = msa_aver_u_df(DF_HALF, pws->h[3], pwt->h[3]);
1580 pwd->h[4] = msa_aver_u_df(DF_HALF, pws->h[4], pwt->h[4]);
1581 pwd->h[5] = msa_aver_u_df(DF_HALF, pws->h[5], pwt->h[5]);
1582 pwd->h[6] = msa_aver_u_df(DF_HALF, pws->h[6], pwt->h[6]);
1583 pwd->h[7] = msa_aver_u_df(DF_HALF, pws->h[7], pwt->h[7]);
1584 }
1585
1586 void helper_msa_aver_u_w(CPUMIPSState *env,
1587 uint32_t wd, uint32_t ws, uint32_t wt)
1588 {
1589 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1590 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1591 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1592
1593 pwd->w[0] = msa_aver_u_df(DF_WORD, pws->w[0], pwt->w[0]);
1594 pwd->w[1] = msa_aver_u_df(DF_WORD, pws->w[1], pwt->w[1]);
1595 pwd->w[2] = msa_aver_u_df(DF_WORD, pws->w[2], pwt->w[2]);
1596 pwd->w[3] = msa_aver_u_df(DF_WORD, pws->w[3], pwt->w[3]);
1597 }
1598
1599 void helper_msa_aver_u_d(CPUMIPSState *env,
1600 uint32_t wd, uint32_t ws, uint32_t wt)
1601 {
1602 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1603 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1604 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1605
1606 pwd->d[0] = msa_aver_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
1607 pwd->d[1] = msa_aver_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
1608 }
1609
1610
1611 /*
1612 * Int Compare
1613 * -----------
1614 *
1615 * +---------------+----------------------------------------------------------+
1616 * | CEQ.B | Vector Compare Equal (byte) |
1617 * | CEQ.H | Vector Compare Equal (halfword) |
1618 * | CEQ.W | Vector Compare Equal (word) |
1619 * | CEQ.D | Vector Compare Equal (doubleword) |
1620 * | CLE_S.B | Vector Compare Signed Less Than or Equal (byte) |
1621 * | CLE_S.H | Vector Compare Signed Less Than or Equal (halfword) |
1622 * | CLE_S.W | Vector Compare Signed Less Than or Equal (word) |
1623 * | CLE_S.D | Vector Compare Signed Less Than or Equal (doubleword) |
1624 * | CLE_U.B | Vector Compare Unsigned Less Than or Equal (byte) |
1625 * | CLE_U.H | Vector Compare Unsigned Less Than or Equal (halfword) |
1626 * | CLE_U.W | Vector Compare Unsigned Less Than or Equal (word) |
1627 * | CLE_U.D | Vector Compare Unsigned Less Than or Equal (doubleword) |
1628 * | CLT_S.B | Vector Compare Signed Less Than (byte) |
1629 * | CLT_S.H | Vector Compare Signed Less Than (halfword) |
1630 * | CLT_S.W | Vector Compare Signed Less Than (word) |
1631 * | CLT_S.D | Vector Compare Signed Less Than (doubleword) |
1632 * | CLT_U.B | Vector Compare Unsigned Less Than (byte) |
1633 * | CLT_U.H | Vector Compare Unsigned Less Than (halfword) |
1634 * | CLT_U.W | Vector Compare Unsigned Less Than (word) |
1635 * | CLT_U.D | Vector Compare Unsigned Less Than (doubleword) |
1636 * +---------------+----------------------------------------------------------+
1637 */
1638
1639 static inline int64_t msa_ceq_df(uint32_t df, int64_t arg1, int64_t arg2)
1640 {
1641 return arg1 == arg2 ? -1 : 0;
1642 }
1643
1644 static inline int8_t msa_ceq_b(int8_t arg1, int8_t arg2)
1645 {
1646 return arg1 == arg2 ? -1 : 0;
1647 }
1648
1649 void helper_msa_ceq_b(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
1650 {
1651 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1652 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1653 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1654
1655 pwd->b[0] = msa_ceq_b(pws->b[0], pwt->b[0]);
1656 pwd->b[1] = msa_ceq_b(pws->b[1], pwt->b[1]);
1657 pwd->b[2] = msa_ceq_b(pws->b[2], pwt->b[2]);
1658 pwd->b[3] = msa_ceq_b(pws->b[3], pwt->b[3]);
1659 pwd->b[4] = msa_ceq_b(pws->b[4], pwt->b[4]);
1660 pwd->b[5] = msa_ceq_b(pws->b[5], pwt->b[5]);
1661 pwd->b[6] = msa_ceq_b(pws->b[6], pwt->b[6]);
1662 pwd->b[7] = msa_ceq_b(pws->b[7], pwt->b[7]);
1663 pwd->b[8] = msa_ceq_b(pws->b[8], pwt->b[8]);
1664 pwd->b[9] = msa_ceq_b(pws->b[9], pwt->b[9]);
1665 pwd->b[10] = msa_ceq_b(pws->b[10], pwt->b[10]);
1666 pwd->b[11] = msa_ceq_b(pws->b[11], pwt->b[11]);
1667 pwd->b[12] = msa_ceq_b(pws->b[12], pwt->b[12]);
1668 pwd->b[13] = msa_ceq_b(pws->b[13], pwt->b[13]);
1669 pwd->b[14] = msa_ceq_b(pws->b[14], pwt->b[14]);
1670 pwd->b[15] = msa_ceq_b(pws->b[15], pwt->b[15]);
1671 }
1672
1673 static inline int16_t msa_ceq_h(int16_t arg1, int16_t arg2)
1674 {
1675 return arg1 == arg2 ? -1 : 0;
1676 }
1677
1678 void helper_msa_ceq_h(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
1679 {
1680 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1681 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1682 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1683
1684 pwd->h[0] = msa_ceq_h(pws->h[0], pwt->h[0]);
1685 pwd->h[1] = msa_ceq_h(pws->h[1], pwt->h[1]);
1686 pwd->h[2] = msa_ceq_h(pws->h[2], pwt->h[2]);
1687 pwd->h[3] = msa_ceq_h(pws->h[3], pwt->h[3]);
1688 pwd->h[4] = msa_ceq_h(pws->h[4], pwt->h[4]);
1689 pwd->h[5] = msa_ceq_h(pws->h[5], pwt->h[5]);
1690 pwd->h[6] = msa_ceq_h(pws->h[6], pwt->h[6]);
1691 pwd->h[7] = msa_ceq_h(pws->h[7], pwt->h[7]);
1692 }
1693
1694 static inline int32_t msa_ceq_w(int32_t arg1, int32_t arg2)
1695 {
1696 return arg1 == arg2 ? -1 : 0;
1697 }
1698
1699 void helper_msa_ceq_w(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
1700 {
1701 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1702 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1703 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1704
1705 pwd->w[0] = msa_ceq_w(pws->w[0], pwt->w[0]);
1706 pwd->w[1] = msa_ceq_w(pws->w[1], pwt->w[1]);
1707 pwd->w[2] = msa_ceq_w(pws->w[2], pwt->w[2]);
1708 pwd->w[3] = msa_ceq_w(pws->w[3], pwt->w[3]);
1709 }
1710
1711 static inline int64_t msa_ceq_d(int64_t arg1, int64_t arg2)
1712 {
1713 return arg1 == arg2 ? -1 : 0;
1714 }
1715
1716 void helper_msa_ceq_d(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
1717 {
1718 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1719 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1720 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1721
1722 pwd->d[0] = msa_ceq_d(pws->d[0], pwt->d[0]);
1723 pwd->d[1] = msa_ceq_d(pws->d[1], pwt->d[1]);
1724 }
1725
1726 static inline int64_t msa_cle_s_df(uint32_t df, int64_t arg1, int64_t arg2)
1727 {
1728 return arg1 <= arg2 ? -1 : 0;
1729 }
1730
1731 void helper_msa_cle_s_b(CPUMIPSState *env,
1732 uint32_t wd, uint32_t ws, uint32_t wt)
1733 {
1734 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1735 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1736 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1737
1738 pwd->b[0] = msa_cle_s_df(DF_BYTE, pws->b[0], pwt->b[0]);
1739 pwd->b[1] = msa_cle_s_df(DF_BYTE, pws->b[1], pwt->b[1]);
1740 pwd->b[2] = msa_cle_s_df(DF_BYTE, pws->b[2], pwt->b[2]);
1741 pwd->b[3] = msa_cle_s_df(DF_BYTE, pws->b[3], pwt->b[3]);
1742 pwd->b[4] = msa_cle_s_df(DF_BYTE, pws->b[4], pwt->b[4]);
1743 pwd->b[5] = msa_cle_s_df(DF_BYTE, pws->b[5], pwt->b[5]);
1744 pwd->b[6] = msa_cle_s_df(DF_BYTE, pws->b[6], pwt->b[6]);
1745 pwd->b[7] = msa_cle_s_df(DF_BYTE, pws->b[7], pwt->b[7]);
1746 pwd->b[8] = msa_cle_s_df(DF_BYTE, pws->b[8], pwt->b[8]);
1747 pwd->b[9] = msa_cle_s_df(DF_BYTE, pws->b[9], pwt->b[9]);
1748 pwd->b[10] = msa_cle_s_df(DF_BYTE, pws->b[10], pwt->b[10]);
1749 pwd->b[11] = msa_cle_s_df(DF_BYTE, pws->b[11], pwt->b[11]);
1750 pwd->b[12] = msa_cle_s_df(DF_BYTE, pws->b[12], pwt->b[12]);
1751 pwd->b[13] = msa_cle_s_df(DF_BYTE, pws->b[13], pwt->b[13]);
1752 pwd->b[14] = msa_cle_s_df(DF_BYTE, pws->b[14], pwt->b[14]);
1753 pwd->b[15] = msa_cle_s_df(DF_BYTE, pws->b[15], pwt->b[15]);
1754 }
1755
1756 void helper_msa_cle_s_h(CPUMIPSState *env,
1757 uint32_t wd, uint32_t ws, uint32_t wt)
1758 {
1759 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1760 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1761 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1762
1763 pwd->h[0] = msa_cle_s_df(DF_HALF, pws->h[0], pwt->h[0]);
1764 pwd->h[1] = msa_cle_s_df(DF_HALF, pws->h[1], pwt->h[1]);
1765 pwd->h[2] = msa_cle_s_df(DF_HALF, pws->h[2], pwt->h[2]);
1766 pwd->h[3] = msa_cle_s_df(DF_HALF, pws->h[3], pwt->h[3]);
1767 pwd->h[4] = msa_cle_s_df(DF_HALF, pws->h[4], pwt->h[4]);
1768 pwd->h[5] = msa_cle_s_df(DF_HALF, pws->h[5], pwt->h[5]);
1769 pwd->h[6] = msa_cle_s_df(DF_HALF, pws->h[6], pwt->h[6]);
1770 pwd->h[7] = msa_cle_s_df(DF_HALF, pws->h[7], pwt->h[7]);
1771 }
1772
1773 void helper_msa_cle_s_w(CPUMIPSState *env,
1774 uint32_t wd, uint32_t ws, uint32_t wt)
1775 {
1776 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1777 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1778 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1779
1780 pwd->w[0] = msa_cle_s_df(DF_WORD, pws->w[0], pwt->w[0]);
1781 pwd->w[1] = msa_cle_s_df(DF_WORD, pws->w[1], pwt->w[1]);
1782 pwd->w[2] = msa_cle_s_df(DF_WORD, pws->w[2], pwt->w[2]);
1783 pwd->w[3] = msa_cle_s_df(DF_WORD, pws->w[3], pwt->w[3]);
1784 }
1785
1786 void helper_msa_cle_s_d(CPUMIPSState *env,
1787 uint32_t wd, uint32_t ws, uint32_t wt)
1788 {
1789 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1790 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1791 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1792
1793 pwd->d[0] = msa_cle_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
1794 pwd->d[1] = msa_cle_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
1795 }
1796
1797 static inline int64_t msa_cle_u_df(uint32_t df, int64_t arg1, int64_t arg2)
1798 {
1799 uint64_t u_arg1 = UNSIGNED(arg1, df);
1800 uint64_t u_arg2 = UNSIGNED(arg2, df);
1801 return u_arg1 <= u_arg2 ? -1 : 0;
1802 }
1803
1804 void helper_msa_cle_u_b(CPUMIPSState *env,
1805 uint32_t wd, uint32_t ws, uint32_t wt)
1806 {
1807 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1808 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1809 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1810
1811 pwd->b[0] = msa_cle_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
1812 pwd->b[1] = msa_cle_u_df(DF_BYTE, pws->b[1], pwt->b[1]);
1813 pwd->b[2] = msa_cle_u_df(DF_BYTE, pws->b[2], pwt->b[2]);
1814 pwd->b[3] = msa_cle_u_df(DF_BYTE, pws->b[3], pwt->b[3]);
1815 pwd->b[4] = msa_cle_u_df(DF_BYTE, pws->b[4], pwt->b[4]);
1816 pwd->b[5] = msa_cle_u_df(DF_BYTE, pws->b[5], pwt->b[5]);
1817 pwd->b[6] = msa_cle_u_df(DF_BYTE, pws->b[6], pwt->b[6]);
1818 pwd->b[7] = msa_cle_u_df(DF_BYTE, pws->b[7], pwt->b[7]);
1819 pwd->b[8] = msa_cle_u_df(DF_BYTE, pws->b[8], pwt->b[8]);
1820 pwd->b[9] = msa_cle_u_df(DF_BYTE, pws->b[9], pwt->b[9]);
1821 pwd->b[10] = msa_cle_u_df(DF_BYTE, pws->b[10], pwt->b[10]);
1822 pwd->b[11] = msa_cle_u_df(DF_BYTE, pws->b[11], pwt->b[11]);
1823 pwd->b[12] = msa_cle_u_df(DF_BYTE, pws->b[12], pwt->b[12]);
1824 pwd->b[13] = msa_cle_u_df(DF_BYTE, pws->b[13], pwt->b[13]);
1825 pwd->b[14] = msa_cle_u_df(DF_BYTE, pws->b[14], pwt->b[14]);
1826 pwd->b[15] = msa_cle_u_df(DF_BYTE, pws->b[15], pwt->b[15]);
1827 }
1828
1829 void helper_msa_cle_u_h(CPUMIPSState *env,
1830 uint32_t wd, uint32_t ws, uint32_t wt)
1831 {
1832 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1833 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1834 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1835
1836 pwd->h[0] = msa_cle_u_df(DF_HALF, pws->h[0], pwt->h[0]);
1837 pwd->h[1] = msa_cle_u_df(DF_HALF, pws->h[1], pwt->h[1]);
1838 pwd->h[2] = msa_cle_u_df(DF_HALF, pws->h[2], pwt->h[2]);
1839 pwd->h[3] = msa_cle_u_df(DF_HALF, pws->h[3], pwt->h[3]);
1840 pwd->h[4] = msa_cle_u_df(DF_HALF, pws->h[4], pwt->h[4]);
1841 pwd->h[5] = msa_cle_u_df(DF_HALF, pws->h[5], pwt->h[5]);
1842 pwd->h[6] = msa_cle_u_df(DF_HALF, pws->h[6], pwt->h[6]);
1843 pwd->h[7] = msa_cle_u_df(DF_HALF, pws->h[7], pwt->h[7]);
1844 }
1845
1846 void helper_msa_cle_u_w(CPUMIPSState *env,
1847 uint32_t wd, uint32_t ws, uint32_t wt)
1848 {
1849 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1850 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1851 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1852
1853 pwd->w[0] = msa_cle_u_df(DF_WORD, pws->w[0], pwt->w[0]);
1854 pwd->w[1] = msa_cle_u_df(DF_WORD, pws->w[1], pwt->w[1]);
1855 pwd->w[2] = msa_cle_u_df(DF_WORD, pws->w[2], pwt->w[2]);
1856 pwd->w[3] = msa_cle_u_df(DF_WORD, pws->w[3], pwt->w[3]);
1857 }
1858
1859 void helper_msa_cle_u_d(CPUMIPSState *env,
1860 uint32_t wd, uint32_t ws, uint32_t wt)
1861 {
1862 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1863 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1864 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1865
1866 pwd->d[0] = msa_cle_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
1867 pwd->d[1] = msa_cle_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
1868 }
1869
1870 static inline int64_t msa_clt_s_df(uint32_t df, int64_t arg1, int64_t arg2)
1871 {
1872 return arg1 < arg2 ? -1 : 0;
1873 }
1874
1875 static inline int8_t msa_clt_s_b(int8_t arg1, int8_t arg2)
1876 {
1877 return arg1 < arg2 ? -1 : 0;
1878 }
1879
1880 void helper_msa_clt_s_b(CPUMIPSState *env,
1881 uint32_t wd, uint32_t ws, uint32_t wt)
1882 {
1883 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1884 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1885 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1886
1887 pwd->b[0] = msa_clt_s_b(pws->b[0], pwt->b[0]);
1888 pwd->b[1] = msa_clt_s_b(pws->b[1], pwt->b[1]);
1889 pwd->b[2] = msa_clt_s_b(pws->b[2], pwt->b[2]);
1890 pwd->b[3] = msa_clt_s_b(pws->b[3], pwt->b[3]);
1891 pwd->b[4] = msa_clt_s_b(pws->b[4], pwt->b[4]);
1892 pwd->b[5] = msa_clt_s_b(pws->b[5], pwt->b[5]);
1893 pwd->b[6] = msa_clt_s_b(pws->b[6], pwt->b[6]);
1894 pwd->b[7] = msa_clt_s_b(pws->b[7], pwt->b[7]);
1895 pwd->b[8] = msa_clt_s_b(pws->b[8], pwt->b[8]);
1896 pwd->b[9] = msa_clt_s_b(pws->b[9], pwt->b[9]);
1897 pwd->b[10] = msa_clt_s_b(pws->b[10], pwt->b[10]);
1898 pwd->b[11] = msa_clt_s_b(pws->b[11], pwt->b[11]);
1899 pwd->b[12] = msa_clt_s_b(pws->b[12], pwt->b[12]);
1900 pwd->b[13] = msa_clt_s_b(pws->b[13], pwt->b[13]);
1901 pwd->b[14] = msa_clt_s_b(pws->b[14], pwt->b[14]);
1902 pwd->b[15] = msa_clt_s_b(pws->b[15], pwt->b[15]);
1903 }
1904
1905 static inline int16_t msa_clt_s_h(int16_t arg1, int16_t arg2)
1906 {
1907 return arg1 < arg2 ? -1 : 0;
1908 }
1909
1910 void helper_msa_clt_s_h(CPUMIPSState *env,
1911 uint32_t wd, uint32_t ws, uint32_t wt)
1912 {
1913 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1914 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1915 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1916
1917 pwd->h[0] = msa_clt_s_h(pws->h[0], pwt->h[0]);
1918 pwd->h[1] = msa_clt_s_h(pws->h[1], pwt->h[1]);
1919 pwd->h[2] = msa_clt_s_h(pws->h[2], pwt->h[2]);
1920 pwd->h[3] = msa_clt_s_h(pws->h[3], pwt->h[3]);
1921 pwd->h[4] = msa_clt_s_h(pws->h[4], pwt->h[4]);
1922 pwd->h[5] = msa_clt_s_h(pws->h[5], pwt->h[5]);
1923 pwd->h[6] = msa_clt_s_h(pws->h[6], pwt->h[6]);
1924 pwd->h[7] = msa_clt_s_h(pws->h[7], pwt->h[7]);
1925 }
1926
1927 static inline int32_t msa_clt_s_w(int32_t arg1, int32_t arg2)
1928 {
1929 return arg1 < arg2 ? -1 : 0;
1930 }
1931
1932 void helper_msa_clt_s_w(CPUMIPSState *env,
1933 uint32_t wd, uint32_t ws, uint32_t wt)
1934 {
1935 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1936 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1937 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1938
1939 pwd->w[0] = msa_clt_s_w(pws->w[0], pwt->w[0]);
1940 pwd->w[1] = msa_clt_s_w(pws->w[1], pwt->w[1]);
1941 pwd->w[2] = msa_clt_s_w(pws->w[2], pwt->w[2]);
1942 pwd->w[3] = msa_clt_s_w(pws->w[3], pwt->w[3]);
1943 }
1944
1945 static inline int64_t msa_clt_s_d(int64_t arg1, int64_t arg2)
1946 {
1947 return arg1 < arg2 ? -1 : 0;
1948 }
1949
1950 void helper_msa_clt_s_d(CPUMIPSState *env,
1951 uint32_t wd, uint32_t ws, uint32_t wt)
1952 {
1953 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1954 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1955 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1956
1957 pwd->d[0] = msa_clt_s_d(pws->d[0], pwt->d[0]);
1958 pwd->d[1] = msa_clt_s_d(pws->d[1], pwt->d[1]);
1959 }
1960
1961 static inline int64_t msa_clt_u_df(uint32_t df, int64_t arg1, int64_t arg2)
1962 {
1963 uint64_t u_arg1 = UNSIGNED(arg1, df);
1964 uint64_t u_arg2 = UNSIGNED(arg2, df);
1965 return u_arg1 < u_arg2 ? -1 : 0;
1966 }
1967
1968 void helper_msa_clt_u_b(CPUMIPSState *env,
1969 uint32_t wd, uint32_t ws, uint32_t wt)
1970 {
1971 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1972 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1973 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1974
1975 pwd->b[0] = msa_clt_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
1976 pwd->b[1] = msa_clt_u_df(DF_BYTE, pws->b[1], pwt->b[1]);
1977 pwd->b[2] = msa_clt_u_df(DF_BYTE, pws->b[2], pwt->b[2]);
1978 pwd->b[3] = msa_clt_u_df(DF_BYTE, pws->b[3], pwt->b[3]);
1979 pwd->b[4] = msa_clt_u_df(DF_BYTE, pws->b[4], pwt->b[4]);
1980 pwd->b[5] = msa_clt_u_df(DF_BYTE, pws->b[5], pwt->b[5]);
1981 pwd->b[6] = msa_clt_u_df(DF_BYTE, pws->b[6], pwt->b[6]);
1982 pwd->b[7] = msa_clt_u_df(DF_BYTE, pws->b[7], pwt->b[7]);
1983 pwd->b[8] = msa_clt_u_df(DF_BYTE, pws->b[8], pwt->b[8]);
1984 pwd->b[9] = msa_clt_u_df(DF_BYTE, pws->b[9], pwt->b[9]);
1985 pwd->b[10] = msa_clt_u_df(DF_BYTE, pws->b[10], pwt->b[10]);
1986 pwd->b[11] = msa_clt_u_df(DF_BYTE, pws->b[11], pwt->b[11]);
1987 pwd->b[12] = msa_clt_u_df(DF_BYTE, pws->b[12], pwt->b[12]);
1988 pwd->b[13] = msa_clt_u_df(DF_BYTE, pws->b[13], pwt->b[13]);
1989 pwd->b[14] = msa_clt_u_df(DF_BYTE, pws->b[14], pwt->b[14]);
1990 pwd->b[15] = msa_clt_u_df(DF_BYTE, pws->b[15], pwt->b[15]);
1991 }
1992
1993 void helper_msa_clt_u_h(CPUMIPSState *env,
1994 uint32_t wd, uint32_t ws, uint32_t wt)
1995 {
1996 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1997 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1998 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1999
2000 pwd->h[0] = msa_clt_u_df(DF_HALF, pws->h[0], pwt->h[0]);
2001 pwd->h[1] = msa_clt_u_df(DF_HALF, pws->h[1], pwt->h[1]);
2002 pwd->h[2] = msa_clt_u_df(DF_HALF, pws->h[2], pwt->h[2]);
2003 pwd->h[3] = msa_clt_u_df(DF_HALF, pws->h[3], pwt->h[3]);
2004 pwd->h[4] = msa_clt_u_df(DF_HALF, pws->h[4], pwt->h[4]);
2005 pwd->h[5] = msa_clt_u_df(DF_HALF, pws->h[5], pwt->h[5]);
2006 pwd->h[6] = msa_clt_u_df(DF_HALF, pws->h[6], pwt->h[6]);
2007 pwd->h[7] = msa_clt_u_df(DF_HALF, pws->h[7], pwt->h[7]);
2008 }
2009
2010 void helper_msa_clt_u_w(CPUMIPSState *env,
2011 uint32_t wd, uint32_t ws, uint32_t wt)
2012 {
2013 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2014 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2015 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2016
2017 pwd->w[0] = msa_clt_u_df(DF_WORD, pws->w[0], pwt->w[0]);
2018 pwd->w[1] = msa_clt_u_df(DF_WORD, pws->w[1], pwt->w[1]);
2019 pwd->w[2] = msa_clt_u_df(DF_WORD, pws->w[2], pwt->w[2]);
2020 pwd->w[3] = msa_clt_u_df(DF_WORD, pws->w[3], pwt->w[3]);
2021 }
2022
2023 void helper_msa_clt_u_d(CPUMIPSState *env,
2024 uint32_t wd, uint32_t ws, uint32_t wt)
2025 {
2026 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2027 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2028 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2029
2030 pwd->d[0] = msa_clt_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
2031 pwd->d[1] = msa_clt_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
2032 }
2033
2034
2035 /*
2036 * Int Divide
2037 * ----------
2038 *
2039 * +---------------+----------------------------------------------------------+
2040 * | DIV_S.B | Vector Signed Divide (byte) |
2041 * | DIV_S.H | Vector Signed Divide (halfword) |
2042 * | DIV_S.W | Vector Signed Divide (word) |
2043 * | DIV_S.D | Vector Signed Divide (doubleword) |
2044 * | DIV_U.B | Vector Unsigned Divide (byte) |
2045 * | DIV_U.H | Vector Unsigned Divide (halfword) |
2046 * | DIV_U.W | Vector Unsigned Divide (word) |
2047 * | DIV_U.D | Vector Unsigned Divide (doubleword) |
2048 * +---------------+----------------------------------------------------------+
2049 */
2050
2051
2052 static inline int64_t msa_div_s_df(uint32_t df, int64_t arg1, int64_t arg2)
2053 {
2054 if (arg1 == DF_MIN_INT(df) && arg2 == -1) {
2055 return DF_MIN_INT(df);
2056 }
2057 return arg2 ? arg1 / arg2
2058 : arg1 >= 0 ? -1 : 1;
2059 }
2060
2061 void helper_msa_div_s_b(CPUMIPSState *env,
2062 uint32_t wd, uint32_t ws, uint32_t wt)
2063 {
2064 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2065 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2066 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2067
2068 pwd->b[0] = msa_div_s_df(DF_BYTE, pws->b[0], pwt->b[0]);
2069 pwd->b[1] = msa_div_s_df(DF_BYTE, pws->b[1], pwt->b[1]);
2070 pwd->b[2] = msa_div_s_df(DF_BYTE, pws->b[2], pwt->b[2]);
2071 pwd->b[3] = msa_div_s_df(DF_BYTE, pws->b[3], pwt->b[3]);
2072 pwd->b[4] = msa_div_s_df(DF_BYTE, pws->b[4], pwt->b[4]);
2073 pwd->b[5] = msa_div_s_df(DF_BYTE, pws->b[5], pwt->b[5]);
2074 pwd->b[6] = msa_div_s_df(DF_BYTE, pws->b[6], pwt->b[6]);
2075 pwd->b[7] = msa_div_s_df(DF_BYTE, pws->b[7], pwt->b[7]);
2076 pwd->b[8] = msa_div_s_df(DF_BYTE, pws->b[8], pwt->b[8]);
2077 pwd->b[9] = msa_div_s_df(DF_BYTE, pws->b[9], pwt->b[9]);
2078 pwd->b[10] = msa_div_s_df(DF_BYTE, pws->b[10], pwt->b[10]);
2079 pwd->b[11] = msa_div_s_df(DF_BYTE, pws->b[11], pwt->b[11]);
2080 pwd->b[12] = msa_div_s_df(DF_BYTE, pws->b[12], pwt->b[12]);
2081 pwd->b[13] = msa_div_s_df(DF_BYTE, pws->b[13], pwt->b[13]);
2082 pwd->b[14] = msa_div_s_df(DF_BYTE, pws->b[14], pwt->b[14]);
2083 pwd->b[15] = msa_div_s_df(DF_BYTE, pws->b[15], pwt->b[15]);
2084 }
2085
2086 void helper_msa_div_s_h(CPUMIPSState *env,
2087 uint32_t wd, uint32_t ws, uint32_t wt)
2088 {
2089 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2090 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2091 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2092
2093 pwd->h[0] = msa_div_s_df(DF_HALF, pws->h[0], pwt->h[0]);
2094 pwd->h[1] = msa_div_s_df(DF_HALF, pws->h[1], pwt->h[1]);
2095 pwd->h[2] = msa_div_s_df(DF_HALF, pws->h[2], pwt->h[2]);
2096 pwd->h[3] = msa_div_s_df(DF_HALF, pws->h[3], pwt->h[3]);
2097 pwd->h[4] = msa_div_s_df(DF_HALF, pws->h[4], pwt->h[4]);
2098 pwd->h[5] = msa_div_s_df(DF_HALF, pws->h[5], pwt->h[5]);
2099 pwd->h[6] = msa_div_s_df(DF_HALF, pws->h[6], pwt->h[6]);
2100 pwd->h[7] = msa_div_s_df(DF_HALF, pws->h[7], pwt->h[7]);
2101 }
2102
2103 void helper_msa_div_s_w(CPUMIPSState *env,
2104 uint32_t wd, uint32_t ws, uint32_t wt)
2105 {
2106 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2107 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2108 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2109
2110 pwd->w[0] = msa_div_s_df(DF_WORD, pws->w[0], pwt->w[0]);
2111 pwd->w[1] = msa_div_s_df(DF_WORD, pws->w[1], pwt->w[1]);
2112 pwd->w[2] = msa_div_s_df(DF_WORD, pws->w[2], pwt->w[2]);
2113 pwd->w[3] = msa_div_s_df(DF_WORD, pws->w[3], pwt->w[3]);
2114 }
2115
2116 void helper_msa_div_s_d(CPUMIPSState *env,
2117 uint32_t wd, uint32_t ws, uint32_t wt)
2118 {
2119 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2120 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2121 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2122
2123 pwd->d[0] = msa_div_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
2124 pwd->d[1] = msa_div_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
2125 }
2126
2127 static inline int64_t msa_div_u_df(uint32_t df, int64_t arg1, int64_t arg2)
2128 {
2129 uint64_t u_arg1 = UNSIGNED(arg1, df);
2130 uint64_t u_arg2 = UNSIGNED(arg2, df);
2131 return arg2 ? u_arg1 / u_arg2 : -1;
2132 }
2133
2134 void helper_msa_div_u_b(CPUMIPSState *env,
2135 uint32_t wd, uint32_t ws, uint32_t wt)
2136 {
2137 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2138 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2139 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2140
2141 pwd->b[0] = msa_div_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
2142 pwd->b[1] = msa_div_u_df(DF_BYTE, pws->b[1], pwt->b[1]);
2143 pwd->b[2] = msa_div_u_df(DF_BYTE, pws->b[2], pwt->b[2]);
2144 pwd->b[3] = msa_div_u_df(DF_BYTE, pws->b[3], pwt->b[3]);
2145 pwd->b[4] = msa_div_u_df(DF_BYTE, pws->b[4], pwt->b[4]);
2146 pwd->b[5] = msa_div_u_df(DF_BYTE, pws->b[5], pwt->b[5]);
2147 pwd->b[6] = msa_div_u_df(DF_BYTE, pws->b[6], pwt->b[6]);
2148 pwd->b[7] = msa_div_u_df(DF_BYTE, pws->b[7], pwt->b[7]);
2149 pwd->b[8] = msa_div_u_df(DF_BYTE, pws->b[8], pwt->b[8]);
2150 pwd->b[9] = msa_div_u_df(DF_BYTE, pws->b[9], pwt->b[9]);
2151 pwd->b[10] = msa_div_u_df(DF_BYTE, pws->b[10], pwt->b[10]);
2152 pwd->b[11] = msa_div_u_df(DF_BYTE, pws->b[11], pwt->b[11]);
2153 pwd->b[12] = msa_div_u_df(DF_BYTE, pws->b[12], pwt->b[12]);
2154 pwd->b[13] = msa_div_u_df(DF_BYTE, pws->b[13], pwt->b[13]);
2155 pwd->b[14] = msa_div_u_df(DF_BYTE, pws->b[14], pwt->b[14]);
2156 pwd->b[15] = msa_div_u_df(DF_BYTE, pws->b[15], pwt->b[15]);
2157 }
2158
2159 void helper_msa_div_u_h(CPUMIPSState *env,
2160 uint32_t wd, uint32_t ws, uint32_t wt)
2161 {
2162 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2163 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2164 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2165
2166 pwd->h[0] = msa_div_u_df(DF_HALF, pws->h[0], pwt->h[0]);
2167 pwd->h[1] = msa_div_u_df(DF_HALF, pws->h[1], pwt->h[1]);
2168 pwd->h[2] = msa_div_u_df(DF_HALF, pws->h[2], pwt->h[2]);
2169 pwd->h[3] = msa_div_u_df(DF_HALF, pws->h[3], pwt->h[3]);
2170 pwd->h[4] = msa_div_u_df(DF_HALF, pws->h[4], pwt->h[4]);
2171 pwd->h[5] = msa_div_u_df(DF_HALF, pws->h[5], pwt->h[5]);
2172 pwd->h[6] = msa_div_u_df(DF_HALF, pws->h[6], pwt->h[6]);
2173 pwd->h[7] = msa_div_u_df(DF_HALF, pws->h[7], pwt->h[7]);
2174 }
2175
2176 void helper_msa_div_u_w(CPUMIPSState *env,
2177 uint32_t wd, uint32_t ws, uint32_t wt)
2178 {
2179 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2180 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2181 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2182
2183 pwd->w[0] = msa_div_u_df(DF_WORD, pws->w[0], pwt->w[0]);
2184 pwd->w[1] = msa_div_u_df(DF_WORD, pws->w[1], pwt->w[1]);
2185 pwd->w[2] = msa_div_u_df(DF_WORD, pws->w[2], pwt->w[2]);
2186 pwd->w[3] = msa_div_u_df(DF_WORD, pws->w[3], pwt->w[3]);
2187 }
2188
2189 void helper_msa_div_u_d(CPUMIPSState *env,
2190 uint32_t wd, uint32_t ws, uint32_t wt)
2191 {
2192 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2193 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2194 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2195
2196 pwd->d[0] = msa_div_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
2197 pwd->d[1] = msa_div_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
2198 }
2199
2200
2201 /*
2202 * Int Dot Product
2203 * ---------------
2204 *
2205 * +---------------+----------------------------------------------------------+
2206 * | DOTP_S.H | Vector Signed Dot Product (halfword) |
2207 * | DOTP_S.W | Vector Signed Dot Product (word) |
2208 * | DOTP_S.D | Vector Signed Dot Product (doubleword) |
2209 * | DOTP_U.H | Vector Unsigned Dot Product (halfword) |
2210 * | DOTP_U.W | Vector Unsigned Dot Product (word) |
2211 * | DOTP_U.D | Vector Unsigned Dot Product (doubleword) |
2212 * | DPADD_S.H | Vector Signed Dot Product (halfword) |
2213 * | DPADD_S.W | Vector Signed Dot Product (word) |
2214 * | DPADD_S.D | Vector Signed Dot Product (doubleword) |
2215 * | DPADD_U.H | Vector Unsigned Dot Product (halfword) |
2216 * | DPADD_U.W | Vector Unsigned Dot Product (word) |
2217 * | DPADD_U.D | Vector Unsigned Dot Product (doubleword) |
2218 * | DPSUB_S.H | Vector Signed Dot Product (halfword) |
2219 * | DPSUB_S.W | Vector Signed Dot Product (word) |
2220 * | DPSUB_S.D | Vector Signed Dot Product (doubleword) |
2221 * | DPSUB_U.H | Vector Unsigned Dot Product (halfword) |
2222 * | DPSUB_U.W | Vector Unsigned Dot Product (word) |
2223 * | DPSUB_U.D | Vector Unsigned Dot Product (doubleword) |
2224 * +---------------+----------------------------------------------------------+
2225 */
2226
2227 #define SIGNED_EXTRACT(e, o, a, df) \
2228 do { \
2229 e = SIGNED_EVEN(a, df); \
2230 o = SIGNED_ODD(a, df); \
2231 } while (0)
2232
2233 #define UNSIGNED_EXTRACT(e, o, a, df) \
2234 do { \
2235 e = UNSIGNED_EVEN(a, df); \
2236 o = UNSIGNED_ODD(a, df); \
2237 } while (0)
2238
2239
2240 static inline int64_t msa_dotp_s_df(uint32_t df, int64_t arg1, int64_t arg2)
2241 {
2242 int64_t even_arg1;
2243 int64_t even_arg2;
2244 int64_t odd_arg1;
2245 int64_t odd_arg2;
2246 SIGNED_EXTRACT(even_arg1, odd_arg1, arg1, df);
2247 SIGNED_EXTRACT(even_arg2, odd_arg2, arg2, df);
2248 return (even_arg1 * even_arg2) + (odd_arg1 * odd_arg2);
2249 }
2250
2251 void helper_msa_dotp_s_h(CPUMIPSState *env,
2252 uint32_t wd, uint32_t ws, uint32_t wt)
2253 {
2254 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2255 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2256 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2257
2258 pwd->h[0] = msa_dotp_s_df(DF_HALF, pws->h[0], pwt->h[0]);
2259 pwd->h[1] = msa_dotp_s_df(DF_HALF, pws->h[1], pwt->h[1]);
2260 pwd->h[2] = msa_dotp_s_df(DF_HALF, pws->h[2], pwt->h[2]);
2261 pwd->h[3] = msa_dotp_s_df(DF_HALF, pws->h[3], pwt->h[3]);
2262 pwd->h[4] = msa_dotp_s_df(DF_HALF, pws->h[4], pwt->h[4]);
2263 pwd->h[5] = msa_dotp_s_df(DF_HALF, pws->h[5], pwt->h[5]);
2264 pwd->h[6] = msa_dotp_s_df(DF_HALF, pws->h[6], pwt->h[6]);
2265 pwd->h[7] = msa_dotp_s_df(DF_HALF, pws->h[7], pwt->h[7]);
2266 }
2267
2268 void helper_msa_dotp_s_w(CPUMIPSState *env,
2269 uint32_t wd, uint32_t ws, uint32_t wt)
2270 {
2271 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2272 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2273 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2274
2275 pwd->w[0] = msa_dotp_s_df(DF_WORD, pws->w[0], pwt->w[0]);
2276 pwd->w[1] = msa_dotp_s_df(DF_WORD, pws->w[1], pwt->w[1]);
2277 pwd->w[2] = msa_dotp_s_df(DF_WORD, pws->w[2], pwt->w[2]);
2278 pwd->w[3] = msa_dotp_s_df(DF_WORD, pws->w[3], pwt->w[3]);
2279 }
2280
2281 void helper_msa_dotp_s_d(CPUMIPSState *env,
2282 uint32_t wd, uint32_t ws, uint32_t wt)
2283 {
2284 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2285 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2286 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2287
2288 pwd->d[0] = msa_dotp_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
2289 pwd->d[1] = msa_dotp_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
2290 }
2291
2292
2293 static inline int64_t msa_dotp_u_df(uint32_t df, int64_t arg1, int64_t arg2)
2294 {
2295 int64_t even_arg1;
2296 int64_t even_arg2;
2297 int64_t odd_arg1;
2298 int64_t odd_arg2;
2299 UNSIGNED_EXTRACT(even_arg1, odd_arg1, arg1, df);
2300 UNSIGNED_EXTRACT(even_arg2, odd_arg2, arg2, df);
2301 return (even_arg1 * even_arg2) + (odd_arg1 * odd_arg2);
2302 }
2303
2304 void helper_msa_dotp_u_h(CPUMIPSState *env,
2305 uint32_t wd, uint32_t ws, uint32_t wt)
2306 {
2307 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2308 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2309 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2310
2311 pwd->h[0] = msa_dotp_u_df(DF_HALF, pws->h[0], pwt->h[0]);
2312 pwd->h[1] = msa_dotp_u_df(DF_HALF, pws->h[1], pwt->h[1]);
2313 pwd->h[2] = msa_dotp_u_df(DF_HALF, pws->h[2], pwt->h[2]);
2314 pwd->h[3] = msa_dotp_u_df(DF_HALF, pws->h[3], pwt->h[3]);
2315 pwd->h[4] = msa_dotp_u_df(DF_HALF, pws->h[4], pwt->h[4]);
2316 pwd->h[5] = msa_dotp_u_df(DF_HALF, pws->h[5], pwt->h[5]);
2317 pwd->h[6] = msa_dotp_u_df(DF_HALF, pws->h[6], pwt->h[6]);
2318 pwd->h[7] = msa_dotp_u_df(DF_HALF, pws->h[7], pwt->h[7]);
2319 }
2320
2321 void helper_msa_dotp_u_w(CPUMIPSState *env,
2322 uint32_t wd, uint32_t ws, uint32_t wt)
2323 {
2324 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2325 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2326 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2327
2328 pwd->w[0] = msa_dotp_u_df(DF_WORD, pws->w[0], pwt->w[0]);
2329 pwd->w[1] = msa_dotp_u_df(DF_WORD, pws->w[1], pwt->w[1]);
2330 pwd->w[2] = msa_dotp_u_df(DF_WORD, pws->w[2], pwt->w[2]);
2331 pwd->w[3] = msa_dotp_u_df(DF_WORD, pws->w[3], pwt->w[3]);
2332 }
2333
2334 void helper_msa_dotp_u_d(CPUMIPSState *env,
2335 uint32_t wd, uint32_t ws, uint32_t wt)
2336 {
2337 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2338 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2339 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2340
2341 pwd->d[0] = msa_dotp_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
2342 pwd->d[1] = msa_dotp_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
2343 }
2344
2345
2346 static inline int64_t msa_dpadd_s_df(uint32_t df, int64_t dest, int64_t arg1,
2347 int64_t arg2)
2348 {
2349 int64_t even_arg1;
2350 int64_t even_arg2;
2351 int64_t odd_arg1;
2352 int64_t odd_arg2;
2353 SIGNED_EXTRACT(even_arg1, odd_arg1, arg1, df);
2354 SIGNED_EXTRACT(even_arg2, odd_arg2, arg2, df);
2355 return dest + (even_arg1 * even_arg2) + (odd_arg1 * odd_arg2);
2356 }
2357
2358 void helper_msa_dpadd_s_h(CPUMIPSState *env,
2359 uint32_t wd, uint32_t ws, uint32_t wt)
2360 {
2361 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2362 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2363 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2364
2365 pwd->h[0] = msa_dpadd_s_df(DF_HALF, pwd->h[0], pws->h[0], pwt->h[0]);
2366 pwd->h[1] = msa_dpadd_s_df(DF_HALF, pwd->h[1], pws->h[1], pwt->h[1]);
2367 pwd->h[2] = msa_dpadd_s_df(DF_HALF, pwd->h[2], pws->h[2], pwt->h[2]);
2368 pwd->h[3] = msa_dpadd_s_df(DF_HALF, pwd->h[3], pws->h[3], pwt->h[3]);
2369 pwd->h[4] = msa_dpadd_s_df(DF_HALF, pwd->h[4], pws->h[4], pwt->h[4]);
2370 pwd->h[5] = msa_dpadd_s_df(DF_HALF, pwd->h[5], pws->h[5], pwt->h[5]);
2371 pwd->h[6] = msa_dpadd_s_df(DF_HALF, pwd->h[6], pws->h[6], pwt->h[6]);
2372 pwd->h[7] = msa_dpadd_s_df(DF_HALF, pwd->h[7], pws->h[7], pwt->h[7]);
2373 }
2374
2375 void helper_msa_dpadd_s_w(CPUMIPSState *env,
2376 uint32_t wd, uint32_t ws, uint32_t wt)
2377 {
2378 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2379 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2380 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2381
2382 pwd->w[0] = msa_dpadd_s_df(DF_WORD, pwd->w[0], pws->w[0], pwt->w[0]);
2383 pwd->w[1] = msa_dpadd_s_df(DF_WORD, pwd->w[1], pws->w[1], pwt->w[1]);
2384 pwd->w[2] = msa_dpadd_s_df(DF_WORD, pwd->w[2], pws->w[2], pwt->w[2]);
2385 pwd->w[3] = msa_dpadd_s_df(DF_WORD, pwd->w[3], pws->w[3], pwt->w[3]);
2386 }
2387
2388 void helper_msa_dpadd_s_d(CPUMIPSState *env,
2389 uint32_t wd, uint32_t ws, uint32_t wt)
2390 {
2391 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2392 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2393 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2394
2395 pwd->d[0] = msa_dpadd_s_df(DF_DOUBLE, pwd->d[0], pws->d[0], pwt->d[0]);
2396 pwd->d[1] = msa_dpadd_s_df(DF_DOUBLE, pwd->d[1], pws->d[1], pwt->d[1]);
2397 }
2398
2399
2400 static inline int64_t msa_dpadd_u_df(uint32_t df, int64_t dest, int64_t arg1,
2401 int64_t arg2)
2402 {
2403 int64_t even_arg1;
2404 int64_t even_arg2;
2405 int64_t odd_arg1;
2406 int64_t odd_arg2;
2407 UNSIGNED_EXTRACT(even_arg1, odd_arg1, arg1, df);
2408 UNSIGNED_EXTRACT(even_arg2, odd_arg2, arg2, df);
2409 return dest + (even_arg1 * even_arg2) + (odd_arg1 * odd_arg2);
2410 }
2411
2412 void helper_msa_dpadd_u_h(CPUMIPSState *env,
2413 uint32_t wd, uint32_t ws, uint32_t wt)
2414 {
2415 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2416 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2417 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2418
2419 pwd->h[0] = msa_dpadd_u_df(DF_HALF, pwd->h[0], pws->h[0], pwt->h[0]);
2420 pwd->h[1] = msa_dpadd_u_df(DF_HALF, pwd->h[1], pws->h[1], pwt->h[1]);
2421 pwd->h[2] = msa_dpadd_u_df(DF_HALF, pwd->h[2], pws->h[2], pwt->h[2]);
2422 pwd->h[3] = msa_dpadd_u_df(DF_HALF, pwd->h[3], pws->h[3], pwt->h[3]);
2423 pwd->h[4] = msa_dpadd_u_df(DF_HALF, pwd->h[4], pws->h[4], pwt->h[4]);
2424 pwd->h[5] = msa_dpadd_u_df(DF_HALF, pwd->h[5], pws->h[5], pwt->h[5]);
2425 pwd->h[6] = msa_dpadd_u_df(DF_HALF, pwd->h[6], pws->h[6], pwt->h[6]);
2426 pwd->h[7] = msa_dpadd_u_df(DF_HALF, pwd->h[7], pws->h[7], pwt->h[7]);
2427 }
2428
2429 void helper_msa_dpadd_u_w(CPUMIPSState *env,
2430 uint32_t wd, uint32_t ws, uint32_t wt)
2431 {
2432 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2433 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2434 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2435
2436 pwd->w[0] = msa_dpadd_u_df(DF_WORD, pwd->w[0], pws->w[0], pwt->w[0]);
2437 pwd->w[1] = msa_dpadd_u_df(DF_WORD, pwd->w[1], pws->w[1], pwt->w[1]);
2438 pwd->w[2] = msa_dpadd_u_df(DF_WORD, pwd->w[2], pws->w[2], pwt->w[2]);
2439 pwd->w[3] = msa_dpadd_u_df(DF_WORD, pwd->w[3], pws->w[3], pwt->w[3]);
2440 }
2441
2442 void helper_msa_dpadd_u_d(CPUMIPSState *env,
2443 uint32_t wd, uint32_t ws, uint32_t wt)
2444 {
2445 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2446 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2447 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2448
2449 pwd->d[0] = msa_dpadd_u_df(DF_DOUBLE, pwd->d[0], pws->d[0], pwt->d[0]);
2450 pwd->d[1] = msa_dpadd_u_df(DF_DOUBLE, pwd->d[1], pws->d[1], pwt->d[1]);
2451 }
2452
2453
2454 static inline int64_t msa_dpsub_s_df(uint32_t df, int64_t dest, int64_t arg1,
2455 int64_t arg2)
2456 {
2457 int64_t even_arg1;
2458 int64_t even_arg2;
2459 int64_t odd_arg1;
2460 int64_t odd_arg2;
2461 SIGNED_EXTRACT(even_arg1, odd_arg1, arg1, df);
2462 SIGNED_EXTRACT(even_arg2, odd_arg2, arg2, df);
2463 return dest - ((even_arg1 * even_arg2) + (odd_arg1 * odd_arg2));
2464 }
2465
2466 void helper_msa_dpsub_s_h(CPUMIPSState *env,
2467 uint32_t wd, uint32_t ws, uint32_t wt)
2468 {
2469 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2470 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2471 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2472
2473 pwd->h[0] = msa_dpsub_s_df(DF_HALF, pwd->h[0], pws->h[0], pwt->h[0]);
2474 pwd->h[1] = msa_dpsub_s_df(DF_HALF, pwd->h[1], pws->h[1], pwt->h[1]);
2475 pwd->h[2] = msa_dpsub_s_df(DF_HALF, pwd->h[2], pws->h[2], pwt->h[2]);
2476 pwd->h[3] = msa_dpsub_s_df(DF_HALF, pwd->h[3], pws->h[3], pwt->h[3]);
2477 pwd->h[4] = msa_dpsub_s_df(DF_HALF, pwd->h[4], pws->h[4], pwt->h[4]);
2478 pwd->h[5] = msa_dpsub_s_df(DF_HALF, pwd->h[5], pws->h[5], pwt->h[5]);
2479 pwd->h[6] = msa_dpsub_s_df(DF_HALF, pwd->h[6], pws->h[6], pwt->h[6]);
2480 pwd->h[7] = msa_dpsub_s_df(DF_HALF, pwd->h[7], pws->h[7], pwt->h[7]);
2481 }
2482
2483 void helper_msa_dpsub_s_w(CPUMIPSState *env,
2484 uint32_t wd, uint32_t ws, uint32_t wt)
2485 {
2486 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2487 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2488 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2489
2490 pwd->w[0] = msa_dpsub_s_df(DF_WORD, pwd->w[0], pws->w[0], pwt->w[0]);
2491 pwd->w[1] = msa_dpsub_s_df(DF_WORD, pwd->w[1], pws->w[1], pwt->w[1]);
2492 pwd->w[2] = msa_dpsub_s_df(DF_WORD, pwd->w[2], pws->w[2], pwt->w[2]);
2493 pwd->w[3] = msa_dpsub_s_df(DF_WORD, pwd->w[3], pws->w[3], pwt->w[3]);
2494 }
2495
2496 void helper_msa_dpsub_s_d(CPUMIPSState *env,
2497 uint32_t wd, uint32_t ws, uint32_t wt)
2498 {
2499 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2500 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2501 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2502
2503 pwd->d[0] = msa_dpsub_s_df(DF_DOUBLE, pwd->d[0], pws->d[0], pwt->d[0]);
2504 pwd->d[1] = msa_dpsub_s_df(DF_DOUBLE, pwd->d[1], pws->d[1], pwt->d[1]);
2505 }
2506
2507
2508 static inline int64_t msa_dpsub_u_df(uint32_t df, int64_t dest, int64_t arg1,
2509 int64_t arg2)
2510 {
2511 int64_t even_arg1;
2512 int64_t even_arg2;
2513 int64_t odd_arg1;
2514 int64_t odd_arg2;
2515 UNSIGNED_EXTRACT(even_arg1, odd_arg1, arg1, df);
2516 UNSIGNED_EXTRACT(even_arg2, odd_arg2, arg2, df);
2517 return dest - ((even_arg1 * even_arg2) + (odd_arg1 * odd_arg2));
2518 }
2519
2520 void helper_msa_dpsub_u_h(CPUMIPSState *env,
2521 uint32_t wd, uint32_t ws, uint32_t wt)
2522 {
2523 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2524 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2525 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2526
2527 pwd->h[0] = msa_dpsub_u_df(DF_HALF, pwd->h[0], pws->h[0], pwt->h[0]);
2528 pwd->h[1] = msa_dpsub_u_df(DF_HALF, pwd->h[1], pws->h[1], pwt->h[1]);
2529 pwd->h[2] = msa_dpsub_u_df(DF_HALF, pwd->h[2], pws->h[2], pwt->h[2]);
2530 pwd->h[3] = msa_dpsub_u_df(DF_HALF, pwd->h[3], pws->h[3], pwt->h[3]);
2531 pwd->h[4] = msa_dpsub_u_df(DF_HALF, pwd->h[4], pws->h[4], pwt->h[4]);
2532 pwd->h[5] = msa_dpsub_u_df(DF_HALF, pwd->h[5], pws->h[5], pwt->h[5]);
2533 pwd->h[6] = msa_dpsub_u_df(DF_HALF, pwd->h[6], pws->h[6], pwt->h[6]);
2534 pwd->h[7] = msa_dpsub_u_df(DF_HALF, pwd->h[7], pws->h[7], pwt->h[7]);
2535 }
2536
2537 void helper_msa_dpsub_u_w(CPUMIPSState *env,
2538 uint32_t wd, uint32_t ws, uint32_t wt)
2539 {
2540 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2541 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2542 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2543
2544 pwd->w[0] = msa_dpsub_u_df(DF_WORD, pwd->w[0], pws->w[0], pwt->w[0]);
2545 pwd->w[1] = msa_dpsub_u_df(DF_WORD, pwd->w[1], pws->w[1], pwt->w[1]);
2546 pwd->w[2] = msa_dpsub_u_df(DF_WORD, pwd->w[2], pws->w[2], pwt->w[2]);
2547 pwd->w[3] = msa_dpsub_u_df(DF_WORD, pwd->w[3], pws->w[3], pwt->w[3]);
2548 }
2549
2550 void helper_msa_dpsub_u_d(CPUMIPSState *env,
2551 uint32_t wd, uint32_t ws, uint32_t wt)
2552 {
2553 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2554 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2555 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2556
2557 pwd->d[0] = msa_dpsub_u_df(DF_DOUBLE, pwd->d[0], pws->d[0], pwt->d[0]);
2558 pwd->d[1] = msa_dpsub_u_df(DF_DOUBLE, pwd->d[1], pws->d[1], pwt->d[1]);
2559 }
2560
2561
2562 /*
2563 * Int Max Min
2564 * -----------
2565 *
2566 * +---------------+----------------------------------------------------------+
2567 * | MAX_A.B | Vector Maximum Based on Absolute Value (byte) |
2568 * | MAX_A.H | Vector Maximum Based on Absolute Value (halfword) |
2569 * | MAX_A.W | Vector Maximum Based on Absolute Value (word) |
2570 * | MAX_A.D | Vector Maximum Based on Absolute Value (doubleword) |
2571 * | MAX_S.B | Vector Signed Maximum (byte) |
2572 * | MAX_S.H | Vector Signed Maximum (halfword) |
2573 * | MAX_S.W | Vector Signed Maximum (word) |
2574 * | MAX_S.D | Vector Signed Maximum (doubleword) |
2575 * | MAX_U.B | Vector Unsigned Maximum (byte) |
2576 * | MAX_U.H | Vector Unsigned Maximum (halfword) |
2577 * | MAX_U.W | Vector Unsigned Maximum (word) |
2578 * | MAX_U.D | Vector Unsigned Maximum (doubleword) |
2579 * | MIN_A.B | Vector Minimum Based on Absolute Value (byte) |
2580 * | MIN_A.H | Vector Minimum Based on Absolute Value (halfword) |
2581 * | MIN_A.W | Vector Minimum Based on Absolute Value (word) |
2582 * | MIN_A.D | Vector Minimum Based on Absolute Value (doubleword) |
2583 * | MIN_S.B | Vector Signed Minimum (byte) |
2584 * | MIN_S.H | Vector Signed Minimum (halfword) |
2585 * | MIN_S.W | Vector Signed Minimum (word) |
2586 * | MIN_S.D | Vector Signed Minimum (doubleword) |
2587 * | MIN_U.B | Vector Unsigned Minimum (byte) |
2588 * | MIN_U.H | Vector Unsigned Minimum (halfword) |
2589 * | MIN_U.W | Vector Unsigned Minimum (word) |
2590 * | MIN_U.D | Vector Unsigned Minimum (doubleword) |
2591 * +---------------+----------------------------------------------------------+
2592 */
2593
2594 static inline int64_t msa_max_a_df(uint32_t df, int64_t arg1, int64_t arg2)
2595 {
2596 uint64_t abs_arg1 = arg1 >= 0 ? arg1 : -arg1;
2597 uint64_t abs_arg2 = arg2 >= 0 ? arg2 : -arg2;
2598 return abs_arg1 > abs_arg2 ? arg1 : arg2;
2599 }
2600
2601 void helper_msa_max_a_b(CPUMIPSState *env,
2602 uint32_t wd, uint32_t ws, uint32_t wt)
2603 {
2604 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2605 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2606 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2607
2608 pwd->b[0] = msa_max_a_df(DF_BYTE, pws->b[0], pwt->b[0]);
2609 pwd->b[1] = msa_max_a_df(DF_BYTE, pws->b[1], pwt->b[1]);
2610 pwd->b[2] = msa_max_a_df(DF_BYTE, pws->b[2], pwt->b[2]);
2611 pwd->b[3] = msa_max_a_df(DF_BYTE, pws->b[3], pwt->b[3]);
2612 pwd->b[4] = msa_max_a_df(DF_BYTE, pws->b[4], pwt->b[4]);
2613 pwd->b[5] = msa_max_a_df(DF_BYTE, pws->b[5], pwt->b[5]);
2614 pwd->b[6] = msa_max_a_df(DF_BYTE, pws->b[6], pwt->b[6]);
2615 pwd->b[7] = msa_max_a_df(DF_BYTE, pws->b[7], pwt->b[7]);
2616 pwd->b[8] = msa_max_a_df(DF_BYTE, pws->b[8], pwt->b[8]);
2617 pwd->b[9] = msa_max_a_df(DF_BYTE, pws->b[9], pwt->b[9]);
2618 pwd->b[10] = msa_max_a_df(DF_BYTE, pws->b[10], pwt->b[10]);
2619 pwd->b[11] = msa_max_a_df(DF_BYTE, pws->b[11], pwt->b[11]);
2620 pwd->b[12] = msa_max_a_df(DF_BYTE, pws->b[12], pwt->b[12]);
2621 pwd->b[13] = msa_max_a_df(DF_BYTE, pws->b[13], pwt->b[13]);
2622 pwd->b[14] = msa_max_a_df(DF_BYTE, pws->b[14], pwt->b[14]);
2623 pwd->b[15] = msa_max_a_df(DF_BYTE, pws->b[15], pwt->b[15]);
2624 }
2625
2626 void helper_msa_max_a_h(CPUMIPSState *env,
2627 uint32_t wd, uint32_t ws, uint32_t wt)
2628 {
2629 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2630 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2631 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2632
2633 pwd->h[0] = msa_max_a_df(DF_HALF, pws->h[0], pwt->h[0]);
2634 pwd->h[1] = msa_max_a_df(DF_HALF, pws->h[1], pwt->h[1]);
2635 pwd->h[2] = msa_max_a_df(DF_HALF, pws->h[2], pwt->h[2]);
2636 pwd->h[3] = msa_max_a_df(DF_HALF, pws->h[3], pwt->h[3]);
2637 pwd->h[4] = msa_max_a_df(DF_HALF, pws->h[4], pwt->h[4]);
2638 pwd->h[5] = msa_max_a_df(DF_HALF, pws->h[5], pwt->h[5]);
2639 pwd->h[6] = msa_max_a_df(DF_HALF, pws->h[6], pwt->h[6]);
2640 pwd->h[7] = msa_max_a_df(DF_HALF, pws->h[7], pwt->h[7]);
2641 }
2642
2643 void helper_msa_max_a_w(CPUMIPSState *env,
2644 uint32_t wd, uint32_t ws, uint32_t wt)
2645 {
2646 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2647 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2648 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2649
2650 pwd->w[0] = msa_max_a_df(DF_WORD, pws->w[0], pwt->w[0]);
2651 pwd->w[1] = msa_max_a_df(DF_WORD, pws->w[1], pwt->w[1]);
2652 pwd->w[2] = msa_max_a_df(DF_WORD, pws->w[2], pwt->w[2]);
2653 pwd->w[3] = msa_max_a_df(DF_WORD, pws->w[3], pwt->w[3]);
2654 }
2655
2656 void helper_msa_max_a_d(CPUMIPSState *env,
2657 uint32_t wd, uint32_t ws, uint32_t wt)
2658 {
2659 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2660 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2661 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2662
2663 pwd->d[0] = msa_max_a_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
2664 pwd->d[1] = msa_max_a_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
2665 }
2666
2667
2668 static inline int64_t msa_max_s_df(uint32_t df, int64_t arg1, int64_t arg2)
2669 {
2670 return arg1 > arg2 ? arg1 : arg2;
2671 }
2672
2673 void helper_msa_max_s_b(CPUMIPSState *env,
2674 uint32_t wd, uint32_t ws, uint32_t wt)
2675 {
2676 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2677 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2678 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2679
2680 pwd->b[0] = msa_max_s_df(DF_BYTE, pws->b[0], pwt->b[0]);
2681 pwd->b[1] = msa_max_s_df(DF_BYTE, pws->b[1], pwt->b[1]);
2682 pwd->b[2] = msa_max_s_df(DF_BYTE, pws->b[2], pwt->b[2]);
2683 pwd->b[3] = msa_max_s_df(DF_BYTE, pws->b[3], pwt->b[3]);
2684 pwd->b[4] = msa_max_s_df(DF_BYTE, pws->b[4], pwt->b[4]);
2685 pwd->b[5] = msa_max_s_df(DF_BYTE, pws->b[5], pwt->b[5]);
2686 pwd->b[6] = msa_max_s_df(DF_BYTE, pws->b[6], pwt->b[6]);
2687 pwd->b[7] = msa_max_s_df(DF_BYTE, pws->b[7], pwt->b[7]);
2688 pwd->b[8] = msa_max_s_df(DF_BYTE, pws->b[8], pwt->b[8]);
2689 pwd->b[9] = msa_max_s_df(DF_BYTE, pws->b[9], pwt->b[9]);
2690 pwd->b[10] = msa_max_s_df(DF_BYTE, pws->b[10], pwt->b[10]);
2691 pwd->b[11] = msa_max_s_df(DF_BYTE, pws->b[11], pwt->b[11]);
2692 pwd->b[12] = msa_max_s_df(DF_BYTE, pws->b[12], pwt->b[12]);
2693 pwd->b[13] = msa_max_s_df(DF_BYTE, pws->b[13], pwt->b[13]);
2694 pwd->b[14] = msa_max_s_df(DF_BYTE, pws->b[14], pwt->b[14]);
2695 pwd->b[15] = msa_max_s_df(DF_BYTE, pws->b[15], pwt->b[15]);
2696 }
2697
2698 void helper_msa_max_s_h(CPUMIPSState *env,
2699 uint32_t wd, uint32_t ws, uint32_t wt)
2700 {
2701 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2702 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2703 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2704
2705 pwd->h[0] = msa_max_s_df(DF_HALF, pws->h[0], pwt->h[0]);
2706 pwd->h[1] = msa_max_s_df(DF_HALF, pws->h[1], pwt->h[1]);
2707 pwd->h[2] = msa_max_s_df(DF_HALF, pws->h[2], pwt->h[2]);
2708 pwd->h[3] = msa_max_s_df(DF_HALF, pws->h[3], pwt->h[3]);
2709 pwd->h[4] = msa_max_s_df(DF_HALF, pws->h[4], pwt->h[4]);
2710 pwd->h[5] = msa_max_s_df(DF_HALF, pws->h[5], pwt->h[5]);
2711 pwd->h[6] = msa_max_s_df(DF_HALF, pws->h[6], pwt->h[6]);
2712 pwd->h[7] = msa_max_s_df(DF_HALF, pws->h[7], pwt->h[7]);
2713 }
2714
2715 void helper_msa_max_s_w(CPUMIPSState *env,
2716 uint32_t wd, uint32_t ws, uint32_t wt)
2717 {
2718 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2719 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2720 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2721
2722 pwd->w[0] = msa_max_s_df(DF_WORD, pws->w[0], pwt->w[0]);
2723 pwd->w[1] = msa_max_s_df(DF_WORD, pws->w[1], pwt->w[1]);
2724 pwd->w[2] = msa_max_s_df(DF_WORD, pws->w[2], pwt->w[2]);
2725 pwd->w[3] = msa_max_s_df(DF_WORD, pws->w[3], pwt->w[3]);
2726 }
2727
2728 void helper_msa_max_s_d(CPUMIPSState *env,
2729 uint32_t wd, uint32_t ws, uint32_t wt)
2730 {
2731 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2732 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2733 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2734
2735 pwd->d[0] = msa_max_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
2736 pwd->d[1] = msa_max_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
2737 }
2738
2739
2740 static inline int64_t msa_max_u_df(uint32_t df, int64_t arg1, int64_t arg2)
2741 {
2742 uint64_t u_arg1 = UNSIGNED(arg1, df);
2743 uint64_t u_arg2 = UNSIGNED(arg2, df);
2744 return u_arg1 > u_arg2 ? arg1 : arg2;
2745 }
2746
2747 void helper_msa_max_u_b(CPUMIPSState *env,
2748 uint32_t wd, uint32_t ws, uint32_t wt)
2749 {
2750 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2751 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2752 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2753
2754 pwd->b[0] = msa_max_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
2755 pwd->b[1] = msa_max_u_df(DF_BYTE, pws->b[1], pwt->b[1]);
2756 pwd->b[2] = msa_max_u_df(DF_BYTE, pws->b[2], pwt->b[2]);
2757 pwd->b[3] = msa_max_u_df(DF_BYTE, pws->b[3], pwt->b[3]);
2758 pwd->b[4] = msa_max_u_df(DF_BYTE, pws->b[4], pwt->b[4]);
2759 pwd->b[5] = msa_max_u_df(DF_BYTE, pws->b[5], pwt->b[5]);
2760 pwd->b[6] = msa_max_u_df(DF_BYTE, pws->b[6], pwt->b[6]);
2761 pwd->b[7] = msa_max_u_df(DF_BYTE, pws->b[7], pwt->b[7]);
2762 pwd->b[8] = msa_max_u_df(DF_BYTE, pws->b[8], pwt->b[8]);
2763 pwd->b[9] = msa_max_u_df(DF_BYTE, pws->b[9], pwt->b[9]);
2764 pwd->b[10] = msa_max_u_df(DF_BYTE, pws->b[10], pwt->b[10]);
2765 pwd->b[11] = msa_max_u_df(DF_BYTE, pws->b[11], pwt->b[11]);
2766 pwd->b[12] = msa_max_u_df(DF_BYTE, pws->b[12], pwt->b[12]);
2767 pwd->b[13] = msa_max_u_df(DF_BYTE, pws->b[13], pwt->b[13]);
2768 pwd->b[14] = msa_max_u_df(DF_BYTE, pws->b[14], pwt->b[14]);
2769 pwd->b[15] = msa_max_u_df(DF_BYTE, pws->b[15], pwt->b[15]);
2770 }
2771
2772 void helper_msa_max_u_h(CPUMIPSState *env,
2773 uint32_t wd, uint32_t ws, uint32_t wt)
2774 {
2775 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2776 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2777 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2778
2779 pwd->h[0] = msa_max_u_df(DF_HALF, pws->h[0], pwt->h[0]);
2780 pwd->h[1] = msa_max_u_df(DF_HALF, pws->h[1], pwt->h[1]);
2781 pwd->h[2] = msa_max_u_df(DF_HALF, pws->h[2], pwt->h[2]);
2782 pwd->h[3] = msa_max_u_df(DF_HALF, pws->h[3], pwt->h[3]);
2783 pwd->h[4] = msa_max_u_df(DF_HALF, pws->h[4], pwt->h[4]);
2784 pwd->h[5] = msa_max_u_df(DF_HALF, pws->h[5], pwt->h[5]);
2785 pwd->h[6] = msa_max_u_df(DF_HALF, pws->h[6], pwt->h[6]);
2786 pwd->h[7] = msa_max_u_df(DF_HALF, pws->h[7], pwt->h[7]);
2787 }
2788
2789 void helper_msa_max_u_w(CPUMIPSState *env,
2790 uint32_t wd, uint32_t ws, uint32_t wt)
2791 {
2792 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2793 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2794 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2795
2796 pwd->w[0] = msa_max_u_df(DF_WORD, pws->w[0], pwt->w[0]);
2797 pwd->w[1] = msa_max_u_df(DF_WORD, pws->w[1], pwt->w[1]);
2798 pwd->w[2] = msa_max_u_df(DF_WORD, pws->w[2], pwt->w[2]);
2799 pwd->w[3] = msa_max_u_df(DF_WORD, pws->w[3], pwt->w[3]);
2800 }
2801
2802 void helper_msa_max_u_d(CPUMIPSState *env,
2803 uint32_t wd, uint32_t ws, uint32_t wt)
2804 {
2805 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2806 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2807 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2808
2809 pwd->d[0] = msa_max_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
2810 pwd->d[1] = msa_max_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
2811 }
2812
2813
2814 static inline int64_t msa_min_a_df(uint32_t df, int64_t arg1, int64_t arg2)
2815 {
2816 uint64_t abs_arg1 = arg1 >= 0 ? arg1 : -arg1;
2817 uint64_t abs_arg2 = arg2 >= 0 ? arg2 : -arg2;
2818 return abs_arg1 < abs_arg2 ? arg1 : arg2;
2819 }
2820
2821 void helper_msa_min_a_b(CPUMIPSState *env,
2822 uint32_t wd, uint32_t ws, uint32_t wt)
2823 {
2824 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2825 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2826 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2827
2828 pwd->b[0] = msa_min_a_df(DF_BYTE, pws->b[0], pwt->b[0]);
2829 pwd->b[1] = msa_min_a_df(DF_BYTE, pws->b[1], pwt->b[1]);
2830 pwd->b[2] = msa_min_a_df(DF_BYTE, pws->b[2], pwt->b[2]);
2831 pwd->b[3] = msa_min_a_df(DF_BYTE, pws->b[3], pwt->b[3]);
2832 pwd->b[4] = msa_min_a_df(DF_BYTE, pws->b[4], pwt->b[4]);
2833 pwd->b[5] = msa_min_a_df(DF_BYTE, pws->b[5], pwt->b[5]);
2834 pwd->b[6] = msa_min_a_df(DF_BYTE, pws->b[6], pwt->b[6]);
2835 pwd->b[7] = msa_min_a_df(DF_BYTE, pws->b[7], pwt->b[7]);
2836 pwd->b[8] = msa_min_a_df(DF_BYTE, pws->b[8], pwt->b[8]);
2837 pwd->b[9] = msa_min_a_df(DF_BYTE, pws->b[9], pwt->b[9]);
2838 pwd->b[10] = msa_min_a_df(DF_BYTE, pws->b[10], pwt->b[10]);
2839 pwd->b[11] = msa_min_a_df(DF_BYTE, pws->b[11], pwt->b[11]);
2840 pwd->b[12] = msa_min_a_df(DF_BYTE, pws->b[12], pwt->b[12]);
2841 pwd->b[13] = msa_min_a_df(DF_BYTE, pws->b[13], pwt->b[13]);
2842 pwd->b[14] = msa_min_a_df(DF_BYTE, pws->b[14], pwt->b[14]);
2843 pwd->b[15] = msa_min_a_df(DF_BYTE, pws->b[15], pwt->b[15]);
2844 }
2845
2846 void helper_msa_min_a_h(CPUMIPSState *env,
2847 uint32_t wd, uint32_t ws, uint32_t wt)
2848 {
2849 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2850 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2851 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2852
2853 pwd->h[0] = msa_min_a_df(DF_HALF, pws->h[0], pwt->h[0]);
2854 pwd->h[1] = msa_min_a_df(DF_HALF, pws->h[1], pwt->h[1]);
2855 pwd->h[2] = msa_min_a_df(DF_HALF, pws->h[2], pwt->h[2]);
2856 pwd->h[3] = msa_min_a_df(DF_HALF, pws->h[3], pwt->h[3]);
2857 pwd->h[4] = msa_min_a_df(DF_HALF, pws->h[4], pwt->h[4]);
2858 pwd->h[5] = msa_min_a_df(DF_HALF, pws->h[5], pwt->h[5]);
2859 pwd->h[6] = msa_min_a_df(DF_HALF, pws->h[6], pwt->h[6]);
2860 pwd->h[7] = msa_min_a_df(DF_HALF, pws->h[7], pwt->h[7]);
2861 }
2862
2863 void helper_msa_min_a_w(CPUMIPSState *env,
2864 uint32_t wd, uint32_t ws, uint32_t wt)
2865 {
2866 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2867 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2868 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2869
2870 pwd->w[0] = msa_min_a_df(DF_WORD, pws->w[0], pwt->w[0]);
2871 pwd->w[1] = msa_min_a_df(DF_WORD, pws->w[1], pwt->w[1]);
2872 pwd->w[2] = msa_min_a_df(DF_WORD, pws->w[2], pwt->w[2]);
2873 pwd->w[3] = msa_min_a_df(DF_WORD, pws->w[3], pwt->w[3]);
2874 }
2875
2876 void helper_msa_min_a_d(CPUMIPSState *env,
2877 uint32_t wd, uint32_t ws, uint32_t wt)
2878 {
2879 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2880 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2881 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2882
2883 pwd->d[0] = msa_min_a_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
2884 pwd->d[1] = msa_min_a_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
2885 }
2886
2887
2888 static inline int64_t msa_min_s_df(uint32_t df, int64_t arg1, int64_t arg2)
2889 {
2890 return arg1 < arg2 ? arg1 : arg2;
2891 }
2892
2893 void helper_msa_min_s_b(CPUMIPSState *env,
2894 uint32_t wd, uint32_t ws, uint32_t wt)
2895 {
2896 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2897 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2898 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2899
2900 pwd->b[0] = msa_min_s_df(DF_BYTE, pws->b[0], pwt->b[0]);
2901 pwd->b[1] = msa_min_s_df(DF_BYTE, pws->b[1], pwt->b[1]);
2902 pwd->b[2] = msa_min_s_df(DF_BYTE, pws->b[2], pwt->b[2]);
2903 pwd->b[3] = msa_min_s_df(DF_BYTE, pws->b[3], pwt->b[3]);
2904 pwd->b[4] = msa_min_s_df(DF_BYTE, pws->b[4], pwt->b[4]);
2905 pwd->b[5] = msa_min_s_df(DF_BYTE, pws->b[5], pwt->b[5]);
2906 pwd->b[6] = msa_min_s_df(DF_BYTE, pws->b[6], pwt->b[6]);
2907 pwd->b[7] = msa_min_s_df(DF_BYTE, pws->b[7], pwt->b[7]);
2908 pwd->b[8] = msa_min_s_df(DF_BYTE, pws->b[8], pwt->b[8]);
2909 pwd->b[9] = msa_min_s_df(DF_BYTE, pws->b[9], pwt->b[9]);
2910 pwd->b[10] = msa_min_s_df(DF_BYTE, pws->b[10], pwt->b[10]);
2911 pwd->b[11] = msa_min_s_df(DF_BYTE, pws->b[11], pwt->b[11]);
2912 pwd->b[12] = msa_min_s_df(DF_BYTE, pws->b[12], pwt->b[12]);
2913 pwd->b[13] = msa_min_s_df(DF_BYTE, pws->b[13], pwt->b[13]);
2914 pwd->b[14] = msa_min_s_df(DF_BYTE, pws->b[14], pwt->b[14]);
2915 pwd->b[15] = msa_min_s_df(DF_BYTE, pws->b[15], pwt->b[15]);
2916 }
2917
2918 void helper_msa_min_s_h(CPUMIPSState *env,
2919 uint32_t wd, uint32_t ws, uint32_t wt)
2920 {
2921 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2922 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2923 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2924
2925 pwd->h[0] = msa_min_s_df(DF_HALF, pws->h[0], pwt->h[0]);
2926 pwd->h[1] = msa_min_s_df(DF_HALF, pws->h[1], pwt->h[1]);
2927 pwd->h[2] = msa_min_s_df(DF_HALF, pws->h[2], pwt->h[2]);
2928 pwd->h[3] = msa_min_s_df(DF_HALF, pws->h[3], pwt->h[3]);
2929 pwd->h[4] = msa_min_s_df(DF_HALF, pws->h[4], pwt->h[4]);
2930 pwd->h[5] = msa_min_s_df(DF_HALF, pws->h[5], pwt->h[5]);
2931 pwd->h[6] = msa_min_s_df(DF_HALF, pws->h[6], pwt->h[6]);
2932 pwd->h[7] = msa_min_s_df(DF_HALF, pws->h[7], pwt->h[7]);
2933 }
2934
2935 void helper_msa_min_s_w(CPUMIPSState *env,
2936 uint32_t wd, uint32_t ws, uint32_t wt)
2937 {
2938 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2939 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2940 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2941
2942 pwd->w[0] = msa_min_s_df(DF_WORD, pws->w[0], pwt->w[0]);
2943 pwd->w[1] = msa_min_s_df(DF_WORD, pws->w[1], pwt->w[1]);
2944 pwd->w[2] = msa_min_s_df(DF_WORD, pws->w[2], pwt->w[2]);
2945 pwd->w[3] = msa_min_s_df(DF_WORD, pws->w[3], pwt->w[3]);
2946 }
2947
2948 void helper_msa_min_s_d(CPUMIPSState *env,
2949 uint32_t wd, uint32_t ws, uint32_t wt)
2950 {
2951 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2952 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2953 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2954
2955 pwd->d[0] = msa_min_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
2956 pwd->d[1] = msa_min_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
2957 }
2958
2959
2960 static inline int64_t msa_min_u_df(uint32_t df, int64_t arg1, int64_t arg2)
2961 {
2962 uint64_t u_arg1 = UNSIGNED(arg1, df);
2963 uint64_t u_arg2 = UNSIGNED(arg2, df);
2964 return u_arg1 < u_arg2 ? arg1 : arg2;
2965 }
2966
2967 void helper_msa_min_u_b(CPUMIPSState *env,
2968 uint32_t wd, uint32_t ws, uint32_t wt)
2969 {
2970 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2971 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2972 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2973
2974 pwd->b[0] = msa_min_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
2975 pwd->b[1] = msa_min_u_df(DF_BYTE, pws->b[1], pwt->b[1]);
2976 pwd->b[2] = msa_min_u_df(DF_BYTE, pws->b[2], pwt->b[2]);
2977 pwd->b[3] = msa_min_u_df(DF_BYTE, pws->b[3], pwt->b[3]);
2978 pwd->b[4] = msa_min_u_df(DF_BYTE, pws->b[4], pwt->b[4]);
2979 pwd->b[5] = msa_min_u_df(DF_BYTE, pws->b[5], pwt->b[5]);
2980 pwd->b[6] = msa_min_u_df(DF_BYTE, pws->b[6], pwt->b[6]);
2981 pwd->b[7] = msa_min_u_df(DF_BYTE, pws->b[7], pwt->b[7]);
2982 pwd->b[8] = msa_min_u_df(DF_BYTE, pws->b[8], pwt->b[8]);
2983 pwd->b[9] = msa_min_u_df(DF_BYTE, pws->b[9], pwt->b[9]);
2984 pwd->b[10] = msa_min_u_df(DF_BYTE, pws->b[10], pwt->b[10]);
2985 pwd->b[11] = msa_min_u_df(DF_BYTE, pws->b[11], pwt->b[11]);
2986 pwd->b[12] = msa_min_u_df(DF_BYTE, pws->b[12], pwt->b[12]);
2987 pwd->b[13] = msa_min_u_df(DF_BYTE, pws->b[13], pwt->b[13]);
2988 pwd->b[14] = msa_min_u_df(DF_BYTE, pws->b[14], pwt->b[14]);
2989 pwd->b[15] = msa_min_u_df(DF_BYTE, pws->b[15], pwt->b[15]);
2990 }
2991
2992 void helper_msa_min_u_h(CPUMIPSState *env,
2993 uint32_t wd, uint32_t ws, uint32_t wt)
2994 {
2995 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2996 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2997 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2998
2999 pwd->h[0] = msa_min_u_df(DF_HALF, pws->h[0], pwt->h[0]);
3000 pwd->h[1] = msa_min_u_df(DF_HALF, pws->h[1], pwt->h[1]);
3001 pwd->h[2] = msa_min_u_df(DF_HALF, pws->h[2], pwt->h[2]);
3002 pwd->h[3] = msa_min_u_df(DF_HALF, pws->h[3], pwt->h[3]);
3003 pwd->h[4] = msa_min_u_df(DF_HALF, pws->h[4], pwt->h[4]);
3004 pwd->h[5] = msa_min_u_df(DF_HALF, pws->h[5], pwt->h[5]);
3005 pwd->h[6] = msa_min_u_df(DF_HALF, pws->h[6], pwt->h[6]);
3006 pwd->h[7] = msa_min_u_df(DF_HALF, pws->h[7], pwt->h[7]);
3007 }
3008
3009 void helper_msa_min_u_w(CPUMIPSState *env,
3010 uint32_t wd, uint32_t ws, uint32_t wt)
3011 {
3012 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3013 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3014 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3015
3016 pwd->w[0] = msa_min_u_df(DF_WORD, pws->w[0], pwt->w[0]);
3017 pwd->w[1] = msa_min_u_df(DF_WORD, pws->w[1], pwt->w[1]);
3018 pwd->w[2] = msa_min_u_df(DF_WORD, pws->w[2], pwt->w[2]);
3019 pwd->w[3] = msa_min_u_df(DF_WORD, pws->w[3], pwt->w[3]);
3020 }
3021
3022 void helper_msa_min_u_d(CPUMIPSState *env,
3023 uint32_t wd, uint32_t ws, uint32_t wt)
3024 {
3025 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3026 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3027 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3028
3029 pwd->d[0] = msa_min_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
3030 pwd->d[1] = msa_min_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
3031 }
3032
3033
3034 /*
3035 * Int Modulo
3036 * ----------
3037 *
3038 * +---------------+----------------------------------------------------------+
3039 * | MOD_S.B | Vector Signed Modulo (byte) |
3040 * | MOD_S.H | Vector Signed Modulo (halfword) |
3041 * | MOD_S.W | Vector Signed Modulo (word) |
3042 * | MOD_S.D | Vector Signed Modulo (doubleword) |
3043 * | MOD_U.B | Vector Unsigned Modulo (byte) |
3044 * | MOD_U.H | Vector Unsigned Modulo (halfword) |
3045 * | MOD_U.W | Vector Unsigned Modulo (word) |
3046 * | MOD_U.D | Vector Unsigned Modulo (doubleword) |
3047 * +---------------+----------------------------------------------------------+
3048 */
3049
3050 static inline int64_t msa_mod_s_df(uint32_t df, int64_t arg1, int64_t arg2)
3051 {
3052 if (arg1 == DF_MIN_INT(df) && arg2 == -1) {
3053 return 0;
3054 }
3055 return arg2 ? arg1 % arg2 : arg1;
3056 }
3057
3058 void helper_msa_mod_s_b(CPUMIPSState *env,
3059 uint32_t wd, uint32_t ws, uint32_t wt)
3060 {
3061 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3062 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3063 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3064
3065 pwd->b[0] = msa_mod_s_df(DF_BYTE, pws->b[0], pwt->b[0]);
3066 pwd->b[1] = msa_mod_s_df(DF_BYTE, pws->b[1], pwt->b[1]);
3067 pwd->b[2] = msa_mod_s_df(DF_BYTE, pws->b[2], pwt->b[2]);
3068 pwd->b[3] = msa_mod_s_df(DF_BYTE, pws->b[3], pwt->b[3]);
3069 pwd->b[4] = msa_mod_s_df(DF_BYTE, pws->b[4], pwt->b[4]);
3070 pwd->b[5] = msa_mod_s_df(DF_BYTE, pws->b[5], pwt->b[5]);
3071 pwd->b[6] = msa_mod_s_df(DF_BYTE, pws->b[6], pwt->b[6]);
3072 pwd->b[7] = msa_mod_s_df(DF_BYTE, pws->b[7], pwt->b[7]);
3073 pwd->b[8] = msa_mod_s_df(DF_BYTE, pws->b[8], pwt->b[8]);
3074 pwd->b[9] = msa_mod_s_df(DF_BYTE, pws->b[9], pwt->b[9]);
3075 pwd->b[10] = msa_mod_s_df(DF_BYTE, pws->b[10], pwt->b[10]);
3076 pwd->b[11] = msa_mod_s_df(DF_BYTE, pws->b[11], pwt->b[11]);
3077 pwd->b[12] = msa_mod_s_df(DF_BYTE, pws->b[12], pwt->b[12]);
3078 pwd->b[13] = msa_mod_s_df(DF_BYTE, pws->b[13], pwt->b[13]);
3079 pwd->b[14] = msa_mod_s_df(DF_BYTE, pws->b[14], pwt->b[14]);
3080 pwd->b[15] = msa_mod_s_df(DF_BYTE, pws->b[15], pwt->b[15]);
3081 }
3082
3083 void helper_msa_mod_s_h(CPUMIPSState *env,
3084 uint32_t wd, uint32_t ws, uint32_t wt)
3085 {
3086 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3087 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3088 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3089
3090 pwd->h[0] = msa_mod_s_df(DF_HALF, pws->h[0], pwt->h[0]);
3091 pwd->h[1] = msa_mod_s_df(DF_HALF, pws->h[1], pwt->h[1]);
3092 pwd->h[2] = msa_mod_s_df(DF_HALF, pws->h[2], pwt->h[2]);
3093 pwd->h[3] = msa_mod_s_df(DF_HALF, pws->h[3], pwt->h[3]);
3094 pwd->h[4] = msa_mod_s_df(DF_HALF, pws->h[4], pwt->h[4]);
3095 pwd->h[5] = msa_mod_s_df(DF_HALF, pws->h[5], pwt->h[5]);
3096 pwd->h[6] = msa_mod_s_df(DF_HALF, pws->h[6], pwt->h[6]);
3097 pwd->h[7] = msa_mod_s_df(DF_HALF, pws->h[7], pwt->h[7]);
3098 }
3099
3100 void helper_msa_mod_s_w(CPUMIPSState *env,
3101 uint32_t wd, uint32_t ws, uint32_t wt)
3102 {
3103 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3104 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3105 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3106
3107 pwd->w[0] = msa_mod_s_df(DF_WORD, pws->w[0], pwt->w[0]);
3108 pwd->w[1] = msa_mod_s_df(DF_WORD, pws->w[1], pwt->w[1]);
3109 pwd->w[2] = msa_mod_s_df(DF_WORD, pws->w[2], pwt->w[2]);
3110 pwd->w[3] = msa_mod_s_df(DF_WORD, pws->w[3], pwt->w[3]);
3111 }
3112
3113 void helper_msa_mod_s_d(CPUMIPSState *env,
3114 uint32_t wd, uint32_t ws, uint32_t wt)
3115 {
3116 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3117 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3118 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3119
3120 pwd->d[0] = msa_mod_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
3121 pwd->d[1] = msa_mod_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
3122 }
3123
3124 static inline int64_t msa_mod_u_df(uint32_t df, int64_t arg1, int64_t arg2)
3125 {
3126 uint64_t u_arg1 = UNSIGNED(arg1, df);
3127 uint64_t u_arg2 = UNSIGNED(arg2, df);
3128 return u_arg2 ? u_arg1 % u_arg2 : u_arg1;
3129 }
3130
3131 void helper_msa_mod_u_b(CPUMIPSState *env,
3132 uint32_t wd, uint32_t ws, uint32_t wt)
3133 {
3134 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3135 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3136 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3137
3138 pwd->b[0] = msa_mod_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
3139 pwd->b[1] = msa_mod_u_df(DF_BYTE, pws->b[1], pwt->b[1]);
3140 pwd->b[2] = msa_mod_u_df(DF_BYTE, pws->b[2], pwt->b[2]);
3141 pwd->b[3] = msa_mod_u_df(DF_BYTE, pws->b[3], pwt->b[3]);
3142 pwd->b[4] = msa_mod_u_df(DF_BYTE, pws->b[4], pwt->b[4]);
3143 pwd->b[5] = msa_mod_u_df(DF_BYTE, pws->b[5], pwt->b[5]);
3144 pwd->b[6] = msa_mod_u_df(DF_BYTE, pws->b[6], pwt->b[6]);
3145 pwd->b[7] = msa_mod_u_df(DF_BYTE, pws->b[7], pwt->b[7]);
3146 pwd->b[8] = msa_mod_u_df(DF_BYTE, pws->b[8], pwt->b[8]);
3147 pwd->b[9] = msa_mod_u_df(DF_BYTE, pws->b[9], pwt->b[9]);
3148 pwd->b[10] = msa_mod_u_df(DF_BYTE, pws->b[10], pwt->b[10]);
3149 pwd->b[11] = msa_mod_u_df(DF_BYTE, pws->b[11], pwt->b[11]);
3150 pwd->b[12] = msa_mod_u_df(DF_BYTE, pws->b[12], pwt->b[12]);
3151 pwd->b[13] = msa_mod_u_df(DF_BYTE, pws->b[13], pwt->b[13]);
3152 pwd->b[14] = msa_mod_u_df(DF_BYTE, pws->b[14], pwt->b[14]);
3153 pwd->b[15] = msa_mod_u_df(DF_BYTE, pws->b[15], pwt->b[15]);
3154 }
3155
3156 void helper_msa_mod_u_h(CPUMIPSState *env,
3157 uint32_t wd, uint32_t ws, uint32_t wt)
3158 {
3159 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3160 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3161 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3162
3163 pwd->h[0] = msa_mod_u_df(DF_HALF, pws->h[0], pwt->h[0]);
3164 pwd->h[1] = msa_mod_u_df(DF_HALF, pws->h[1], pwt->h[1]);
3165 pwd->h[2] = msa_mod_u_df(DF_HALF, pws->h[2], pwt->h[2]);
3166 pwd->h[3] = msa_mod_u_df(DF_HALF, pws->h[3], pwt->h[3]);
3167 pwd->h[4] = msa_mod_u_df(DF_HALF, pws->h[4], pwt->h[4]);
3168 pwd->h[5] = msa_mod_u_df(DF_HALF, pws->h[5], pwt->h[5]);
3169 pwd->h[6] = msa_mod_u_df(DF_HALF, pws->h[6], pwt->h[6]);
3170 pwd->h[7] = msa_mod_u_df(DF_HALF, pws->h[7], pwt->h[7]);
3171 }
3172
3173 void helper_msa_mod_u_w(CPUMIPSState *env,
3174 uint32_t wd, uint32_t ws, uint32_t wt)
3175 {
3176 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3177 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3178 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3179
3180 pwd->w[0] = msa_mod_u_df(DF_WORD, pws->w[0], pwt->w[0]);
3181 pwd->w[1] = msa_mod_u_df(DF_WORD, pws->w[1], pwt->w[1]);
3182 pwd->w[2] = msa_mod_u_df(DF_WORD, pws->w[2], pwt->w[2]);
3183 pwd->w[3] = msa_mod_u_df(DF_WORD, pws->w[3], pwt->w[3]);
3184 }
3185
3186 void helper_msa_mod_u_d(CPUMIPSState *env,
3187 uint32_t wd, uint32_t ws, uint32_t wt)
3188 {
3189 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3190 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3191 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3192
3193 pwd->d[0] = msa_mod_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
3194 pwd->d[1] = msa_mod_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
3195 }
3196
3197
3198 /*
3199 * Int Multiply
3200 * ------------
3201 *
3202 * +---------------+----------------------------------------------------------+
3203 * | MADDV.B | Vector Multiply and Add (byte) |
3204 * | MADDV.H | Vector Multiply and Add (halfword) |
3205 * | MADDV.W | Vector Multiply and Add (word) |
3206 * | MADDV.D | Vector Multiply and Add (doubleword) |
3207 * | MSUBV.B | Vector Multiply and Subtract (byte) |
3208 * | MSUBV.H | Vector Multiply and Subtract (halfword) |
3209 * | MSUBV.W | Vector Multiply and Subtract (word) |
3210 * | MSUBV.D | Vector Multiply and Subtract (doubleword) |
3211 * | MULV.B | Vector Multiply (byte) |
3212 * | MULV.H | Vector Multiply (halfword) |
3213 * | MULV.W | Vector Multiply (word) |
3214 * | MULV.D | Vector Multiply (doubleword) |
3215 * +---------------+----------------------------------------------------------+
3216 */
3217
3218 static inline int64_t msa_maddv_df(uint32_t df, int64_t dest, int64_t arg1,
3219 int64_t arg2)
3220 {
3221 return dest + arg1 * arg2;
3222 }
3223
3224 void helper_msa_maddv_b(CPUMIPSState *env,
3225 uint32_t wd, uint32_t ws, uint32_t wt)
3226 {
3227 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3228 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3229 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3230
3231 pwd->b[0] = msa_maddv_df(DF_BYTE, pwt->b[0], pws->b[0], pwt->b[0]);
3232 pwd->b[1] = msa_maddv_df(DF_BYTE, pwt->b[1], pws->b[1], pwt->b[1]);
3233 pwd->b[2] = msa_maddv_df(DF_BYTE, pwt->b[2], pws->b[2], pwt->b[2]);
3234 pwd->b[3] = msa_maddv_df(DF_BYTE, pwt->b[3], pws->b[3], pwt->b[3]);
3235 pwd->b[4] = msa_maddv_df(DF_BYTE, pwt->b[4], pws->b[4], pwt->b[4]);
3236 pwd->b[5] = msa_maddv_df(DF_BYTE, pwt->b[5], pws->b[5], pwt->b[5]);
3237 pwd->b[6] = msa_maddv_df(DF_BYTE, pwt->b[6], pws->b[6], pwt->b[6]);
3238 pwd->b[7] = msa_maddv_df(DF_BYTE, pwt->b[7], pws->b[7], pwt->b[7]);
3239 pwd->b[8] = msa_maddv_df(DF_BYTE, pwt->b[8], pws->b[8], pwt->b[8]);
3240 pwd->b[9] = msa_maddv_df(DF_BYTE, pwt->b[9], pws->b[9], pwt->b[9]);
3241 pwd->b[10] = msa_maddv_df(DF_BYTE, pwt->b[10], pws->b[10], pwt->b[10]);
3242 pwd->b[11] = msa_maddv_df(DF_BYTE, pwt->b[11], pws->b[11], pwt->b[11]);
3243 pwd->b[12] = msa_maddv_df(DF_BYTE, pwt->b[12], pws->b[12], pwt->b[12]);
3244 pwd->b[13] = msa_maddv_df(DF_BYTE, pwt->b[13], pws->b[13], pwt->b[13]);
3245 pwd->b[14] = msa_maddv_df(DF_BYTE, pwt->b[14], pws->b[14], pwt->b[14]);
3246 pwd->b[15] = msa_maddv_df(DF_BYTE, pwt->b[15], pws->b[15], pwt->b[15]);
3247 }
3248
3249 void helper_msa_maddv_h(CPUMIPSState *env,
3250 uint32_t wd, uint32_t ws, uint32_t wt)
3251 {
3252 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3253 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3254 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3255
3256 pwd->h[0] = msa_maddv_df(DF_HALF, pwd->h[0], pws->h[0], pwt->h[0]);
3257 pwd->h[1] = msa_maddv_df(DF_HALF, pwd->h[1], pws->h[1], pwt->h[1]);
3258 pwd->h[2] = msa_maddv_df(DF_HALF, pwd->h[2], pws->h[2], pwt->h[2]);
3259 pwd->h[3] = msa_maddv_df(DF_HALF, pwd->h[3], pws->h[3], pwt->h[3]);
3260 pwd->h[4] = msa_maddv_df(DF_HALF, pwd->h[4], pws->h[4], pwt->h[4]);
3261 pwd->h[5] = msa_maddv_df(DF_HALF, pwd->h[5], pws->h[5], pwt->h[5]);
3262 pwd->h[6] = msa_maddv_df(DF_HALF, pwd->h[6], pws->h[6], pwt->h[6]);
3263 pwd->h[7] = msa_maddv_df(DF_HALF, pwd->h[7], pws->h[7], pwt->h[7]);
3264 }
3265
3266 void helper_msa_maddv_w(CPUMIPSState *env,
3267 uint32_t wd, uint32_t ws, uint32_t wt)
3268 {
3269 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3270 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3271 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3272
3273 pwd->w[0] = msa_maddv_df(DF_WORD, pwd->w[0], pws->w[0], pwt->w[0]);
3274 pwd->w[1] = msa_maddv_df(DF_WORD, pwd->w[1], pws->w[1], pwt->w[1]);
3275 pwd->w[2] = msa_maddv_df(DF_WORD, pwd->w[2], pws->w[2], pwt->w[2]);
3276 pwd->w[3] = msa_maddv_df(DF_WORD, pwd->w[3], pws->w[3], pwt->w[3]);
3277 }
3278
3279 void helper_msa_maddv_d(CPUMIPSState *env,
3280 uint32_t wd, uint32_t ws, uint32_t wt)
3281 {
3282 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3283 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3284 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3285
3286 pwd->d[0] = msa_maddv_df(DF_DOUBLE, pwd->d[0], pws->d[0], pwt->d[0]);
3287 pwd->d[1] = msa_maddv_df(DF_DOUBLE, pwd->d[1], pws->d[1], pwt->d[1]);
3288 }
3289
3290 static inline int64_t msa_msubv_df(uint32_t df, int64_t dest, int64_t arg1,
3291 int64_t arg2)
3292 {
3293 return dest - arg1 * arg2;
3294 }
3295
3296 void helper_msa_msubv_b(CPUMIPSState *env,
3297 uint32_t wd, uint32_t ws, uint32_t wt)
3298 {
3299 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3300 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3301 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3302
3303 pwd->b[0] = msa_msubv_df(DF_BYTE, pwt->b[0], pws->b[0], pwt->b[0]);
3304 pwd->b[1] = msa_msubv_df(DF_BYTE, pwt->b[1], pws->b[1], pwt->b[1]);
3305 pwd->b[2] = msa_msubv_df(DF_BYTE, pwt->b[2], pws->b[2], pwt->b[2]);
3306 pwd->b[3] = msa_msubv_df(DF_BYTE, pwt->b[3], pws->b[3], pwt->b[3]);
3307 pwd->b[4] = msa_msubv_df(DF_BYTE, pwt->b[4], pws->b[4], pwt->b[4]);
3308 pwd->b[5] = msa_msubv_df(DF_BYTE, pwt->b[5], pws->b[5], pwt->b[5]);
3309 pwd->b[6] = msa_msubv_df(DF_BYTE, pwt->b[6], pws->b[6], pwt->b[6]);
3310 pwd->b[7] = msa_msubv_df(DF_BYTE, pwt->b[7], pws->b[7], pwt->b[7]);
3311 pwd->b[8] = msa_msubv_df(DF_BYTE, pwt->b[8], pws->b[8], pwt->b[8]);
3312 pwd->b[9] = msa_msubv_df(DF_BYTE, pwt->b[9], pws->b[9], pwt->b[9]);
3313 pwd->b[10] = msa_msubv_df(DF_BYTE, pwt->b[10], pws->b[10], pwt->b[10]);
3314 pwd->b[11] = msa_msubv_df(DF_BYTE, pwt->b[11], pws->b[11], pwt->b[11]);
3315 pwd->b[12] = msa_msubv_df(DF_BYTE, pwt->b[12], pws->b[12], pwt->b[12]);
3316 pwd->b[13] = msa_msubv_df(DF_BYTE, pwt->b[13], pws->b[13], pwt->b[13]);
3317 pwd->b[14] = msa_msubv_df(DF_BYTE, pwt->b[14], pws->b[14], pwt->b[14]);
3318 pwd->b[15] = msa_msubv_df(DF_BYTE, pwt->b[15], pws->b[15], pwt->b[15]);
3319 }
3320
3321 void helper_msa_msubv_h(CPUMIPSState *env,
3322 uint32_t wd, uint32_t ws, uint32_t wt)
3323 {
3324 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3325 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3326 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3327
3328 pwd->h[0] = msa_msubv_df(DF_HALF, pwd->h[0], pws->h[0], pwt->h[0]);
3329 pwd->h[1] = msa_msubv_df(DF_HALF, pwd->h[1], pws->h[1], pwt->h[1]);
3330 pwd->h[2] = msa_msubv_df(DF_HALF, pwd->h[2], pws->h[2], pwt->h[2]);
3331 pwd->h[3] = msa_msubv_df(DF_HALF, pwd->h[3], pws->h[3], pwt->h[3]);
3332 pwd->h[4] = msa_msubv_df(DF_HALF, pwd->h[4], pws->h[4], pwt->h[4]);
3333 pwd->h[5] = msa_msubv_df(DF_HALF, pwd->h[5], pws->h[5], pwt->h[5]);
3334 pwd->h[6] = msa_msubv_df(DF_HALF, pwd->h[6], pws->h[6], pwt->h[6]);
3335 pwd->h[7] = msa_msubv_df(DF_HALF, pwd->h[7], pws->h[7], pwt->h[7]);
3336 }
3337
3338 void helper_msa_msubv_w(CPUMIPSState *env,
3339 uint32_t wd, uint32_t ws, uint32_t wt)
3340 {
3341 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3342 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3343 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3344
3345 pwd->w[0] = msa_msubv_df(DF_WORD, pwd->w[0], pws->w[0], pwt->w[0]);
3346 pwd->w[1] = msa_msubv_df(DF_WORD, pwd->w[1], pws->w[1], pwt->w[1]);
3347 pwd->w[2] = msa_msubv_df(DF_WORD, pwd->w[2], pws->w[2], pwt->w[2]);
3348 pwd->w[3] = msa_msubv_df(DF_WORD, pwd->w[3], pws->w[3], pwt->w[3]);
3349 }
3350
3351 void helper_msa_msubv_d(CPUMIPSState *env,
3352 uint32_t wd, uint32_t ws, uint32_t wt)
3353 {
3354 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3355 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3356 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3357
3358 pwd->d[0] = msa_msubv_df(DF_DOUBLE, pwd->d[0], pws->d[0], pwt->d[0]);
3359 pwd->d[1] = msa_msubv_df(DF_DOUBLE, pwd->d[1], pws->d[1], pwt->d[1]);
3360 }
3361
3362
3363 static inline int64_t msa_mulv_df(uint32_t df, int64_t arg1, int64_t arg2)
3364 {
3365 return arg1 * arg2;
3366 }
3367
3368 void helper_msa_mulv_b(CPUMIPSState *env,
3369 uint32_t wd, uint32_t ws, uint32_t wt)
3370 {
3371 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3372 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3373 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3374
3375 pwd->b[0] = msa_mulv_df(DF_BYTE, pws->b[0], pwt->b[0]);
3376 pwd->b[1] = msa_mulv_df(DF_BYTE, pws->b[1], pwt->b[1]);
3377 pwd->b[2] = msa_mulv_df(DF_BYTE, pws->b[2], pwt->b[2]);
3378 pwd->b[3] = msa_mulv_df(DF_BYTE, pws->b[3], pwt->b[3]);
3379 pwd->b[4] = msa_mulv_df(DF_BYTE, pws->b[4], pwt->b[4]);
3380 pwd->b[5] = msa_mulv_df(DF_BYTE, pws->b[5], pwt->b[5]);
3381 pwd->b[6] = msa_mulv_df(DF_BYTE, pws->b[6], pwt->b[6]);
3382 pwd->b[7] = msa_mulv_df(DF_BYTE, pws->b[7], pwt->b[7]);
3383 pwd->b[8] = msa_mulv_df(DF_BYTE, pws->b[8], pwt->b[8]);
3384 pwd->b[9] = msa_mulv_df(DF_BYTE, pws->b[9], pwt->b[9]);
3385 pwd->b[10] = msa_mulv_df(DF_BYTE, pws->b[10], pwt->b[10]);
3386 pwd->b[11] = msa_mulv_df(DF_BYTE, pws->b[11], pwt->b[11]);
3387 pwd->b[12] = msa_mulv_df(DF_BYTE, pws->b[12], pwt->b[12]);
3388 pwd->b[13] = msa_mulv_df(DF_BYTE, pws->b[13], pwt->b[13]);
3389 pwd->b[14] = msa_mulv_df(DF_BYTE, pws->b[14], pwt->b[14]);
3390 pwd->b[15] = msa_mulv_df(DF_BYTE, pws->b[15], pwt->b[15]);
3391 }
3392
3393 void helper_msa_mulv_h(CPUMIPSState *env,
3394 uint32_t wd, uint32_t ws, uint32_t wt)
3395 {
3396 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3397 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3398 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3399
3400 pwd->h[0] = msa_mulv_df(DF_HALF, pws->h[0], pwt->h[0]);
3401 pwd->h[1] = msa_mulv_df(DF_HALF, pws->h[1], pwt->h[1]);
3402 pwd->h[2] = msa_mulv_df(DF_HALF, pws->h[2], pwt->h[2]);
3403 pwd->h[3] = msa_mulv_df(DF_HALF, pws->h[3], pwt->h[3]);
3404 pwd->h[4] = msa_mulv_df(DF_HALF, pws->h[4], pwt->h[4]);
3405 pwd->h[5] = msa_mulv_df(DF_HALF, pws->h[5], pwt->h[5]);
3406 pwd->h[6] = msa_mulv_df(DF_HALF, pws->h[6], pwt->h[6]);
3407 pwd->h[7] = msa_mulv_df(DF_HALF, pws->h[7], pwt->h[7]);
3408 }
3409
3410 void helper_msa_mulv_w(CPUMIPSState *env,
3411 uint32_t wd, uint32_t ws, uint32_t wt)
3412 {
3413 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3414 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3415 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3416
3417 pwd->w[0] = msa_mulv_df(DF_WORD, pws->w[0], pwt->w[0]);
3418 pwd->w[1] = msa_mulv_df(DF_WORD, pws->w[1], pwt->w[1]);
3419 pwd->w[2] = msa_mulv_df(DF_WORD, pws->w[2], pwt->w[2]);
3420 pwd->w[3] = msa_mulv_df(DF_WORD, pws->w[3], pwt->w[3]);
3421 }
3422
3423 void helper_msa_mulv_d(CPUMIPSState *env,
3424 uint32_t wd, uint32_t ws, uint32_t wt)
3425 {
3426 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3427 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3428 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3429
3430 pwd->d[0] = msa_mulv_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
3431 pwd->d[1] = msa_mulv_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
3432 }
3433
3434
3435 /*
3436 * Int Subtract
3437 * ------------
3438 *
3439 * +---------------+----------------------------------------------------------+
3440 * | ASUB_S.B | Vector Absolute Values of Signed Subtract (byte) |
3441 * | ASUB_S.H | Vector Absolute Values of Signed Subtract (halfword) |
3442 * | ASUB_S.W | Vector Absolute Values of Signed Subtract (word) |
3443 * | ASUB_S.D | Vector Absolute Values of Signed Subtract (doubleword) |
3444 * | ASUB_U.B | Vector Absolute Values of Unsigned Subtract (byte) |
3445 * | ASUB_U.H | Vector Absolute Values of Unsigned Subtract (halfword) |
3446 * | ASUB_U.W | Vector Absolute Values of Unsigned Subtract (word) |
3447 * | ASUB_U.D | Vector Absolute Values of Unsigned Subtract (doubleword) |
3448 * | HSUB_S.H | Vector Signed Horizontal Subtract (halfword) |
3449 * | HSUB_S.W | Vector Signed Horizontal Subtract (word) |
3450 * | HSUB_S.D | Vector Signed Horizontal Subtract (doubleword) |
3451 * | HSUB_U.H | Vector Unigned Horizontal Subtract (halfword) |
3452 * | HSUB_U.W | Vector Unigned Horizontal Subtract (word) |
3453 * | HSUB_U.D | Vector Unigned Horizontal Subtract (doubleword) |
3454 * | SUBS_S.B | Vector Signed Saturated Subtract (of Signed) (byte) |
3455 * | SUBS_S.H | Vector Signed Saturated Subtract (of Signed) (halfword) |
3456 * | SUBS_S.W | Vector Signed Saturated Subtract (of Signed) (word) |
3457 * | SUBS_S.D | Vector Signed Saturated Subtract (of Signed) (doubleword)|
3458 * | SUBS_U.B | Vector Unsigned Saturated Subtract (of Uns.) (byte) |
3459 * | SUBS_U.H | Vector Unsigned Saturated Subtract (of Uns.) (halfword) |
3460 * | SUBS_U.W | Vector Unsigned Saturated Subtract (of Uns.) (word) |
3461 * | SUBS_U.D | Vector Unsigned Saturated Subtract (of Uns.) (doubleword)|
3462 * | SUBSUS_U.B | Vector Uns. Sat. Subtract (of S. from Uns.) (byte) |
3463 * | SUBSUS_U.H | Vector Uns. Sat. Subtract (of S. from Uns.) (halfword) |
3464 * | SUBSUS_U.W | Vector Uns. Sat. Subtract (of S. from Uns.) (word) |
3465 * | SUBSUS_U.D | Vector Uns. Sat. Subtract (of S. from Uns.) (doubleword) |
3466 * | SUBSUU_S.B | Vector Signed Saturated Subtract (of Uns.) (byte) |
3467 * | SUBSUU_S.H | Vector Signed Saturated Subtract (of Uns.) (halfword) |
3468 * | SUBSUU_S.W | Vector Signed Saturated Subtract (of Uns.) (word) |
3469 * | SUBSUU_S.D | Vector Signed Saturated Subtract (of Uns.) (doubleword) |
3470 * | SUBV.B | Vector Subtract (byte) |
3471 * | SUBV.H | Vector Subtract (halfword) |
3472 * | SUBV.W | Vector Subtract (word) |
3473 * | SUBV.D | Vector Subtract (doubleword) |
3474 * +---------------+----------------------------------------------------------+
3475 */
3476
3477
3478 static inline int64_t msa_asub_s_df(uint32_t df, int64_t arg1, int64_t arg2)
3479 {
3480 /* signed compare */
3481 return (arg1 < arg2) ?
3482 (uint64_t)(arg2 - arg1) : (uint64_t)(arg1 - arg2);
3483 }
3484
3485 void helper_msa_asub_s_b(CPUMIPSState *env,
3486 uint32_t wd, uint32_t ws, uint32_t wt)
3487 {
3488 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3489 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3490 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3491
3492 pwd->b[0] = msa_asub_s_df(DF_BYTE, pws->b[0], pwt->b[0]);
3493 pwd->b[1] = msa_asub_s_df(DF_BYTE, pws->b[1], pwt->b[1]);
3494 pwd->b[2] = msa_asub_s_df(DF_BYTE, pws->b[2], pwt->b[2]);
3495 pwd->b[3] = msa_asub_s_df(DF_BYTE, pws->b[3], pwt->b[3]);
3496 pwd->b[4] = msa_asub_s_df(DF_BYTE, pws->b[4], pwt->b[4]);
3497 pwd->b[5] = msa_asub_s_df(DF_BYTE, pws->b[5], pwt->b[5]);
3498 pwd->b[6] = msa_asub_s_df(DF_BYTE, pws->b[6], pwt->b[6]);
3499 pwd->b[7] = msa_asub_s_df(DF_BYTE, pws->b[7], pwt->b[7]);
3500 pwd->b[8] = msa_asub_s_df(DF_BYTE, pws->b[8], pwt->b[8]);
3501 pwd->b[9] = msa_asub_s_df(DF_BYTE, pws->b[9], pwt->b[9]);
3502 pwd->b[10] = msa_asub_s_df(DF_BYTE, pws->b[10], pwt->b[10]);
3503 pwd->b[11] = msa_asub_s_df(DF_BYTE, pws->b[11], pwt->b[11]);
3504 pwd->b[12] = msa_asub_s_df(DF_BYTE, pws->b[12], pwt->b[12]);
3505 pwd->b[13] = msa_asub_s_df(DF_BYTE, pws->b[13], pwt->b[13]);
3506 pwd->b[14] = msa_asub_s_df(DF_BYTE, pws->b[14], pwt->b[14]);
3507 pwd->b[15] = msa_asub_s_df(DF_BYTE, pws->b[15], pwt->b[15]);
3508 }
3509
3510 void helper_msa_asub_s_h(CPUMIPSState *env,
3511 uint32_t wd, uint32_t ws, uint32_t wt)
3512 {
3513 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3514 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3515 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3516
3517 pwd->h[0] = msa_asub_s_df(DF_HALF, pws->h[0], pwt->h[0]);
3518 pwd->h[1] = msa_asub_s_df(DF_HALF, pws->h[1], pwt->h[1]);
3519 pwd->h[2] = msa_asub_s_df(DF_HALF, pws->h[2], pwt->h[2]);
3520 pwd->h[3] = msa_asub_s_df(DF_HALF, pws->h[3], pwt->h[3]);
3521 pwd->h[4] = msa_asub_s_df(DF_HALF, pws->h[4], pwt->h[4]);
3522 pwd->h[5] = msa_asub_s_df(DF_HALF, pws->h[5], pwt->h[5]);
3523 pwd->h[6] = msa_asub_s_df(DF_HALF, pws->h[6], pwt->h[6]);
3524 pwd->h[7] = msa_asub_s_df(DF_HALF, pws->h[7], pwt->h[7]);
3525 }
3526
3527 void helper_msa_asub_s_w(CPUMIPSState *env,
3528 uint32_t wd, uint32_t ws, uint32_t wt)
3529 {
3530 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3531 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3532 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3533
3534 pwd->w[0] = msa_asub_s_df(DF_WORD, pws->w[0], pwt->w[0]);
3535 pwd->w[1] = msa_asub_s_df(DF_WORD, pws->w[1], pwt->w[1]);
3536 pwd->w[2] = msa_asub_s_df(DF_WORD, pws->w[2], pwt->w[2]);
3537 pwd->w[3] = msa_asub_s_df(DF_WORD, pws->w[3], pwt->w[3]);
3538 }
3539
3540 void helper_msa_asub_s_d(CPUMIPSState *env,
3541 uint32_t wd, uint32_t ws, uint32_t wt)
3542 {
3543 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3544 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3545 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3546
3547 pwd->d[0] = msa_asub_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
3548 pwd->d[1] = msa_asub_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
3549 }
3550
3551
3552 static inline uint64_t msa_asub_u_df(uint32_t df, uint64_t arg1, uint64_t arg2)
3553 {
3554 uint64_t u_arg1 = UNSIGNED(arg1, df);
3555 uint64_t u_arg2 = UNSIGNED(arg2, df);
3556 /* unsigned compare */
3557 return (u_arg1 < u_arg2) ?
3558 (uint64_t)(u_arg2 - u_arg1) : (uint64_t)(u_arg1 - u_arg2);
3559 }
3560
3561 void helper_msa_asub_u_b(CPUMIPSState *env,
3562 uint32_t wd, uint32_t ws, uint32_t wt)
3563 {
3564 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3565 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3566 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3567
3568 pwd->b[0] = msa_asub_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
3569 pwd->b[1] = msa_asub_u_df(DF_BYTE, pws->b[1], pwt->b[1]);
3570 pwd->b[2] = msa_asub_u_df(DF_BYTE, pws->b[2], pwt->b[2]);
3571 pwd->b[3] = msa_asub_u_df(DF_BYTE, pws->b[3], pwt->b[3]);
3572 pwd->b[4] = msa_asub_u_df(DF_BYTE, pws->b[4], pwt->b[4]);
3573 pwd->b[5] = msa_asub_u_df(DF_BYTE, pws->b[5], pwt->b[5]);
3574 pwd->b[6] = msa_asub_u_df(DF_BYTE, pws->b[6], pwt->b[6]);
3575 pwd->b[7] = msa_asub_u_df(DF_BYTE, pws->b[7], pwt->b[7]);
3576 pwd->b[8] = msa_asub_u_df(DF_BYTE, pws->b[8], pwt->b[8]);
3577 pwd->b[9] = msa_asub_u_df(DF_BYTE, pws->b[9], pwt->b[9]);
3578 pwd->b[10] = msa_asub_u_df(DF_BYTE, pws->b[10], pwt->b[10]);
3579 pwd->b[11] = msa_asub_u_df(DF_BYTE, pws->b[11], pwt->b[11]);
3580 pwd->b[12] = msa_asub_u_df(DF_BYTE, pws->b[12], pwt->b[12]);
3581 pwd->b[13] = msa_asub_u_df(DF_BYTE, pws->b[13], pwt->b[13]);
3582 pwd->b[14] = msa_asub_u_df(DF_BYTE, pws->b[14], pwt->b[14]);
3583 pwd->b[15] = msa_asub_u_df(DF_BYTE, pws->b[15], pwt->b[15]);
3584 }
3585
3586 void helper_msa_asub_u_h(CPUMIPSState *env,
3587 uint32_t wd, uint32_t ws, uint32_t wt)
3588 {
3589 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3590 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3591 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3592
3593 pwd->h[0] = msa_asub_u_df(DF_HALF, pws->h[0], pwt->h[0]);
3594 pwd->h[1] = msa_asub_u_df(DF_HALF, pws->h[1], pwt->h[1]);
3595 pwd->h[2] = msa_asub_u_df(DF_HALF, pws->h[2], pwt->h[2]);
3596 pwd->h[3] = msa_asub_u_df(DF_HALF, pws->h[3], pwt->h[3]);
3597 pwd->h[4] = msa_asub_u_df(DF_HALF, pws->h[4], pwt->h[4]);
3598 pwd->h[5] = msa_asub_u_df(DF_HALF, pws->h[5], pwt->h[5]);
3599 pwd->h[6] = msa_asub_u_df(DF_HALF, pws->h[6], pwt->h[6]);
3600 pwd->h[7] = msa_asub_u_df(DF_HALF, pws->h[7], pwt->h[7]);
3601 }
3602
3603 void helper_msa_asub_u_w(CPUMIPSState *env,
3604 uint32_t wd, uint32_t ws, uint32_t wt)
3605 {
3606 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3607 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3608 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3609
3610 pwd->w[0] = msa_asub_u_df(DF_WORD, pws->w[0], pwt->w[0]);
3611 pwd->w[1] = msa_asub_u_df(DF_WORD, pws->w[1], pwt->w[1]);
3612 pwd->w[2] = msa_asub_u_df(DF_WORD, pws->w[2], pwt->w[2]);
3613 pwd->w[3] = msa_asub_u_df(DF_WORD, pws->w[3], pwt->w[3]);
3614 }
3615
3616 void helper_msa_asub_u_d(CPUMIPSState *env,
3617 uint32_t wd, uint32_t ws, uint32_t wt)
3618 {
3619 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3620 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3621 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3622
3623 pwd->d[0] = msa_asub_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
3624 pwd->d[1] = msa_asub_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
3625 }
3626
3627
3628 static inline int64_t msa_hsub_s_df(uint32_t df, int64_t arg1, int64_t arg2)
3629 {
3630 return SIGNED_ODD(arg1, df) - SIGNED_EVEN(arg2, df);
3631 }
3632
3633 void helper_msa_hsub_s_h(CPUMIPSState *env,
3634 uint32_t wd, uint32_t ws, uint32_t wt)
3635 {
3636 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3637 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3638 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3639
3640 pwd->h[0] = msa_hsub_s_df(DF_HALF, pws->h[0], pwt->h[0]);
3641 pwd->h[1] = msa_hsub_s_df(DF_HALF, pws->h[1], pwt->h[1]);
3642 pwd->h[2] = msa_hsub_s_df(DF_HALF, pws->h[2], pwt->h[2]);
3643 pwd->h[3] = msa_hsub_s_df(DF_HALF, pws->h[3], pwt->h[3]);
3644 pwd->h[4] = msa_hsub_s_df(DF_HALF, pws->h[4], pwt->h[4]);
3645 pwd->h[5] = msa_hsub_s_df(DF_HALF, pws->h[5], pwt->h[5]);
3646 pwd->h[6] = msa_hsub_s_df(DF_HALF, pws->h[6], pwt->h[6]);
3647 pwd->h[7] = msa_hsub_s_df(DF_HALF, pws->h[7], pwt->h[7]);
3648 }
3649
3650 void helper_msa_hsub_s_w(CPUMIPSState *env,
3651 uint32_t wd, uint32_t ws, uint32_t wt)
3652 {
3653 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3654 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3655 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3656
3657 pwd->w[0] = msa_hsub_s_df(DF_WORD, pws->w[0], pwt->w[0]);
3658 pwd->w[1] = msa_hsub_s_df(DF_WORD, pws->w[1], pwt->w[1]);
3659 pwd->w[2] = msa_hsub_s_df(DF_WORD, pws->w[2], pwt->w[2]);
3660 pwd->w[3] = msa_hsub_s_df(DF_WORD, pws->w[3], pwt->w[3]);
3661 }
3662
3663 void helper_msa_hsub_s_d(CPUMIPSState *env,
3664 uint32_t wd, uint32_t ws, uint32_t wt)
3665 {
3666 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3667 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3668 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3669
3670 pwd->d[0] = msa_hsub_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
3671 pwd->d[1] = msa_hsub_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
3672 }
3673
3674
3675 static inline int64_t msa_hsub_u_df(uint32_t df, int64_t arg1, int64_t arg2)
3676 {
3677 return UNSIGNED_ODD(arg1, df) - UNSIGNED_EVEN(arg2, df);
3678 }
3679
3680 void helper_msa_hsub_u_h(CPUMIPSState *env,
3681 uint32_t wd, uint32_t ws, uint32_t wt)
3682 {
3683 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3684 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3685 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3686
3687 pwd->h[0] = msa_hsub_u_df(DF_HALF, pws->h[0], pwt->h[0]);
3688 pwd->h[1] = msa_hsub_u_df(DF_HALF, pws->h[1], pwt->h[1]);
3689 pwd->h[2] = msa_hsub_u_df(DF_HALF, pws->h[2], pwt->h[2]);
3690 pwd->h[3] = msa_hsub_u_df(DF_HALF, pws->h[3], pwt->h[3]);
3691 pwd->h[4] = msa_hsub_u_df(DF_HALF, pws->h[4], pwt->h[4]);
3692 pwd->h[5] = msa_hsub_u_df(DF_HALF, pws->h[5], pwt->h[5]);
3693 pwd->h[6] = msa_hsub_u_df(DF_HALF, pws->h[6], pwt->h[6]);
3694 pwd->h[7] = msa_hsub_u_df(DF_HALF, pws->h[7], pwt->h[7]);
3695 }
3696
3697 void helper_msa_hsub_u_w(CPUMIPSState *env,
3698 uint32_t wd, uint32_t ws, uint32_t wt)
3699 {
3700 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3701 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3702 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3703
3704 pwd->w[0] = msa_hsub_u_df(DF_WORD, pws->w[0], pwt->w[0]);
3705 pwd->w[1] = msa_hsub_u_df(DF_WORD, pws->w[1], pwt->w[1]);
3706 pwd->w[2] = msa_hsub_u_df(DF_WORD, pws->w[2], pwt->w[2]);
3707 pwd->w[3] = msa_hsub_u_df(DF_WORD, pws->w[3], pwt->w[3]);
3708 }
3709
3710 void helper_msa_hsub_u_d(CPUMIPSState *env,
3711 uint32_t wd, uint32_t ws, uint32_t wt)
3712 {
3713 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3714 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3715 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3716
3717 pwd->d[0] = msa_hsub_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
3718 pwd->d[1] = msa_hsub_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
3719 }
3720
3721
3722 static inline int64_t msa_subs_s_df(uint32_t df, int64_t arg1, int64_t arg2)
3723 {
3724 int64_t max_int = DF_MAX_INT(df);
3725 int64_t min_int = DF_MIN_INT(df);
3726 if (arg2 > 0) {
3727 return (min_int + arg2 < arg1) ? arg1 - arg2 : min_int;
3728 } else {
3729 return (arg1 < max_int + arg2) ? arg1 - arg2 : max_int;
3730 }
3731 }
3732
3733 void helper_msa_subs_s_b(CPUMIPSState *env,
3734 uint32_t wd, uint32_t ws, uint32_t wt)
3735 {
3736 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3737 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3738 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3739
3740 pwd->b[0] = msa_subs_s_df(DF_BYTE, pws->b[0], pwt->b[0]);
3741 pwd->b[1] = msa_subs_s_df(DF_BYTE, pws->b[1], pwt->b[1]);
3742 pwd->b[2] = msa_subs_s_df(DF_BYTE, pws->b[2], pwt->b[2]);
3743 pwd->b[3] = msa_subs_s_df(DF_BYTE, pws->b[3], pwt->b[3]);
3744 pwd->b[4] = msa_subs_s_df(DF_BYTE, pws->b[4], pwt->b[4]);
3745 pwd->b[5] = msa_subs_s_df(DF_BYTE, pws->b[5], pwt->b[5]);
3746 pwd->b[6] = msa_subs_s_df(DF_BYTE, pws->b[6], pwt->b[6]);
3747 pwd->b[7] = msa_subs_s_df(DF_BYTE, pws->b[7], pwt->b[7]);
3748 pwd->b[8] = msa_subs_s_df(DF_BYTE, pws->b[8], pwt->b[8]);
3749 pwd->b[9] = msa_subs_s_df(DF_BYTE, pws->b[9], pwt->b[9]);
3750 pwd->b[10] = msa_subs_s_df(DF_BYTE, pws->b[10], pwt->b[10]);
3751 pwd->b[11] = msa_subs_s_df(DF_BYTE, pws->b[11], pwt->b[11]);
3752 pwd->b[12] = msa_subs_s_df(DF_BYTE, pws->b[12], pwt->b[12]);
3753 pwd->b[13] = msa_subs_s_df(DF_BYTE, pws->b[13], pwt->b[13]);
3754 pwd->b[14] = msa_subs_s_df(DF_BYTE, pws->b[14], pwt->b[14]);
3755 pwd->b[15] = msa_subs_s_df(DF_BYTE, pws->b[15], pwt->b[15]);
3756 }
3757
3758 void helper_msa_subs_s_h(CPUMIPSState *env,
3759 uint32_t wd, uint32_t ws, uint32_t wt)
3760 {
3761 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3762 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3763 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3764
3765 pwd->h[0] = msa_subs_s_df(DF_HALF, pws->h[0], pwt->h[0]);
3766 pwd->h[1] = msa_subs_s_df(DF_HALF, pws->h[1], pwt->h[1]);
3767 pwd->h[2] = msa_subs_s_df(DF_HALF, pws->h[2], pwt->h[2]);
3768 pwd->h[3] = msa_subs_s_df(DF_HALF, pws->h[3], pwt->h[3]);
3769 pwd->h[4] = msa_subs_s_df(DF_HALF, pws->h[4], pwt->h[4]);
3770 pwd->h[5] = msa_subs_s_df(DF_HALF, pws->h[5], pwt->h[5]);
3771 pwd->h[6] = msa_subs_s_df(DF_HALF, pws->h[6], pwt->h[6]);
3772 pwd->h[7] = msa_subs_s_df(DF_HALF, pws->h[7], pwt->h[7]);
3773 }
3774
3775 void helper_msa_subs_s_w(CPUMIPSState *env,
3776 uint32_t wd, uint32_t ws, uint32_t wt)
3777 {
3778 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3779 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3780 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3781
3782 pwd->w[0] = msa_subs_s_df(DF_WORD, pws->w[0], pwt->w[0]);
3783 pwd->w[1] = msa_subs_s_df(DF_WORD, pws->w[1], pwt->w[1]);
3784 pwd->w[2] = msa_subs_s_df(DF_WORD, pws->w[2], pwt->w[2]);
3785 pwd->w[3] = msa_subs_s_df(DF_WORD, pws->w[3], pwt->w[3]);
3786 }
3787
3788 void helper_msa_subs_s_d(CPUMIPSState *env,
3789 uint32_t wd, uint32_t ws, uint32_t wt)
3790 {
3791 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3792 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3793 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3794
3795 pwd->d[0] = msa_subs_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
3796 pwd->d[1] = msa_subs_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
3797 }
3798
3799
3800 static inline int64_t msa_subs_u_df(uint32_t df, int64_t arg1, int64_t arg2)
3801 {
3802 uint64_t u_arg1 = UNSIGNED(arg1, df);
3803 uint64_t u_arg2 = UNSIGNED(arg2, df);
3804 return (u_arg1 > u_arg2) ? u_arg1 - u_arg2 : 0;
3805 }
3806
3807 void helper_msa_subs_u_b(CPUMIPSState *env,
3808 uint32_t wd, uint32_t ws, uint32_t wt)
3809 {
3810 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3811 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3812 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3813
3814 pwd->b[0] = msa_subs_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
3815 pwd->b[1] = msa_subs_u_df(DF_BYTE, pws->b[1], pwt->b[1]);
3816 pwd->b[2] = msa_subs_u_df(DF_BYTE, pws->b[2], pwt->b[2]);
3817 pwd->b[3] = msa_subs_u_df(DF_BYTE, pws->b[3], pwt->b[3]);
3818 pwd->b[4] = msa_subs_u_df(DF_BYTE, pws->b[4], pwt->b[4]);
3819 pwd->b[5] = msa_subs_u_df(DF_BYTE, pws->b[5], pwt->b[5]);
3820 pwd->b[6] = msa_subs_u_df(DF_BYTE, pws->b[6], pwt->b[6]);
3821 pwd->b[7] = msa_subs_u_df(DF_BYTE, pws->b[7], pwt->b[7]);
3822 pwd->b[8] = msa_subs_u_df(DF_BYTE, pws->b[8], pwt->b[8]);
3823 pwd->b[9] = msa_subs_u_df(DF_BYTE, pws->b[9], pwt->b[9]);
3824 pwd->b[10] = msa_subs_u_df(DF_BYTE, pws->b[10], pwt->b[10]);
3825 pwd->b[11] = msa_subs_u_df(DF_BYTE, pws->b[11], pwt->b[11]);
3826 pwd->b[12] = msa_subs_u_df(DF_BYTE, pws->b[12], pwt->b[12]);
3827 pwd->b[13] = msa_subs_u_df(DF_BYTE, pws->b[13], pwt->b[13]);
3828 pwd->b[14] = msa_subs_u_df(DF_BYTE, pws->b[14], pwt->b[14]);
3829 pwd->b[15] = msa_subs_u_df(DF_BYTE, pws->b[15], pwt->b[15]);
3830 }
3831
3832 void helper_msa_subs_u_h(CPUMIPSState *env,
3833 uint32_t wd, uint32_t ws, uint32_t wt)
3834 {
3835 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3836 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3837 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3838
3839 pwd->h[0] = msa_subs_u_df(DF_HALF, pws->h[0], pwt->h[0]);
3840 pwd->h[1] = msa_subs_u_df(DF_HALF, pws->h[1], pwt->h[1]);
3841 pwd->h[2] = msa_subs_u_df(DF_HALF, pws->h[2], pwt->h[2]);
3842 pwd->h[3] = msa_subs_u_df(DF_HALF, pws->h[3], pwt->h[3]);
3843 pwd->h[4] = msa_subs_u_df(DF_HALF, pws->h[4], pwt->h[4]);
3844 pwd->h[5] = msa_subs_u_df(DF_HALF, pws->h[5], pwt->h[5]);
3845 pwd->h[6] = msa_subs_u_df(DF_HALF, pws->h[6], pwt->h[6]);
3846 pwd->h[7] = msa_subs_u_df(DF_HALF, pws->h[7], pwt->h[7]);
3847 }
3848
3849 void helper_msa_subs_u_w(CPUMIPSState *env,
3850 uint32_t wd, uint32_t ws, uint32_t wt)
3851 {
3852 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3853 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3854 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3855
3856 pwd->w[0] = msa_subs_u_df(DF_WORD, pws->w[0], pwt->w[0]);
3857 pwd->w[1] = msa_subs_u_df(DF_WORD, pws->w[1], pwt->w[1]);
3858 pwd->w[2] = msa_subs_u_df(DF_WORD, pws->w[2], pwt->w[2]);
3859 pwd->w[3] = msa_subs_u_df(DF_WORD, pws->w[3], pwt->w[3]);
3860 }
3861
3862 void helper_msa_subs_u_d(CPUMIPSState *env,
3863 uint32_t wd, uint32_t ws, uint32_t wt)
3864 {
3865 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3866 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3867 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3868
3869 pwd->d[0] = msa_subs_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
3870 pwd->d[1] = msa_subs_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
3871 }
3872
3873
3874 static inline int64_t msa_subsus_u_df(uint32_t df, int64_t arg1, int64_t arg2)
3875 {
3876 uint64_t u_arg1 = UNSIGNED(arg1, df);
3877 uint64_t max_uint = DF_MAX_UINT(df);
3878 if (arg2 >= 0) {
3879 uint64_t u_arg2 = (uint64_t)arg2;
3880 return (u_arg1 > u_arg2) ?
3881 (int64_t)(u_arg1 - u_arg2) :
3882 0;
3883 } else {
3884 uint64_t u_arg2 = (uint64_t)(-arg2);
3885 return (u_arg1 < max_uint - u_arg2) ?
3886 (int64_t)(u_arg1 + u_arg2) :
3887 (int64_t)max_uint;
3888 }
3889 }
3890
3891 void helper_msa_subsus_u_b(CPUMIPSState *env,
3892 uint32_t wd, uint32_t ws, uint32_t wt)
3893 {
3894 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3895 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3896 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3897
3898 pwd->b[0] = msa_subsus_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
3899 pwd->b[1] = msa_subsus_u_df(DF_BYTE, pws->b[1], pwt->b[1]);
3900 pwd->b[2] = msa_subsus_u_df(DF_BYTE, pws->b[2], pwt->b[2]);
3901 pwd->b[3] = msa_subsus_u_df(DF_BYTE, pws->b[3], pwt->b[3]);
3902 pwd->b[4] = msa_subsus_u_df(DF_BYTE, pws->b[4], pwt->b[4]);
3903 pwd->b[5] = msa_subsus_u_df(DF_BYTE, pws->b[5], pwt->b[5]);
3904 pwd->b[6] = msa_subsus_u_df(DF_BYTE, pws->b[6], pwt->b[6]);
3905 pwd->b[7] = msa_subsus_u_df(DF_BYTE, pws->b[7], pwt->b[7]);
3906 pwd->b[8] = msa_subsus_u_df(DF_BYTE, pws->b[8], pwt->b[8]);
3907 pwd->b[9] = msa_subsus_u_df(DF_BYTE, pws->b[9], pwt->b[9]);
3908 pwd->b[10] = msa_subsus_u_df(DF_BYTE, pws->b[10], pwt->b[10]);
3909 pwd->b[11] = msa_subsus_u_df(DF_BYTE, pws->b[11], pwt->b[11]);
3910 pwd->b[12] = msa_subsus_u_df(DF_BYTE, pws->b[12], pwt->b[12]);
3911 pwd->b[13] = msa_subsus_u_df(DF_BYTE, pws->b[13], pwt->b[13]);
3912 pwd->b[14] = msa_subsus_u_df(DF_BYTE, pws->b[14], pwt->b[14]);
3913 pwd->b[15] = msa_subsus_u_df(DF_BYTE, pws->b[15], pwt->b[15]);
3914 }
3915
3916 void helper_msa_subsus_u_h(CPUMIPSState *env,
3917 uint32_t wd, uint32_t ws, uint32_t wt)
3918 {
3919 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3920 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3921 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3922
3923 pwd->h[0] = msa_subsus_u_df(DF_HALF, pws->h[0], pwt->h[0]);
3924 pwd->h[1] = msa_subsus_u_df(DF_HALF, pws->h[1], pwt->h[1]);
3925 pwd->h[2] = msa_subsus_u_df(DF_HALF, pws->h[2], pwt->h[2]);
3926 pwd->h[3] = msa_subsus_u_df(DF_HALF, pws->h[3], pwt->h[3]);
3927 pwd->h[4] = msa_subsus_u_df(DF_HALF, pws->h[4], pwt->h[4]);
3928 pwd->h[5] = msa_subsus_u_df(DF_HALF, pws->h[5], pwt->h[5]);
3929 pwd->h[6] = msa_subsus_u_df(DF_HALF, pws->h[6], pwt->h[6]);
3930 pwd->h[7] = msa_subsus_u_df(DF_HALF, pws->h[7], pwt->h[7]);
3931 }
3932
3933 void helper_msa_subsus_u_w(CPUMIPSState *env,
3934 uint32_t wd, uint32_t ws, uint32_t wt)
3935 {
3936 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3937 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3938 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3939
3940 pwd->w[0] = msa_subsus_u_df(DF_WORD, pws->w[0], pwt->w[0]);
3941 pwd->w[1] = msa_subsus_u_df(DF_WORD, pws->w[1], pwt->w[1]);
3942 pwd->w[2] = msa_subsus_u_df(DF_WORD, pws->w[2], pwt->w[2]);
3943 pwd->w[3] = msa_subsus_u_df(DF_WORD, pws->w[3], pwt->w[3]);
3944 }
3945
3946 void helper_msa_subsus_u_d(CPUMIPSState *env,
3947 uint32_t wd, uint32_t ws, uint32_t wt)
3948 {
3949 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3950 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3951 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3952
3953 pwd->d[0] = msa_subsus_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
3954 pwd->d[1] = msa_subsus_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
3955 }
3956
3957
3958 static inline int64_t msa_subsuu_s_df(uint32_t df, int64_t arg1, int64_t arg2)
3959 {
3960 uint64_t u_arg1 = UNSIGNED(arg1, df);
3961 uint64_t u_arg2 = UNSIGNED(arg2, df);
3962 int64_t max_int = DF_MAX_INT(df);
3963 int64_t min_int = DF_MIN_INT(df);
3964 if (u_arg1 > u_arg2) {
3965 return u_arg1 - u_arg2 < (uint64_t)max_int ?
3966 (int64_t)(u_arg1 - u_arg2) :
3967 max_int;
3968 } else {
3969 return u_arg2 - u_arg1 < (uint64_t)(-min_int) ?
3970 (int64_t)(u_arg1 - u_arg2) :
3971 min_int;
3972 }
3973 }
3974
3975 void helper_msa_subsuu_s_b(CPUMIPSState *env,
3976 uint32_t wd, uint32_t ws, uint32_t wt)
3977 {
3978 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3979 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3980 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3981
3982 pwd->b[0] = msa_subsuu_s_df(DF_BYTE, pws->b[0], pwt->b[0]);
3983 pwd->b[1] = msa_subsuu_s_df(DF_BYTE, pws->b[1], pwt->b[1]);
3984 pwd->b[2] = msa_subsuu_s_df(DF_BYTE, pws->b[2], pwt->b[2]);
3985 pwd->b[3] = msa_subsuu_s_df(DF_BYTE, pws->b[3], pwt->b[3]);
3986 pwd->b[4] = msa_subsuu_s_df(DF_BYTE, pws->b[4], pwt->b[4]);
3987 pwd->b[5] = msa_subsuu_s_df(DF_BYTE, pws->b[5], pwt->b[5]);
3988 pwd->b[6] = msa_subsuu_s_df(DF_BYTE, pws->b[6], pwt->b[6]);
3989 pwd->b[7] = msa_subsuu_s_df(DF_BYTE, pws->b[7], pwt->b[7]);
3990 pwd->b[8] = msa_subsuu_s_df(DF_BYTE, pws->b[8], pwt->b[8]);
3991 pwd->b[9] = msa_subsuu_s_df(DF_BYTE, pws->b[9], pwt->b[9]);
3992 pwd->b[10] = msa_subsuu_s_df(DF_BYTE, pws->b[10], pwt->b[10]);
3993 pwd->b[11] = msa_subsuu_s_df(DF_BYTE, pws->b[11], pwt->b[11]);
3994 pwd->b[12] = msa_subsuu_s_df(DF_BYTE, pws->b[12], pwt->b[12]);
3995 pwd->b[13] = msa_subsuu_s_df(DF_BYTE, pws->b[13], pwt->b[13]);
3996 pwd->b[14] = msa_subsuu_s_df(DF_BYTE, pws->b[14], pwt->b[14]);
3997 pwd->b[15] = msa_subsuu_s_df(DF_BYTE, pws->b[15], pwt->b[15]);
3998 }
3999
4000 void helper_msa_subsuu_s_h(CPUMIPSState *env,
4001 uint32_t wd, uint32_t ws, uint32_t wt)
4002 {
4003 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4004 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4005 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4006
4007 pwd->h[0] = msa_subsuu_s_df(DF_HALF, pws->h[0], pwt->h[0]);
4008 pwd->h[1] = msa_subsuu_s_df(DF_HALF, pws->h[1], pwt->h[1]);
4009 pwd->h[2] = msa_subsuu_s_df(DF_HALF, pws->h[2], pwt->h[2]);
4010 pwd->h[3] = msa_subsuu_s_df(DF_HALF, pws->h[3], pwt->h[3]);
4011 pwd->h[4] = msa_subsuu_s_df(DF_HALF, pws->h[4], pwt->h[4]);
4012 pwd->h[5] = msa_subsuu_s_df(DF_HALF, pws->h[5], pwt->h[5]);
4013 pwd->h[6] = msa_subsuu_s_df(DF_HALF, pws->h[6], pwt->h[6]);
4014 pwd->h[7] = msa_subsuu_s_df(DF_HALF, pws->h[7], pwt->h[7]);
4015 }
4016
4017 void helper_msa_subsuu_s_w(CPUMIPSState *env,
4018 uint32_t wd, uint32_t ws, uint32_t wt)
4019 {
4020 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4021 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4022 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4023
4024 pwd->w[0] = msa_subsuu_s_df(DF_WORD, pws->w[0], pwt->w[0]);
4025 pwd->w[1] = msa_subsuu_s_df(DF_WORD, pws->w[1], pwt->w[1]);
4026 pwd->w[2] = msa_subsuu_s_df(DF_WORD, pws->w[2], pwt->w[2]);
4027 pwd->w[3] = msa_subsuu_s_df(DF_WORD, pws->w[3], pwt->w[3]);
4028 }
4029
4030 void helper_msa_subsuu_s_d(CPUMIPSState *env,
4031 uint32_t wd, uint32_t ws, uint32_t wt)
4032 {
4033 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4034 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4035 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4036
4037 pwd->d[0] = msa_subsuu_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
4038 pwd->d[1] = msa_subsuu_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
4039 }
4040
4041
4042 static inline int64_t msa_subv_df(uint32_t df, int64_t arg1, int64_t arg2)
4043 {
4044 return arg1 - arg2;
4045 }
4046
4047 void helper_msa_subv_b(CPUMIPSState *env,
4048 uint32_t wd, uint32_t ws, uint32_t wt)
4049 {
4050 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4051 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4052 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4053
4054 pwd->b[0] = msa_subv_df(DF_BYTE, pws->b[0], pwt->b[0]);
4055 pwd->b[1] = msa_subv_df(DF_BYTE, pws->b[1], pwt->b[1]);
4056 pwd->b[2] = msa_subv_df(DF_BYTE, pws->b[2], pwt->b[2]);
4057 pwd->b[3] = msa_subv_df(DF_BYTE, pws->b[3], pwt->b[3]);
4058 pwd->b[4] = msa_subv_df(DF_BYTE, pws->b[4], pwt->b[4]);
4059 pwd->b[5] = msa_subv_df(DF_BYTE, pws->b[5], pwt->b[5]);
4060 pwd->b[6] = msa_subv_df(DF_BYTE, pws->b[6], pwt->b[6]);
4061 pwd->b[7] = msa_subv_df(DF_BYTE, pws->b[7], pwt->b[7]);
4062 pwd->b[8] = msa_subv_df(DF_BYTE, pws->b[8], pwt->b[8]);
4063 pwd->b[9] = msa_subv_df(DF_BYTE, pws->b[9], pwt->b[9]);
4064 pwd->b[10] = msa_subv_df(DF_BYTE, pws->b[10], pwt->b[10]);
4065 pwd->b[11] = msa_subv_df(DF_BYTE, pws->b[11], pwt->b[11]);
4066 pwd->b[12] = msa_subv_df(DF_BYTE, pws->b[12], pwt->b[12]);
4067 pwd->b[13] = msa_subv_df(DF_BYTE, pws->b[13], pwt->b[13]);
4068 pwd->b[14] = msa_subv_df(DF_BYTE, pws->b[14], pwt->b[14]);
4069 pwd->b[15] = msa_subv_df(DF_BYTE, pws->b[15], pwt->b[15]);
4070 }
4071
4072 void helper_msa_subv_h(CPUMIPSState *env,
4073 uint32_t wd, uint32_t ws, uint32_t wt)
4074 {
4075 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4076 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4077 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4078
4079 pwd->h[0] = msa_subv_df(DF_HALF, pws->h[0], pwt->h[0]);
4080 pwd->h[1] = msa_subv_df(DF_HALF, pws->h[1], pwt->h[1]);
4081 pwd->h[2] = msa_subv_df(DF_HALF, pws->h[2], pwt->h[2]);
4082 pwd->h[3] = msa_subv_df(DF_HALF, pws->h[3], pwt->h[3]);
4083 pwd->h[4] = msa_subv_df(DF_HALF, pws->h[4], pwt->h[4]);
4084 pwd->h[5] = msa_subv_df(DF_HALF, pws->h[5], pwt->h[5]);
4085 pwd->h[6] = msa_subv_df(DF_HALF, pws->h[6], pwt->h[6]);
4086 pwd->h[7] = msa_subv_df(DF_HALF, pws->h[7], pwt->h[7]);
4087 }
4088
4089 void helper_msa_subv_w(CPUMIPSState *env,
4090 uint32_t wd, uint32_t ws, uint32_t wt)
4091 {
4092 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4093 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4094 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4095
4096 pwd->w[0] = msa_subv_df(DF_WORD, pws->w[0], pwt->w[0]);
4097 pwd->w[1] = msa_subv_df(DF_WORD, pws->w[1], pwt->w[1]);
4098 pwd->w[2] = msa_subv_df(DF_WORD, pws->w[2], pwt->w[2]);
4099 pwd->w[3] = msa_subv_df(DF_WORD, pws->w[3], pwt->w[3]);
4100 }
4101
4102 void helper_msa_subv_d(CPUMIPSState *env,
4103 uint32_t wd, uint32_t ws, uint32_t wt)
4104 {
4105 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4106 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4107 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4108
4109 pwd->d[0] = msa_subv_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
4110 pwd->d[1] = msa_subv_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
4111 }
4112
4113
4114 /*
4115 * Interleave
4116 * ----------
4117 *
4118 * +---------------+----------------------------------------------------------+
4119 * | ILVEV.B | Vector Interleave Even (byte) |
4120 * | ILVEV.H | Vector Interleave Even (halfword) |
4121 * | ILVEV.W | Vector Interleave Even (word) |
4122 * | ILVEV.D | Vector Interleave Even (doubleword) |
4123 * | ILVOD.B | Vector Interleave Odd (byte) |
4124 * | ILVOD.H | Vector Interleave Odd (halfword) |
4125 * | ILVOD.W | Vector Interleave Odd (word) |
4126 * | ILVOD.D | Vector Interleave Odd (doubleword) |
4127 * | ILVL.B | Vector Interleave Left (byte) |
4128 * | ILVL.H | Vector Interleave Left (halfword) |
4129 * | ILVL.W | Vector Interleave Left (word) |
4130 * | ILVL.D | Vector Interleave Left (doubleword) |
4131 * | ILVR.B | Vector Interleave Right (byte) |
4132 * | ILVR.H | Vector Interleave Right (halfword) |
4133 * | ILVR.W | Vector Interleave Right (word) |
4134 * | ILVR.D | Vector Interleave Right (doubleword) |
4135 * +---------------+----------------------------------------------------------+
4136 */
4137
4138
4139 void helper_msa_ilvev_b(CPUMIPSState *env,
4140 uint32_t wd, uint32_t ws, uint32_t wt)
4141 {
4142 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4143 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4144 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4145
4146 #if defined(HOST_WORDS_BIGENDIAN)
4147 pwd->b[8] = pws->b[9];
4148 pwd->b[9] = pwt->b[9];
4149 pwd->b[10] = pws->b[11];
4150 pwd->b[11] = pwt->b[11];
4151 pwd->b[12] = pws->b[13];
4152 pwd->b[13] = pwt->b[13];
4153 pwd->b[14] = pws->b[15];
4154 pwd->b[15] = pwt->b[15];
4155 pwd->b[0] = pws->b[1];
4156 pwd->b[1] = pwt->b[1];
4157 pwd->b[2] = pws->b[3];
4158 pwd->b[3] = pwt->b[3];
4159 pwd->b[4] = pws->b[5];
4160 pwd->b[5] = pwt->b[5];
4161 pwd->b[6] = pws->b[7];
4162 pwd->b[7] = pwt->b[7];
4163 #else
4164 pwd->b[15] = pws->b[14];
4165 pwd->b[14] = pwt->b[14];
4166 pwd->b[13] = pws->b[12];
4167 pwd->b[12] = pwt->b[12];
4168 pwd->b[11] = pws->b[10];
4169 pwd->b[10] = pwt->b[10];
4170 pwd->b[9] = pws->b[8];
4171 pwd->b[8] = pwt->b[8];
4172 pwd->b[7] = pws->b[6];
4173 pwd->b[6] = pwt->b[6];
4174 pwd->b[5] = pws->b[4];
4175 pwd->b[4] = pwt->b[4];
4176 pwd->b[3] = pws->b[2];
4177 pwd->b[2] = pwt->b[2];
4178 pwd->b[1] = pws->b[0];
4179 pwd->b[0] = pwt->b[0];
4180 #endif
4181 }
4182
4183 void helper_msa_ilvev_h(CPUMIPSState *env,
4184 uint32_t wd, uint32_t ws, uint32_t wt)
4185 {
4186 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4187 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4188 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4189
4190 #if defined(HOST_WORDS_BIGENDIAN)
4191 pwd->h[4] = pws->h[5];
4192 pwd->h[5] = pwt->h[5];
4193 pwd->h[6] = pws->h[7];
4194 pwd->h[7] = pwt->h[7];
4195 pwd->h[0] = pws->h[1];
4196 pwd->h[1] = pwt->h[1];
4197 pwd->h[2] = pws->h[3];
4198 pwd->h[3] = pwt->h[3];
4199 #else
4200 pwd->h[7] = pws->h[6];
4201 pwd->h[6] = pwt->h[6];
4202 pwd->h[5] = pws->h[4];
4203 pwd->h[4] = pwt->h[4];
4204 pwd->h[3] = pws->h[2];
4205 pwd->h[2] = pwt->h[2];
4206 pwd->h[1] = pws->h[0];
4207 pwd->h[0] = pwt->h[0];
4208 #endif
4209 }
4210
4211 void helper_msa_ilvev_w(CPUMIPSState *env,
4212 uint32_t wd, uint32_t ws, uint32_t wt)
4213 {
4214 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4215 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4216 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4217
4218 #if defined(HOST_WORDS_BIGENDIAN)
4219 pwd->w[2] = pws->w[3];
4220 pwd->w[3] = pwt->w[3];
4221 pwd->w[0] = pws->w[1];
4222 pwd->w[1] = pwt->w[1];
4223 #else
4224 pwd->w[3] = pws->w[2];
4225 pwd->w[2] = pwt->w[2];
4226 pwd->w[1] = pws->w[0];
4227 pwd->w[0] = pwt->w[0];
4228 #endif
4229 }
4230
4231 void helper_msa_ilvev_d(CPUMIPSState *env,
4232 uint32_t wd, uint32_t ws, uint32_t wt)
4233 {
4234 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4235 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4236 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4237
4238 pwd->d[1] = pws->d[0];
4239 pwd->d[0] = pwt->d[0];
4240 }
4241
4242
4243 void helper_msa_ilvod_b(CPUMIPSState *env,
4244 uint32_t wd, uint32_t ws, uint32_t wt)
4245 {
4246 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4247 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4248 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4249
4250 #if defined(HOST_WORDS_BIGENDIAN)
4251 pwd->b[7] = pwt->b[6];
4252 pwd->b[6] = pws->b[6];
4253 pwd->b[5] = pwt->b[4];
4254 pwd->b[4] = pws->b[4];
4255 pwd->b[3] = pwt->b[2];
4256 pwd->b[2] = pws->b[2];
4257 pwd->b[1] = pwt->b[0];
4258 pwd->b[0] = pws->b[0];
4259 pwd->b[15] = pwt->b[14];
4260 pwd->b[14] = pws->b[14];
4261 pwd->b[13] = pwt->b[12];
4262 pwd->b[12] = pws->b[12];
4263 pwd->b[11] = pwt->b[10];
4264 pwd->b[10] = pws->b[10];
4265 pwd->b[9] = pwt->b[8];
4266 pwd->b[8] = pws->b[8];
4267 #else
4268 pwd->b[0] = pwt->b[1];
4269 pwd->b[1] = pws->b[1];
4270 pwd->b[2] = pwt->b[3];
4271 pwd->b[3] = pws->b[3];
4272 pwd->b[4] = pwt->b[5];
4273 pwd->b[5] = pws->b[5];
4274 pwd->b[6] = pwt->b[7];
4275 pwd->b[7] = pws->b[7];
4276 pwd->b[8] = pwt->b[9];
4277 pwd->b[9] = pws->b[9];
4278 pwd->b[10] = pwt->b[11];
4279 pwd->b[11] = pws->b[11];
4280 pwd->b[12] = pwt->b[13];
4281 pwd->b[13] = pws->b[13];
4282 pwd->b[14] = pwt->b[15];
4283 pwd->b[15] = pws->b[15];
4284 #endif
4285 }
4286
4287 void helper_msa_ilvod_h(CPUMIPSState *env,
4288 uint32_t wd, uint32_t ws, uint32_t wt)
4289 {
4290 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4291 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4292 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4293
4294 #if defined(HOST_WORDS_BIGENDIAN)
4295 pwd->h[3] = pwt->h[2];
4296 pwd->h[2] = pws->h[2];
4297 pwd->h[1] = pwt->h[0];
4298 pwd->h[0] = pws->h[0];
4299 pwd->h[7] = pwt->h[6];
4300 pwd->h[6] = pws->h[6];
4301 pwd->h[5] = pwt->h[4];
4302 pwd->h[4] = pws->h[4];
4303 #else
4304 pwd->h[0] = pwt->h[1];
4305 pwd->h[1] = pws->h[1];
4306 pwd->h[2] = pwt->h[3];
4307 pwd->h[3] = pws->h[3];
4308 pwd->h[4] = pwt->h[5];
4309 pwd->h[5] = pws->h[5];
4310 pwd->h[6] = pwt->h[7];
4311 pwd->h[7] = pws->h[7];
4312 #endif
4313 }
4314
4315 void helper_msa_ilvod_w(CPUMIPSState *env,
4316 uint32_t wd, uint32_t ws, uint32_t wt)
4317 {
4318 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4319 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4320 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4321
4322 #if defined(HOST_WORDS_BIGENDIAN)
4323 pwd->w[1] = pwt->w[0];
4324 pwd->w[0] = pws->w[0];
4325 pwd->w[3] = pwt->w[2];
4326 pwd->w[2] = pws->w[2];
4327 #else
4328 pwd->w[0] = pwt->w[1];
4329 pwd->w[1] = pws->w[1];
4330 pwd->w[2] = pwt->w[3];
4331 pwd->w[3] = pws->w[3];
4332 #endif
4333 }
4334
4335 void helper_msa_ilvod_d(CPUMIPSState *env,
4336 uint32_t wd, uint32_t ws, uint32_t wt)
4337 {
4338 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4339 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4340 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4341
4342 pwd->d[0] = pwt->d[1];
4343 pwd->d[1] = pws->d[1];
4344 }
4345
4346
4347 void helper_msa_ilvl_b(CPUMIPSState *env,
4348 uint32_t wd, uint32_t ws, uint32_t wt)
4349 {
4350 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4351 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4352 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4353
4354 #if defined(HOST_WORDS_BIGENDIAN)
4355 pwd->b[7] = pwt->b[15];
4356 pwd->b[6] = pws->b[15];
4357 pwd->b[5] = pwt->b[14];
4358 pwd->b[4] = pws->b[14];
4359 pwd->b[3] = pwt->b[13];
4360 pwd->b[2] = pws->b[13];
4361 pwd->b[1] = pwt->b[12];
4362 pwd->b[0] = pws->b[12];
4363 pwd->b[15] = pwt->b[11];
4364 pwd->b[14] = pws->b[11];
4365 pwd->b[13] = pwt->b[10];
4366 pwd->b[12] = pws->b[10];
4367 pwd->b[11] = pwt->b[9];
4368 pwd->b[10] = pws->b[9];
4369 pwd->b[9] = pwt->b[8];
4370 pwd->b[8] = pws->b[8];
4371 #else
4372 pwd->b[0] = pwt->b[8];
4373 pwd->b[1] = pws->b[8];
4374 pwd->b[2] = pwt->b[9];
4375 pwd->b[3] = pws->b[9];
4376 pwd->b[4] = pwt->b[10];
4377 pwd->b[5] = pws->b[10];
4378 pwd->b[6] = pwt->b[11];
4379 pwd->b[7] = pws->b[11];
4380 pwd->b[8] = pwt->b[12];
4381 pwd->b[9] = pws->b[12];
4382 pwd->b[10] = pwt->b[13];
4383 pwd->b[11] = pws->b[13];
4384 pwd->b[12] = pwt->b[14];
4385 pwd->b[13] = pws->b[14];
4386 pwd->b[14] = pwt->b[15];
4387 pwd->b[15] = pws->b[15];
4388 #endif
4389 }
4390
4391 void helper_msa_ilvl_h(CPUMIPSState *env,
4392 uint32_t wd, uint32_t ws, uint32_t wt)
4393 {
4394 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4395 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4396 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4397
4398 #if defined(HOST_WORDS_BIGENDIAN)
4399 pwd->h[3] = pwt->h[7];
4400 pwd->h[2] = pws->h[7];
4401 pwd->h[1] = pwt->h[6];
4402 pwd->h[0] = pws->h[6];
4403 pwd->h[7] = pwt->h[5];
4404 pwd->h[6] = pws->h[5];
4405 pwd->h[5] = pwt->h[4];
4406 pwd->h[4] = pws->h[4];
4407 #else
4408 pwd->h[0] = pwt->h[4];
4409 pwd->h[1] = pws->h[4];
4410 pwd->h[2] = pwt->h[5];
4411 pwd->h[3] = pws->h[5];
4412 pwd->h[4] = pwt->h[6];
4413 pwd->h[5] = pws->h[6];
4414 pwd->h[6] = pwt->h[7];
4415 pwd->h[7] = pws->h[7];
4416 #endif
4417 }
4418
4419 void helper_msa_ilvl_w(CPUMIPSState *env,
4420 uint32_t wd, uint32_t ws, uint32_t wt)
4421 {
4422 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4423 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4424 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4425
4426 #if defined(HOST_WORDS_BIGENDIAN)
4427 pwd->w[1] = pwt->w[3];
4428 pwd->w[0] = pws->w[3];
4429 pwd->w[3] = pwt->w[2];
4430 pwd->w[2] = pws->w[2];
4431 #else
4432 pwd->w[0] = pwt->w[2];
4433 pwd->w[1] = pws->w[2];
4434 pwd->w[2] = pwt->w[3];
4435 pwd->w[3] = pws->w[3];
4436 #endif
4437 }
4438
4439 void helper_msa_ilvl_d(CPUMIPSState *env,
4440 uint32_t wd, uint32_t ws, uint32_t wt)
4441 {
4442 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4443 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4444 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4445
4446 pwd->d[0] = pwt->d[1];
4447 pwd->d[1] = pws->d[1];
4448 }
4449
4450
4451 void helper_msa_ilvr_b(CPUMIPSState *env,
4452 uint32_t wd, uint32_t ws, uint32_t wt)
4453 {
4454 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4455 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4456 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4457
4458 #if defined(HOST_WORDS_BIGENDIAN)
4459 pwd->b[8] = pws->b[0];
4460 pwd->b[9] = pwt->b[0];
4461 pwd->b[10] = pws->b[1];
4462 pwd->b[11] = pwt->b[1];
4463 pwd->b[12] = pws->b[2];
4464 pwd->b[13] = pwt->b[2];
4465 pwd->b[14] = pws->b[3];
4466 pwd->b[15] = pwt->b[3];
4467 pwd->b[0] = pws->b[4];
4468 pwd->b[1] = pwt->b[4];
4469 pwd->b[2] = pws->b[5];
4470 pwd->b[3] = pwt->b[5];
4471 pwd->b[4] = pws->b[6];
4472 pwd->b[5] = pwt->b[6];
4473 pwd->b[6] = pws->b[7];
4474 pwd->b[7] = pwt->b[7];
4475 #else
4476 pwd->b[15] = pws->b[7];
4477 pwd->b[14] = pwt->b[7];
4478 pwd->b[13] = pws->b[6];
4479 pwd->b[12] = pwt->b[6];
4480 pwd->b[11] = pws->b[5];
4481 pwd->b[10] = pwt->b[5];
4482 pwd->b[9] = pws->b[4];
4483 pwd->b[8] = pwt->b[4];
4484 pwd->b[7] = pws->b[3];
4485 pwd->b[6] = pwt->b[3];
4486 pwd->b[5] = pws->b[2];
4487 pwd->b[4] = pwt->b[2];
4488 pwd->b[3] = pws->b[1];
4489 pwd->b[2] = pwt->b[1];
4490 pwd->b[1] = pws->b[0];
4491 pwd->b[0] = pwt->b[0];
4492 #endif
4493 }
4494
4495 void helper_msa_ilvr_h(CPUMIPSState *env,
4496 uint32_t wd, uint32_t ws, uint32_t wt)
4497 {
4498 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4499 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4500 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4501
4502 #if defined(HOST_WORDS_BIGENDIAN)
4503 pwd->h[4] = pws->h[0];
4504 pwd->h[5] = pwt->h[0];
4505 pwd->h[6] = pws->h[1];
4506 pwd->h[7] = pwt->h[1];
4507 pwd->h[0] = pws->h[2];
4508 pwd->h[1] = pwt->h[2];
4509 pwd->h[2] = pws->h[3];
4510 pwd->h[3] = pwt->h[3];
4511 #else
4512 pwd->h[7] = pws->h[3];
4513 pwd->h[6] = pwt->h[3];
4514 pwd->h[5] = pws->h[2];
4515 pwd->h[4] = pwt->h[2];
4516 pwd->h[3] = pws->h[1];
4517 pwd->h[2] = pwt->h[1];
4518 pwd->h[1] = pws->h[0];
4519 pwd->h[0] = pwt->h[0];
4520 #endif
4521 }
4522
4523 void helper_msa_ilvr_w(CPUMIPSState *env,
4524 uint32_t wd, uint32_t ws, uint32_t wt)
4525 {
4526 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4527 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4528 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4529
4530 #if defined(HOST_WORDS_BIGENDIAN)
4531 pwd->w[2] = pws->w[0];
4532 pwd->w[3] = pwt->w[0];
4533 pwd->w[0] = pws->w[1];
4534 pwd->w[1] = pwt->w[1];
4535 #else
4536 pwd->w[3] = pws->w[1];
4537 pwd->w[2] = pwt->w[1];
4538 pwd->w[1] = pws->w[0];
4539 pwd->w[0] = pwt->w[0];
4540 #endif
4541 }
4542
4543 void helper_msa_ilvr_d(CPUMIPSState *env,
4544 uint32_t wd, uint32_t ws, uint32_t wt)
4545 {
4546 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4547 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4548 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4549
4550 pwd->d[1] = pws->d[0];
4551 pwd->d[0] = pwt->d[0];
4552 }
4553
4554
4555 /*
4556 * Logic
4557 * -----
4558 *
4559 * +---------------+----------------------------------------------------------+
4560 * | AND.V | Vector Logical And |
4561 * | NOR.V | Vector Logical Negated Or |
4562 * | OR.V | Vector Logical Or |
4563 * | XOR.V | Vector Logical Exclusive Or |
4564 * +---------------+----------------------------------------------------------+
4565 */
4566
4567
4568 void helper_msa_and_v(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
4569 {
4570 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4571 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4572 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4573
4574 pwd->d[0] = pws->d[0] & pwt->d[0];
4575 pwd->d[1] = pws->d[1] & pwt->d[1];
4576 }
4577
4578 void helper_msa_nor_v(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
4579 {
4580 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4581 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4582 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4583
4584 pwd->d[0] = ~(pws->d[0] | pwt->d[0]);
4585 pwd->d[1] = ~(pws->d[1] | pwt->d[1]);
4586 }
4587
4588 void helper_msa_or_v(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
4589 {
4590 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4591 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4592 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4593
4594 pwd->d[0] = pws->d[0] | pwt->d[0];
4595 pwd->d[1] = pws->d[1] | pwt->d[1];
4596 }
4597
4598 void helper_msa_xor_v(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
4599 {
4600 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4601 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4602 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4603
4604 pwd->d[0] = pws->d[0] ^ pwt->d[0];
4605 pwd->d[1] = pws->d[1] ^ pwt->d[1];
4606 }
4607
4608
4609 /*
4610 * Move
4611 * ----
4612 *
4613 * +---------------+----------------------------------------------------------+
4614 * | MOVE.V | Vector Move |
4615 * +---------------+----------------------------------------------------------+
4616 */
4617
4618 static inline void msa_move_v(wr_t *pwd, wr_t *pws)
4619 {
4620 pwd->d[0] = pws->d[0];
4621 pwd->d[1] = pws->d[1];
4622 }
4623
4624 void helper_msa_move_v(CPUMIPSState *env, uint32_t wd, uint32_t ws)
4625 {
4626 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4627 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4628
4629 msa_move_v(pwd, pws);
4630 }
4631
4632
4633 /*
4634 * Pack
4635 * ----
4636 *
4637 * +---------------+----------------------------------------------------------+
4638 * | PCKEV.B | Vector Pack Even (byte) |
4639 * | PCKEV.H | Vector Pack Even (halfword) |
4640 * | PCKEV.W | Vector Pack Even (word) |
4641 * | PCKEV.D | Vector Pack Even (doubleword) |
4642 * | PCKOD.B | Vector Pack Odd (byte) |
4643 * | PCKOD.H | Vector Pack Odd (halfword) |
4644 * | PCKOD.W | Vector Pack Odd (word) |
4645 * | PCKOD.D | Vector Pack Odd (doubleword) |
4646 * | VSHF.B | Vector Data Preserving Shuffle (byte) |
4647 * | VSHF.H | Vector Data Preserving Shuffle (halfword) |
4648 * | VSHF.W | Vector Data Preserving Shuffle (word) |
4649 * | VSHF.D | Vector Data Preserving Shuffle (doubleword) |
4650 * +---------------+----------------------------------------------------------+
4651 */
4652
4653
4654 void helper_msa_pckev_b(CPUMIPSState *env,
4655 uint32_t wd, uint32_t ws, uint32_t wt)
4656 {
4657 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4658 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4659 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4660
4661 #if defined(HOST_WORDS_BIGENDIAN)
4662 pwd->b[8] = pws->b[9];
4663 pwd->b[10] = pws->b[13];
4664 pwd->b[12] = pws->b[1];
4665 pwd->b[14] = pws->b[5];
4666 pwd->b[0] = pwt->b[9];
4667 pwd->b[2] = pwt->b[13];
4668 pwd->b[4] = pwt->b[1];
4669 pwd->b[6] = pwt->b[5];
4670 pwd->b[9] = pws->b[11];
4671 pwd->b[13] = pws->b[3];
4672 pwd->b[1] = pwt->b[11];
4673 pwd->b[5] = pwt->b[3];
4674 pwd->b[11] = pws->b[15];
4675 pwd->b[3] = pwt->b[15];
4676 pwd->b[15] = pws->b[7];
4677 pwd->b[7] = pwt->b[7];
4678 #else
4679 pwd->b[15] = pws->b[14];
4680 pwd->b[13] = pws->b[10];
4681 pwd->b[11] = pws->b[6];
4682 pwd->b[9] = pws->b[2];
4683 pwd->b[7] = pwt->b[14];
4684 pwd->b[5] = pwt->b[10];
4685 pwd->b[3] = pwt->b[6];
4686 pwd->b[1] = pwt->b[2];
4687 pwd->b[14] = pws->b[12];
4688 pwd->b[10] = pws->b[4];
4689 pwd->b[6] = pwt->b[12];
4690 pwd->b[2] = pwt->b[4];
4691 pwd->b[12] = pws->b[8];
4692 pwd->b[4] = pwt->b[8];
4693 pwd->b[8] = pws->b[0];
4694 pwd->b[0] = pwt->b[0];
4695 #endif
4696 }
4697
4698 void helper_msa_pckev_h(CPUMIPSState *env,
4699 uint32_t wd, uint32_t ws, uint32_t wt)
4700 {
4701 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4702 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4703 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4704
4705 #if defined(HOST_WORDS_BIGENDIAN)
4706 pwd->h[4] = pws->h[5];
4707 pwd->h[6] = pws->h[1];
4708 pwd->h[0] = pwt->h[5];
4709 pwd->h[2] = pwt->h[1];
4710 pwd->h[5] = pws->h[7];
4711 pwd->h[1] = pwt->h[7];
4712 pwd->h[7] = pws->h[3];
4713 pwd->h[3] = pwt->h[3];
4714 #else
4715 pwd->h[7] = pws->h[6];
4716 pwd->h[5] = pws->h[2];
4717 pwd->h[3] = pwt->h[6];
4718 pwd->h[1] = pwt->h[2];
4719 pwd->h[6] = pws->h[4];
4720 pwd->h[2] = pwt->h[4];
4721 pwd->h[4] = pws->h[0];
4722 pwd->h[0] = pwt->h[0];
4723 #endif
4724 }
4725
4726 void helper_msa_pckev_w(CPUMIPSState *env,
4727 uint32_t wd, uint32_t ws, uint32_t wt)
4728 {
4729 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4730 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4731 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4732
4733 #if defined(HOST_WORDS_BIGENDIAN)
4734 pwd->w[2] = pws->w[3];
4735 pwd->w[0] = pwt->w[3];
4736 pwd->w[3] = pws->w[1];
4737 pwd->w[1] = pwt->w[1];
4738 #else
4739 pwd->w[3] = pws->w[2];
4740 pwd->w[1] = pwt->w[2];
4741 pwd->w[2] = pws->w[0];
4742 pwd->w[0] = pwt->w[0];
4743 #endif
4744 }
4745
4746 void helper_msa_pckev_d(CPUMIPSState *env,
4747 uint32_t wd, uint32_t ws, uint32_t wt)
4748 {
4749 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4750 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4751 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4752
4753 pwd->d[1] = pws->d[0];
4754 pwd->d[0] = pwt->d[0];
4755 }
4756
4757
4758 void helper_msa_pckod_b(CPUMIPSState *env,
4759 uint32_t wd, uint32_t ws, uint32_t wt)
4760 {
4761 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4762 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4763 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4764
4765 #if defined(HOST_WORDS_BIGENDIAN)
4766 pwd->b[7] = pwt->b[6];
4767 pwd->b[5] = pwt->b[2];
4768 pwd->b[3] = pwt->b[14];
4769 pwd->b[1] = pwt->b[10];
4770 pwd->b[15] = pws->b[6];
4771 pwd->b[13] = pws->b[2];
4772 pwd->b[11] = pws->b[14];
4773 pwd->b[9] = pws->b[10];
4774 pwd->b[6] = pwt->b[4];
4775 pwd->b[2] = pwt->b[12];
4776 pwd->b[14] = pws->b[4];
4777 pwd->b[10] = pws->b[12];
4778 pwd->b[4] = pwt->b[0];
4779 pwd->b[12] = pws->b[0];
4780 pwd->b[0] = pwt->b[8];
4781 pwd->b[8] = pws->b[8];
4782 #else
4783 pwd->b[0] = pwt->b[1];
4784 pwd->b[2] = pwt->b[5];
4785 pwd->b[4] = pwt->b[9];
4786 pwd->b[6] = pwt->b[13];
4787 pwd->b[8] = pws->b[1];
4788 pwd->b[10] = pws->b[5];
4789 pwd->b[12] = pws->b[9];
4790 pwd->b[14] = pws->b[13];
4791 pwd->b[1] = pwt->b[3];
4792 pwd->b[5] = pwt->b[11];
4793 pwd->b[9] = pws->b[3];
4794 pwd->b[13] = pws->b[11];
4795 pwd->b[3] = pwt->b[7];
4796 pwd->b[11] = pws->b[7];
4797 pwd->b[7] = pwt->b[15];
4798 pwd->b[15] = pws->b[15];
4799 #endif
4800
4801 }
4802
4803 void helper_msa_pckod_h(CPUMIPSState *env,
4804 uint32_t wd, uint32_t ws, uint32_t wt)
4805 {
4806 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4807 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4808 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4809
4810 #if defined(HOST_WORDS_BIGENDIAN)
4811 pwd->h[3] = pwt->h[2];
4812 pwd->h[1] = pwt->h[6];
4813 pwd->h[7] = pws->h[2];
4814 pwd->h[5] = pws->h[6];
4815 pwd->h[2] = pwt->h[0];
4816 pwd->h[6] = pws->h[0];
4817 pwd->h[0] = pwt->h[4];
4818 pwd->h[4] = pws->h[4];
4819 #else
4820 pwd->h[0] = pwt->h[1];
4821 pwd->h[2] = pwt->h[5];
4822 pwd->h[4] = pws->h[1];
4823 pwd->h[6] = pws->h[5];
4824 pwd->h[1] = pwt->h[3];
4825 pwd->h[5] = pws->h[3];
4826 pwd->h[3] = pwt->h[7];
4827 pwd->h[7] = pws->h[7];
4828 #endif
4829 }
4830
4831 void helper_msa_pckod_w(CPUMIPSState *env,
4832 uint32_t wd, uint32_t ws, uint32_t wt)
4833 {
4834 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4835 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4836 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4837
4838 #if defined(HOST_WORDS_BIGENDIAN)
4839 pwd->w[1] = pwt->w[0];
4840 pwd->w[3] = pws->w[0];
4841 pwd->w[0] = pwt->w[2];
4842 pwd->w[2] = pws->w[2];
4843 #else
4844 pwd->w[0] = pwt->w[1];
4845 pwd->w[2] = pws->w[1];
4846 pwd->w[1] = pwt->w[3];
4847 pwd->w[3] = pws->w[3];
4848 #endif
4849 }
4850
4851 void helper_msa_pckod_d(CPUMIPSState *env,
4852 uint32_t wd, uint32_t ws, uint32_t wt)
4853 {
4854 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4855 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4856 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4857
4858 pwd->d[0] = pwt->d[1];
4859 pwd->d[1] = pws->d[1];
4860 }
4861
4862
4863 /*
4864 * Shift
4865 * -----
4866 *
4867 * +---------------+----------------------------------------------------------+
4868 * | SLL.B | Vector Shift Left (byte) |
4869 * | SLL.H | Vector Shift Left (halfword) |
4870 * | SLL.W | Vector Shift Left (word) |
4871 * | SLL.D | Vector Shift Left (doubleword) |
4872 * | SRA.B | Vector Shift Right Arithmetic (byte) |
4873 * | SRA.H | Vector Shift Right Arithmetic (halfword) |
4874 * | SRA.W | Vector Shift Right Arithmetic (word) |
4875 * | SRA.D | Vector Shift Right Arithmetic (doubleword) |
4876 * | SRAR.B | Vector Shift Right Arithmetic Rounded (byte) |
4877 * | SRAR.H | Vector Shift Right Arithmetic Rounded (halfword) |
4878 * | SRAR.W | Vector Shift Right Arithmetic Rounded (word) |
4879 * | SRAR.D | Vector Shift Right Arithmetic Rounded (doubleword) |
4880 * | SRL.B | Vector Shift Right Logical (byte) |
4881 * | SRL.H | Vector Shift Right Logical (halfword) |
4882 * | SRL.W | Vector Shift Right Logical (word) |
4883 * | SRL.D | Vector Shift Right Logical (doubleword) |
4884 * | SRLR.B | Vector Shift Right Logical Rounded (byte) |
4885 * | SRLR.H | Vector Shift Right Logical Rounded (halfword) |
4886 * | SRLR.W | Vector Shift Right Logical Rounded (word) |
4887 * | SRLR.D | Vector Shift Right Logical Rounded (doubleword) |
4888 * +---------------+----------------------------------------------------------+
4889 */
4890
4891
4892 static inline int64_t msa_sll_df(uint32_t df, int64_t arg1, int64_t arg2)
4893 {
4894 int32_t b_arg2 = BIT_POSITION(arg2, df);
4895 return arg1 << b_arg2;
4896 }
4897
4898 void helper_msa_sll_b(CPUMIPSState *env,
4899 uint32_t wd, uint32_t ws, uint32_t wt)
4900 {
4901 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4902 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4903 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4904
4905 pwd->b[0] = msa_sll_df(DF_BYTE, pws->b[0], pwt->b[0]);
4906 pwd->b[1] = msa_sll_df(DF_BYTE, pws->b[1], pwt->b[1]);
4907 pwd->b[2] = msa_sll_df(DF_BYTE, pws->b[2], pwt->b[2]);
4908 pwd->b[3] = msa_sll_df(DF_BYTE, pws->b[3], pwt->b[3]);
4909 pwd->b[4] = msa_sll_df(DF_BYTE, pws->b[4], pwt->b[4]);
4910 pwd->b[5] = msa_sll_df(DF_BYTE, pws->b[5], pwt->b[5]);
4911 pwd->b[6] = msa_sll_df(DF_BYTE, pws->b[6], pwt->b[6]);
4912 pwd->b[7] = msa_sll_df(DF_BYTE, pws->b[7], pwt->b[7]);
4913 pwd->b[8] = msa_sll_df(DF_BYTE, pws->b[8], pwt->b[8]);
4914 pwd->b[9] = msa_sll_df(DF_BYTE, pws->b[9], pwt->b[9]);
4915 pwd->b[10] = msa_sll_df(DF_BYTE, pws->b[10], pwt->b[10]);
4916 pwd->b[11] = msa_sll_df(DF_BYTE, pws->b[11], pwt->b[11]);
4917 pwd->b[12] = msa_sll_df(DF_BYTE, pws->b[12], pwt->b[12]);
4918 pwd->b[13] = msa_sll_df(DF_BYTE, pws->b[13], pwt->b[13]);
4919 pwd->b[14] = msa_sll_df(DF_BYTE, pws->b[14], pwt->b[14]);
4920 pwd->b[15] = msa_sll_df(DF_BYTE, pws->b[15], pwt->b[15]);
4921 }
4922
4923 void helper_msa_sll_h(CPUMIPSState *env,
4924 uint32_t wd, uint32_t ws, uint32_t wt)
4925 {
4926 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4927 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4928 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4929
4930 pwd->h[0] = msa_sll_df(DF_HALF, pws->h[0], pwt->h[0]);
4931 pwd->h[1] = msa_sll_df(DF_HALF, pws->h[1], pwt->h[1]);
4932 pwd->h[2] = msa_sll_df(DF_HALF, pws->h[2], pwt->h[2]);
4933 pwd->h[3] = msa_sll_df(DF_HALF, pws->h[3], pwt->h[3]);
4934 pwd->h[4] = msa_sll_df(DF_HALF, pws->h[4], pwt->h[4]);
4935 pwd->h[5] = msa_sll_df(DF_HALF, pws->h[5], pwt->h[5]);
4936 pwd->h[6] = msa_sll_df(DF_HALF, pws->h[6], pwt->h[6]);
4937 pwd->h[7] = msa_sll_df(DF_HALF, pws->h[7], pwt->h[7]);
4938 }
4939
4940 void helper_msa_sll_w(CPUMIPSState *env,
4941 uint32_t wd, uint32_t ws, uint32_t wt)
4942 {
4943 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4944 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4945 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4946
4947 pwd->w[0] = msa_sll_df(DF_WORD, pws->w[0], pwt->w[0]);
4948 pwd->w[1] = msa_sll_df(DF_WORD, pws->w[1], pwt->w[1]);
4949 pwd->w[2] = msa_sll_df(DF_WORD, pws->w[2], pwt->w[2]);
4950 pwd->w[3] = msa_sll_df(DF_WORD, pws->w[3], pwt->w[3]);
4951 }
4952
4953 void helper_msa_sll_d(CPUMIPSState *env,
4954 uint32_t wd, uint32_t ws, uint32_t wt)
4955 {
4956 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4957 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4958 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4959
4960 pwd->d[0] = msa_sll_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
4961 pwd->d[1] = msa_sll_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
4962 }
4963
4964
4965 static inline int64_t msa_sra_df(uint32_t df, int64_t arg1, int64_t arg2)
4966 {
4967 int32_t b_arg2 = BIT_POSITION(arg2, df);
4968 return arg1 >> b_arg2;
4969 }
4970
4971 void helper_msa_sra_b(CPUMIPSState *env,
4972 uint32_t wd, uint32_t ws, uint32_t wt)
4973 {
4974 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4975 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4976 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4977
4978 pwd->b[0] = msa_sra_df(DF_BYTE, pws->b[0], pwt->b[0]);
4979 pwd->b[1] = msa_sra_df(DF_BYTE, pws->b[1], pwt->b[1]);
4980 pwd->b[2] = msa_sra_df(DF_BYTE, pws->b[2], pwt->b[2]);
4981 pwd->b[3] = msa_sra_df(DF_BYTE, pws->b[3], pwt->b[3]);
4982 pwd->b[4] = msa_sra_df(DF_BYTE, pws->b[4], pwt->b[4]);
4983 pwd->b[5] = msa_sra_df(DF_BYTE, pws->b[5], pwt->b[5]);
4984 pwd->b[6] = msa_sra_df(DF_BYTE, pws->b[6], pwt->b[6]);
4985 pwd->b[7] = msa_sra_df(DF_BYTE, pws->b[7], pwt->b[7]);
4986 pwd->b[8] = msa_sra_df(DF_BYTE, pws->b[8], pwt->b[8]);
4987 pwd->b[9] = msa_sra_df(DF_BYTE, pws->b[9], pwt->b[9]);
4988 pwd->b[10] = msa_sra_df(DF_BYTE, pws->b[10], pwt->b[10]);
4989 pwd->b[11] = msa_sra_df(DF_BYTE, pws->b[11], pwt->b[11]);
4990 pwd->b[12] = msa_sra_df(DF_BYTE, pws->b[12], pwt->b[12]);
4991 pwd->b[13] = msa_sra_df(DF_BYTE, pws->b[13], pwt->b[13]);
4992 pwd->b[14] = msa_sra_df(DF_BYTE, pws->b[14], pwt->b[14]);
4993 pwd->b[15] = msa_sra_df(DF_BYTE, pws->b[15], pwt->b[15]);
4994 }
4995
4996 void helper_msa_sra_h(CPUMIPSState *env,
4997 uint32_t wd, uint32_t ws, uint32_t wt)
4998 {
4999 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5000 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5001 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
5002
5003 pwd->h[0] = msa_sra_df(DF_HALF, pws->h[0], pwt->h[0]);
5004 pwd->h[1] = msa_sra_df(DF_HALF, pws->h[1], pwt->h[1]);
5005 pwd->h[2] = msa_sra_df(DF_HALF, pws->h[2], pwt->h[2]);
5006 pwd->h[3] = msa_sra_df(DF_HALF, pws->h[3], pwt->h[3]);
5007 pwd->h[4] = msa_sra_df(DF_HALF, pws->h[4], pwt->h[4]);
5008 pwd->h[5] = msa_sra_df(DF_HALF, pws->h[5], pwt->h[5]);
5009 pwd->h[6] = msa_sra_df(DF_HALF, pws->h[6], pwt->h[6]);
5010 pwd->h[7] = msa_sra_df(DF_HALF, pws->h[7], pwt->h[7]);
5011 }
5012
5013 void helper_msa_sra_w(CPUMIPSState *env,
5014 uint32_t wd, uint32_t ws, uint32_t wt)
5015 {
5016 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5017 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5018 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
5019
5020 pwd->w[0] = msa_sra_df(DF_WORD, pws->w[0], pwt->w[0]);
5021 pwd->w[1] = msa_sra_df(DF_WORD, pws->w[1], pwt->w[1]);
5022 pwd->w[2] = msa_sra_df(DF_WORD, pws->w[2], pwt->w[2]);
5023 pwd->w[3] = msa_sra_df(DF_WORD, pws->w[3], pwt->w[3]);
5024 }
5025
5026 void helper_msa_sra_d(CPUMIPSState *env,
5027 uint32_t wd, uint32_t ws, uint32_t wt)
5028 {
5029 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5030 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5031 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
5032
5033 pwd->d[0] = msa_sra_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
5034 pwd->d[1] = msa_sra_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
5035 }
5036
5037
5038 static inline int64_t msa_srar_df(uint32_t df, int64_t arg1, int64_t arg2)
5039 {
5040 int32_t b_arg2 = BIT_POSITION(arg2, df);
5041 if (b_arg2 == 0) {
5042 return arg1;
5043 } else {
5044 int64_t r_bit = (arg1 >> (b_arg2 - 1)) & 1;
5045 return (arg1 >> b_arg2) + r_bit;
5046 }
5047 }
5048
5049 void helper_msa_srar_b(CPUMIPSState *env,
5050 uint32_t wd, uint32_t ws, uint32_t wt)
5051 {
5052 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5053 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5054 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
5055
5056 pwd->b[0] = msa_srar_df(DF_BYTE, pws->b[0], pwt->b[0]);
5057 pwd->b[1] = msa_srar_df(DF_BYTE, pws->b[1], pwt->b[1]);
5058 pwd->b[2] = msa_srar_df(DF_BYTE, pws->b[2], pwt->b[2]);
5059 pwd->b[3] = msa_srar_df(DF_BYTE, pws->b[3], pwt->b[3]);
5060 pwd->b[4] = msa_srar_df(DF_BYTE, pws->b[4], pwt->b[4]);
5061 pwd->b[5] = msa_srar_df(DF_BYTE, pws->b[5], pwt->b[5]);
5062 pwd->b[6] = msa_srar_df(DF_BYTE, pws->b[6], pwt->b[6]);
5063 pwd->b[7] = msa_srar_df(DF_BYTE, pws->b[7], pwt->b[7]);
5064 pwd->b[8] = msa_srar_df(DF_BYTE, pws->b[8], pwt->b[8]);
5065 pwd->b[9] = msa_srar_df(DF_BYTE, pws->b[9], pwt->b[9]);
5066 pwd->b[10] = msa_srar_df(DF_BYTE, pws->b[10], pwt->b[10]);
5067 pwd->b[11] = msa_srar_df(DF_BYTE, pws->b[11], pwt->b[11]);
5068 pwd->b[12] = msa_srar_df(DF_BYTE, pws->b[12], pwt->b[12]);
5069 pwd->b[13] = msa_srar_df(DF_BYTE, pws->b[13], pwt->b[13]);
5070 pwd->b[14] = msa_srar_df(DF_BYTE, pws->b[14], pwt->b[14]);
5071 pwd->b[15] = msa_srar_df(DF_BYTE, pws->b[15], pwt->b[15]);
5072 }
5073
5074 void helper_msa_srar_h(CPUMIPSState *env,
5075 uint32_t wd, uint32_t ws, uint32_t wt)
5076 {
5077 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5078 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5079 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
5080
5081 pwd->h[0] = msa_srar_df(DF_HALF, pws->h[0], pwt->h[0]);
5082 pwd->h[1] = msa_srar_df(DF_HALF, pws->h[1], pwt->h[1]);
5083 pwd->h[2] = msa_srar_df(DF_HALF, pws->h[2], pwt->h[2]);
5084 pwd->h[3] = msa_srar_df(DF_HALF, pws->h[3], pwt->h[3]);
5085 pwd->h[4] = msa_srar_df(DF_HALF, pws->h[4], pwt->h[4]);
5086 pwd->h[5] = msa_srar_df(DF_HALF, pws->h[5], pwt->h[5]);
5087 pwd->h[6] = msa_srar_df(DF_HALF, pws->h[6], pwt->h[6]);
5088 pwd->h[7] = msa_srar_df(DF_HALF, pws->h[7], pwt->h[7]);
5089 }
5090
5091 void helper_msa_srar_w(CPUMIPSState *env,
5092 uint32_t wd, uint32_t ws, uint32_t wt)
5093 {
5094 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5095 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5096 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
5097
5098 pwd->w[0] = msa_srar_df(DF_WORD, pws->w[0], pwt->w[0]);
5099 pwd->w[1] = msa_srar_df(DF_WORD, pws->w[1], pwt->w[1]);
5100 pwd->w[2] = msa_srar_df(DF_WORD, pws->w[2], pwt->w[2]);
5101 pwd->w[3] = msa_srar_df(DF_WORD, pws->w[3], pwt->w[3]);
5102 }
5103
5104 void helper_msa_srar_d(CPUMIPSState *env,
5105 uint32_t wd, uint32_t ws, uint32_t wt)
5106 {
5107 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5108 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5109 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
5110
5111 pwd->d[0] = msa_srar_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
5112 pwd->d[1] = msa_srar_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
5113 }
5114
5115
5116 static inline int64_t msa_srl_df(uint32_t df, int64_t arg1, int64_t arg2)
5117 {
5118 uint64_t u_arg1 = UNSIGNED(arg1, df);
5119 int32_t b_arg2 = BIT_POSITION(arg2, df);
5120 return u_arg1 >> b_arg2;
5121 }
5122
5123 void helper_msa_srl_b(CPUMIPSState *env,
5124 uint32_t wd, uint32_t ws, uint32_t wt)
5125 {
5126 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5127 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5128 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
5129
5130 pwd->b[0] = msa_srl_df(DF_BYTE, pws->b[0], pwt->b[0]);
5131 pwd->b[1] = msa_srl_df(DF_BYTE, pws->b[1], pwt->b[1]);
5132 pwd->b[2] = msa_srl_df(DF_BYTE, pws->b[2], pwt->b[2]);
5133 pwd->b[3] = msa_srl_df(DF_BYTE, pws->b[3], pwt->b[3]);
5134 pwd->b[4] = msa_srl_df(DF_BYTE, pws->b[4], pwt->b[4]);
5135 pwd->b[5] = msa_srl_df(DF_BYTE, pws->b[5], pwt->b[5]);
5136 pwd->b[6] = msa_srl_df(DF_BYTE, pws->b[6], pwt->b[6]);
5137 pwd->b[7] = msa_srl_df(DF_BYTE, pws->b[7], pwt->b[7]);
5138 pwd->b[8] = msa_srl_df(DF_BYTE, pws->b[8], pwt->b[8]);
5139 pwd->b[9] = msa_srl_df(DF_BYTE, pws->b[9], pwt->b[9]);
5140 pwd->b[10] = msa_srl_df(DF_BYTE, pws->b[10], pwt->b[10]);
5141 pwd->b[11] = msa_srl_df(DF_BYTE, pws->b[11], pwt->b[11]);
5142 pwd->b[12] = msa_srl_df(DF_BYTE, pws->b[12], pwt->b[12]);
5143 pwd->b[13] = msa_srl_df(DF_BYTE, pws->b[13], pwt->b[13]);
5144 pwd->b[14] = msa_srl_df(DF_BYTE, pws->b[14], pwt->b[14]);
5145 pwd->b[15] = msa_srl_df(DF_BYTE, pws->b[15], pwt->b[15]);
5146 }
5147
5148 void helper_msa_srl_h(CPUMIPSState *env,
5149 uint32_t wd, uint32_t ws, uint32_t wt)
5150 {
5151 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5152 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5153 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
5154
5155 pwd->h[0] = msa_srl_df(DF_HALF, pws->h[0], pwt->h[0]);
5156 pwd->h[1] = msa_srl_df(DF_HALF, pws->h[1], pwt->h[1]);
5157 pwd->h[2] = msa_srl_df(DF_HALF, pws->h[2], pwt->h[2]);
5158 pwd->h[3] = msa_srl_df(DF_HALF, pws->h[3], pwt->h[3]);
5159 pwd->h[4] = msa_srl_df(DF_HALF, pws->h[4], pwt->h[4]);
5160 pwd->h[5] = msa_srl_df(DF_HALF, pws->h[5], pwt->h[5]);
5161 pwd->h[6] = msa_srl_df(DF_HALF, pws->h[6], pwt->h[6]);
5162 pwd->h[7] = msa_srl_df(DF_HALF, pws->h[7], pwt->h[7]);
5163 }
5164
5165 void helper_msa_srl_w(CPUMIPSState *env,
5166 uint32_t wd, uint32_t ws, uint32_t wt)
5167 {
5168 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5169 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5170 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
5171
5172 pwd->w[0] = msa_srl_df(DF_WORD, pws->w[0], pwt->w[0]);
5173 pwd->w[1] = msa_srl_df(DF_WORD, pws->w[1], pwt->w[1]);
5174 pwd->w[2] = msa_srl_df(DF_WORD, pws->w[2], pwt->w[2]);
5175 pwd->w[3] = msa_srl_df(DF_WORD, pws->w[3], pwt->w[3]);
5176 }
5177
5178 void helper_msa_srl_d(CPUMIPSState *env,
5179 uint32_t wd, uint32_t ws, uint32_t wt)
5180 {
5181 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5182 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5183 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
5184
5185 pwd->d[0] = msa_srl_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
5186 pwd->d[1] = msa_srl_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
5187 }
5188
5189
5190 static inline int64_t msa_srlr_df(uint32_t df, int64_t arg1, int64_t arg2)
5191 {
5192 uint64_t u_arg1 = UNSIGNED(arg1, df);
5193 int32_t b_arg2 = BIT_POSITION(arg2, df);
5194 if (b_arg2 == 0) {
5195 return u_arg1;
5196 } else {
5197 uint64_t r_bit = (u_arg1 >> (b_arg2 - 1)) & 1;
5198 return (u_arg1 >> b_arg2) + r_bit;
5199 }
5200 }
5201
5202 void helper_msa_srlr_b(CPUMIPSState *env,
5203 uint32_t wd, uint32_t ws, uint32_t wt)
5204 {
5205 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5206 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5207 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
5208
5209 pwd->b[0] = msa_srlr_df(DF_BYTE, pws->b[0], pwt->b[0]);
5210 pwd->b[1] = msa_srlr_df(DF_BYTE, pws->b[1], pwt->b[1]);
5211 pwd->b[2] = msa_srlr_df(DF_BYTE, pws->b[2], pwt->b[2]);
5212 pwd->b[3] = msa_srlr_df(DF_BYTE, pws->b[3], pwt->b[3]);
5213 pwd->b[4] = msa_srlr_df(DF_BYTE, pws->b[4], pwt->b[4]);
5214 pwd->b[5] = msa_srlr_df(DF_BYTE, pws->b[5], pwt->b[5]);
5215 pwd->b[6] = msa_srlr_df(DF_BYTE, pws->b[6], pwt->b[6]);
5216 pwd->b[7] = msa_srlr_df(DF_BYTE, pws->b[7], pwt->b[7]);
5217 pwd->b[8] = msa_srlr_df(DF_BYTE, pws->b[8], pwt->b[8]);
5218 pwd->b[9] = msa_srlr_df(DF_BYTE, pws->b[9], pwt->b[9]);
5219 pwd->b[10] = msa_srlr_df(DF_BYTE, pws->b[10], pwt->b[10]);
5220 pwd->b[11] = msa_srlr_df(DF_BYTE, pws->b[11], pwt->b[11]);
5221 pwd->b[12] = msa_srlr_df(DF_BYTE, pws->b[12], pwt->b[12]);
5222 pwd->b[13] = msa_srlr_df(DF_BYTE, pws->b[13], pwt->b[13]);
5223 pwd->b[14] = msa_srlr_df(DF_BYTE, pws->b[14], pwt->b[14]);
5224 pwd->b[15] = msa_srlr_df(DF_BYTE, pws->b[15], pwt->b[15]);
5225 }
5226
5227 void helper_msa_srlr_h(CPUMIPSState *env,
5228 uint32_t wd, uint32_t ws, uint32_t wt)
5229 {
5230 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5231 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5232 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
5233
5234 pwd->h[0] = msa_srlr_df(DF_HALF, pws->h[0], pwt->h[0]);
5235 pwd->h[1] = msa_srlr_df(DF_HALF, pws->h[1], pwt->h[1]);
5236 pwd->h[2] = msa_srlr_df(DF_HALF, pws->h[2], pwt->h[2]);
5237 pwd->h[3] = msa_srlr_df(DF_HALF, pws->h[3], pwt->h[3]);
5238 pwd->h[4] = msa_srlr_df(DF_HALF, pws->h[4], pwt->h[4]);
5239 pwd->h[5] = msa_srlr_df(DF_HALF, pws->h[5], pwt->h[5]);
5240 pwd->h[6] = msa_srlr_df(DF_HALF, pws->h[6], pwt->h[6]);
5241 pwd->h[7] = msa_srlr_df(DF_HALF, pws->h[7], pwt->h[7]);
5242 }
5243
5244 void helper_msa_srlr_w(CPUMIPSState *env,
5245 uint32_t wd, uint32_t ws, uint32_t wt)
5246 {
5247 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5248 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5249 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
5250
5251 pwd->w[0] = msa_srlr_df(DF_WORD, pws->w[0], pwt->w[0]);
5252 pwd->w[1] = msa_srlr_df(DF_WORD, pws->w[1], pwt->w[1]);
5253 pwd->w[2] = msa_srlr_df(DF_WORD, pws->w[2], pwt->w[2]);
5254 pwd->w[3] = msa_srlr_df(DF_WORD, pws->w[3], pwt->w[3]);
5255 }
5256
5257 void helper_msa_srlr_d(CPUMIPSState *env,
5258 uint32_t wd, uint32_t ws, uint32_t wt)
5259 {
5260 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5261 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5262 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
5263
5264 pwd->d[0] = msa_srlr_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
5265 pwd->d[1] = msa_srlr_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
5266 }
5267
5268
5269 #define MSA_FN_IMM8(FUNC, DEST, OPERATION) \
5270 void helper_msa_ ## FUNC(CPUMIPSState *env, uint32_t wd, uint32_t ws, \
5271 uint32_t i8) \
5272 { \
5273 wr_t *pwd = &(env->active_fpu.fpr[wd].wr); \
5274 wr_t *pws = &(env->active_fpu.fpr[ws].wr); \
5275 uint32_t i; \
5276 for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) { \
5277 DEST = OPERATION; \
5278 } \
5279 }
5280
5281 MSA_FN_IMM8(andi_b, pwd->b[i], pws->b[i] & i8)
5282 MSA_FN_IMM8(ori_b, pwd->b[i], pws->b[i] | i8)
5283 MSA_FN_IMM8(nori_b, pwd->b[i], ~(pws->b[i] | i8))
5284 MSA_FN_IMM8(xori_b, pwd->b[i], pws->b[i] ^ i8)
5285
5286 #define BIT_MOVE_IF_NOT_ZERO(dest, arg1, arg2, df) \
5287 UNSIGNED(((dest & (~arg2)) | (arg1 & arg2)), df)
5288 MSA_FN_IMM8(bmnzi_b, pwd->b[i],
5289 BIT_MOVE_IF_NOT_ZERO(pwd->b[i], pws->b[i], i8, DF_BYTE))
5290
5291 #define BIT_MOVE_IF_ZERO(dest, arg1, arg2, df) \
5292 UNSIGNED((dest & arg2) | (arg1 & (~arg2)), df)
5293 MSA_FN_IMM8(bmzi_b, pwd->b[i],
5294 BIT_MOVE_IF_ZERO(pwd->b[i], pws->b[i], i8, DF_BYTE))
5295
5296 #define BIT_SELECT(dest, arg1, arg2, df) \
5297 UNSIGNED((arg1 & (~dest)) | (arg2 & dest), df)
5298 MSA_FN_IMM8(bseli_b, pwd->b[i],
5299 BIT_SELECT(pwd->b[i], pws->b[i], i8, DF_BYTE))
5300
5301 #undef BIT_SELECT
5302 #undef BIT_MOVE_IF_ZERO
5303 #undef BIT_MOVE_IF_NOT_ZERO
5304 #undef MSA_FN_IMM8
5305
5306 #define SHF_POS(i, imm) (((i) & 0xfc) + (((imm) >> (2 * ((i) & 0x03))) & 0x03))
5307
5308 void helper_msa_shf_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
5309 uint32_t ws, uint32_t imm)
5310 {
5311 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5312 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5313 wr_t wx, *pwx = &wx;
5314 uint32_t i;
5315
5316 switch (df) {
5317 case DF_BYTE:
5318 for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) {
5319 pwx->b[i] = pws->b[SHF_POS(i, imm)];
5320 }
5321 break;
5322 case DF_HALF:
5323 for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) {
5324 pwx->h[i] = pws->h[SHF_POS(i, imm)];
5325 }
5326 break;
5327 case DF_WORD:
5328 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
5329 pwx->w[i] = pws->w[SHF_POS(i, imm)];
5330 }
5331 break;
5332 default:
5333 assert(0);
5334 }
5335 msa_move_v(pwd, pwx);
5336 }
5337
5338 #define MSA_BINOP_IMM_DF(helper, func) \
5339 void helper_msa_ ## helper ## _df(CPUMIPSState *env, uint32_t df, \
5340 uint32_t wd, uint32_t ws, int32_t u5) \
5341 { \
5342 wr_t *pwd = &(env->active_fpu.fpr[wd].wr); \
5343 wr_t *pws = &(env->active_fpu.fpr[ws].wr); \
5344 uint32_t i; \
5345 \
5346 switch (df) { \
5347 case DF_BYTE: \
5348 for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) { \
5349 pwd->b[i] = msa_ ## func ## _df(df, pws->b[i], u5); \
5350 } \
5351 break; \
5352 case DF_HALF: \
5353 for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) { \
5354 pwd->h[i] = msa_ ## func ## _df(df, pws->h[i], u5); \
5355 } \
5356 break; \
5357 case DF_WORD: \
5358 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { \
5359 pwd->w[i] = msa_ ## func ## _df(df, pws->w[i], u5); \
5360 } \
5361 break; \
5362 case DF_DOUBLE: \
5363 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { \
5364 pwd->d[i] = msa_ ## func ## _df(df, pws->d[i], u5); \
5365 } \
5366 break; \
5367 default: \
5368 assert(0); \
5369 } \
5370 }
5371
5372 MSA_BINOP_IMM_DF(addvi, addv)
5373 MSA_BINOP_IMM_DF(subvi, subv)
5374 MSA_BINOP_IMM_DF(ceqi, ceq)
5375 MSA_BINOP_IMM_DF(clei_s, cle_s)
5376 MSA_BINOP_IMM_DF(clei_u, cle_u)
5377 MSA_BINOP_IMM_DF(clti_s, clt_s)
5378 MSA_BINOP_IMM_DF(clti_u, clt_u)
5379 MSA_BINOP_IMM_DF(maxi_s, max_s)
5380 MSA_BINOP_IMM_DF(maxi_u, max_u)
5381 MSA_BINOP_IMM_DF(mini_s, min_s)
5382 MSA_BINOP_IMM_DF(mini_u, min_u)
5383 #undef MSA_BINOP_IMM_DF
5384
5385 void helper_msa_ldi_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
5386 int32_t s10)
5387 {
5388 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5389 uint32_t i;
5390
5391 switch (df) {
5392 case DF_BYTE:
5393 for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) {
5394 pwd->b[i] = (int8_t)s10;
5395 }
5396 break;
5397 case DF_HALF:
5398 for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) {
5399 pwd->h[i] = (int16_t)s10;
5400 }
5401 break;
5402 case DF_WORD:
5403 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
5404 pwd->w[i] = (int32_t)s10;
5405 }
5406 break;
5407 case DF_DOUBLE:
5408 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
5409 pwd->d[i] = (int64_t)s10;
5410 }
5411 break;
5412 default:
5413 assert(0);
5414 }
5415 }
5416
5417 static inline int64_t msa_sat_s_df(uint32_t df, int64_t arg, uint32_t m)
5418 {
5419 return arg < M_MIN_INT(m + 1) ? M_MIN_INT(m + 1) :
5420 arg > M_MAX_INT(m + 1) ? M_MAX_INT(m + 1) :
5421 arg;
5422 }
5423
5424 static inline int64_t msa_sat_u_df(uint32_t df, int64_t arg, uint32_t m)
5425 {
5426 uint64_t u_arg = UNSIGNED(arg, df);
5427 return u_arg < M_MAX_UINT(m + 1) ? u_arg :
5428 M_MAX_UINT(m + 1);
5429 }
5430
5431 #define MSA_BINOP_IMMU_DF(helper, func) \
5432 void helper_msa_ ## helper ## _df(CPUMIPSState *env, uint32_t df, uint32_t wd, \
5433 uint32_t ws, uint32_t u5) \
5434 { \
5435 wr_t *pwd = &(env->active_fpu.fpr[wd].wr); \
5436 wr_t *pws = &(env->active_fpu.fpr[ws].wr); \
5437 uint32_t i; \
5438 \
5439 switch (df) { \
5440 case DF_BYTE: \
5441 for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) { \
5442 pwd->b[i] = msa_ ## func ## _df(df, pws->b[i], u5); \
5443 } \
5444 break; \
5445 case DF_HALF: \
5446 for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) { \
5447 pwd->h[i] = msa_ ## func ## _df(df, pws->h[i], u5); \
5448 } \
5449 break; \
5450 case DF_WORD: \
5451 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { \
5452 pwd->w[i] = msa_ ## func ## _df(df, pws->w[i], u5); \
5453 } \
5454 break; \
5455 case DF_DOUBLE: \
5456 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { \
5457 pwd->d[i] = msa_ ## func ## _df(df, pws->d[i], u5); \
5458 } \
5459 break; \
5460 default: \
5461 assert(0); \
5462 } \
5463 }
5464
5465 MSA_BINOP_IMMU_DF(slli, sll)
5466 MSA_BINOP_IMMU_DF(srai, sra)
5467 MSA_BINOP_IMMU_DF(srli, srl)
5468 MSA_BINOP_IMMU_DF(bclri, bclr)
5469 MSA_BINOP_IMMU_DF(bseti, bset)
5470 MSA_BINOP_IMMU_DF(bnegi, bneg)
5471 MSA_BINOP_IMMU_DF(sat_s, sat_s)
5472 MSA_BINOP_IMMU_DF(sat_u, sat_u)
5473 MSA_BINOP_IMMU_DF(srari, srar)
5474 MSA_BINOP_IMMU_DF(srlri, srlr)
5475 #undef MSA_BINOP_IMMU_DF
5476
5477 #define MSA_TEROP_IMMU_DF(helper, func) \
5478 void helper_msa_ ## helper ## _df(CPUMIPSState *env, uint32_t df, \
5479 uint32_t wd, uint32_t ws, uint32_t u5) \
5480 { \
5481 wr_t *pwd = &(env->active_fpu.fpr[wd].wr); \
5482 wr_t *pws = &(env->active_fpu.fpr[ws].wr); \
5483 uint32_t i; \
5484 \
5485 switch (df) { \
5486 case DF_BYTE: \
5487 for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) { \
5488 pwd->b[i] = msa_ ## func ## _df(df, pwd->b[i], pws->b[i], \
5489 u5); \
5490 } \
5491 break; \
5492 case DF_HALF: \
5493 for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) { \
5494 pwd->h[i] = msa_ ## func ## _df(df, pwd->h[i], pws->h[i], \
5495 u5); \
5496 } \
5497 break; \
5498 case DF_WORD: \
5499 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { \
5500 pwd->w[i] = msa_ ## func ## _df(df, pwd->w[i], pws->w[i], \
5501 u5); \
5502 } \
5503 break; \
5504 case DF_DOUBLE: \
5505 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { \
5506 pwd->d[i] = msa_ ## func ## _df(df, pwd->d[i], pws->d[i], \
5507 u5); \
5508 } \
5509 break; \
5510 default: \
5511 assert(0); \
5512 } \
5513 }
5514
5515 MSA_TEROP_IMMU_DF(binsli, binsl)
5516 MSA_TEROP_IMMU_DF(binsri, binsr)
5517 #undef MSA_TEROP_IMMU_DF
5518
5519 #define CONCATENATE_AND_SLIDE(s, k) \
5520 do { \
5521 for (i = 0; i < s; i++) { \
5522 v[i] = pws->b[s * k + i]; \
5523 v[i + s] = pwd->b[s * k + i]; \
5524 } \
5525 for (i = 0; i < s; i++) { \
5526 pwd->b[s * k + i] = v[i + n]; \
5527 } \
5528 } while (0)
5529
5530 static inline void msa_sld_df(uint32_t df, wr_t *pwd,
5531 wr_t *pws, target_ulong rt)
5532 {
5533 uint32_t n = rt % DF_ELEMENTS(df);
5534 uint8_t v[64];
5535 uint32_t i, k;
5536
5537 switch (df) {
5538 case DF_BYTE:
5539 CONCATENATE_AND_SLIDE(DF_ELEMENTS(DF_BYTE), 0);
5540 break;
5541 case DF_HALF:
5542 for (k = 0; k < 2; k++) {
5543 CONCATENATE_AND_SLIDE(DF_ELEMENTS(DF_HALF), k);
5544 }
5545 break;
5546 case DF_WORD:
5547 for (k = 0; k < 4; k++) {
5548 CONCATENATE_AND_SLIDE(DF_ELEMENTS(DF_WORD), k);
5549 }
5550 break;
5551 case DF_DOUBLE:
5552 for (k = 0; k < 8; k++) {
5553 CONCATENATE_AND_SLIDE(DF_ELEMENTS(DF_DOUBLE), k);
5554 }
5555 break;
5556 default:
5557 assert(0);
5558 }
5559 }
5560
5561 static inline int64_t msa_mul_q_df(uint32_t df, int64_t arg1, int64_t arg2)
5562 {
5563 int64_t q_min = DF_MIN_INT(df);
5564 int64_t q_max = DF_MAX_INT(df);
5565
5566 if (arg1 == q_min && arg2 == q_min) {
5567 return q_max;
5568 }
5569 return (arg1 * arg2) >> (DF_BITS(df) - 1);
5570 }
5571
5572 static inline int64_t msa_mulr_q_df(uint32_t df, int64_t arg1, int64_t arg2)
5573 {
5574 int64_t q_min = DF_MIN_INT(df);
5575 int64_t q_max = DF_MAX_INT(df);
5576 int64_t r_bit = 1 << (DF_BITS(df) - 2);
5577
5578 if (arg1 == q_min && arg2 == q_min) {
5579 return q_max;
5580 }
5581 return (arg1 * arg2 + r_bit) >> (DF_BITS(df) - 1);
5582 }
5583
5584 #define MSA_BINOP_DF(func) \
5585 void helper_msa_ ## func ## _df(CPUMIPSState *env, uint32_t df, \
5586 uint32_t wd, uint32_t ws, uint32_t wt) \
5587 { \
5588 wr_t *pwd = &(env->active_fpu.fpr[wd].wr); \
5589 wr_t *pws = &(env->active_fpu.fpr[ws].wr); \
5590 wr_t *pwt = &(env->active_fpu.fpr[wt].wr); \
5591 \
5592 switch (df) { \
5593 case DF_BYTE: \
5594 pwd->b[0] = msa_ ## func ## _df(df, pws->b[0], pwt->b[0]); \
5595 pwd->b[1] = msa_ ## func ## _df(df, pws->b[1], pwt->b[1]); \
5596 pwd->b[2] = msa_ ## func ## _df(df, pws->b[2], pwt->b[2]); \
5597 pwd->b[3] = msa_ ## func ## _df(df, pws->b[3], pwt->b[3]); \
5598 pwd->b[4] = msa_ ## func ## _df(df, pws->b[4], pwt->b[4]); \
5599 pwd->b[5] = msa_ ## func ## _df(df, pws->b[5], pwt->b[5]); \
5600 pwd->b[6] = msa_ ## func ## _df(df, pws->b[6], pwt->b[6]); \
5601 pwd->b[7] = msa_ ## func ## _df(df, pws->b[7], pwt->b[7]); \
5602 pwd->b[8] = msa_ ## func ## _df(df, pws->b[8], pwt->b[8]); \
5603 pwd->b[9] = msa_ ## func ## _df(df, pws->b[9], pwt->b[9]); \
5604 pwd->b[10] = msa_ ## func ## _df(df, pws->b[10], pwt->b[10]); \
5605 pwd->b[11] = msa_ ## func ## _df(df, pws->b[11], pwt->b[11]); \
5606 pwd->b[12] = msa_ ## func ## _df(df, pws->b[12], pwt->b[12]); \
5607 pwd->b[13] = msa_ ## func ## _df(df, pws->b[13], pwt->b[13]); \
5608 pwd->b[14] = msa_ ## func ## _df(df, pws->b[14], pwt->b[14]); \
5609 pwd->b[15] = msa_ ## func ## _df(df, pws->b[15], pwt->b[15]); \
5610 break; \
5611 case DF_HALF: \
5612 pwd->h[0] = msa_ ## func ## _df(df, pws->h[0], pwt->h[0]); \
5613 pwd->h[1] = msa_ ## func ## _df(df, pws->h[1], pwt->h[1]); \
5614 pwd->h[2] = msa_ ## func ## _df(df, pws->h[2], pwt->h[2]); \
5615 pwd->h[3] = msa_ ## func ## _df(df, pws->h[3], pwt->h[3]); \
5616 pwd->h[4] = msa_ ## func ## _df(df, pws->h[4], pwt->h[4]); \
5617 pwd->h[5] = msa_ ## func ## _df(df, pws->h[5], pwt->h[5]); \
5618 pwd->h[6] = msa_ ## func ## _df(df, pws->h[6], pwt->h[6]); \
5619 pwd->h[7] = msa_ ## func ## _df(df, pws->h[7], pwt->h[7]); \
5620 break; \
5621 case DF_WORD: \
5622 pwd->w[0] = msa_ ## func ## _df(df, pws->w[0], pwt->w[0]); \
5623 pwd->w[1] = msa_ ## func ## _df(df, pws->w[1], pwt->w[1]); \
5624 pwd->w[2] = msa_ ## func ## _df(df, pws->w[2], pwt->w[2]); \
5625 pwd->w[3] = msa_ ## func ## _df(df, pws->w[3], pwt->w[3]); \
5626 break; \
5627 case DF_DOUBLE: \
5628 pwd->d[0] = msa_ ## func ## _df(df, pws->d[0], pwt->d[0]); \
5629 pwd->d[1] = msa_ ## func ## _df(df, pws->d[1], pwt->d[1]); \
5630 break; \
5631 default: \
5632 assert(0); \
5633 } \
5634 }
5635
5636 MSA_BINOP_DF(mul_q)
5637 MSA_BINOP_DF(mulr_q)
5638 #undef MSA_BINOP_DF
5639
5640 void helper_msa_sld_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
5641 uint32_t ws, uint32_t rt)
5642 {
5643 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5644 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5645
5646 msa_sld_df(df, pwd, pws, env->active_tc.gpr[rt]);
5647 }
5648
5649 static inline int64_t msa_madd_q_df(uint32_t df, int64_t dest, int64_t arg1,
5650 int64_t arg2)
5651 {
5652 int64_t q_prod, q_ret;
5653
5654 int64_t q_max = DF_MAX_INT(df);
5655 int64_t q_min = DF_MIN_INT(df);
5656
5657 q_prod = arg1 * arg2;
5658 q_ret = ((dest << (DF_BITS(df) - 1)) + q_prod) >> (DF_BITS(df) - 1);
5659
5660 return (q_ret < q_min) ? q_min : (q_max < q_ret) ? q_max : q_ret;
5661 }
5662
5663 static inline int64_t msa_msub_q_df(uint32_t df, int64_t dest, int64_t arg1,
5664 int64_t arg2)
5665 {
5666 int64_t q_prod, q_ret;
5667
5668 int64_t q_max = DF_MAX_INT(df);
5669 int64_t q_min = DF_MIN_INT(df);
5670
5671 q_prod = arg1 * arg2;
5672 q_ret = ((dest << (DF_BITS(df) - 1)) - q_prod) >> (DF_BITS(df) - 1);
5673
5674 return (q_ret < q_min) ? q_min : (q_max < q_ret) ? q_max : q_ret;
5675 }
5676
5677 static inline int64_t msa_maddr_q_df(uint32_t df, int64_t dest, int64_t arg1,
5678 int64_t arg2)
5679 {
5680 int64_t q_prod, q_ret;
5681
5682 int64_t q_max = DF_MAX_INT(df);
5683 int64_t q_min = DF_MIN_INT(df);
5684 int64_t r_bit = 1 << (DF_BITS(df) - 2);
5685
5686 q_prod = arg1 * arg2;
5687 q_ret = ((dest << (DF_BITS(df) - 1)) + q_prod + r_bit) >> (DF_BITS(df) - 1);
5688
5689 return (q_ret < q_min) ? q_min : (q_max < q_ret) ? q_max : q_ret;
5690 }
5691
5692 static inline int64_t msa_msubr_q_df(uint32_t df, int64_t dest, int64_t arg1,
5693 int64_t arg2)
5694 {
5695 int64_t q_prod, q_ret;
5696
5697 int64_t q_max = DF_MAX_INT(df);
5698 int64_t q_min = DF_MIN_INT(df);
5699 int64_t r_bit = 1 << (DF_BITS(df) - 2);
5700
5701 q_prod = arg1 * arg2;
5702 q_ret = ((dest << (DF_BITS(df) - 1)) - q_prod + r_bit) >> (DF_BITS(df) - 1);
5703
5704 return (q_ret < q_min) ? q_min : (q_max < q_ret) ? q_max : q_ret;
5705 }
5706
5707 #define MSA_TEROP_DF(func) \
5708 void helper_msa_ ## func ## _df(CPUMIPSState *env, uint32_t df, uint32_t wd, \
5709 uint32_t ws, uint32_t wt) \
5710 { \
5711 wr_t *pwd = &(env->active_fpu.fpr[wd].wr); \
5712 wr_t *pws = &(env->active_fpu.fpr[ws].wr); \
5713 wr_t *pwt = &(env->active_fpu.fpr[wt].wr); \
5714 \
5715 switch (df) { \
5716 case DF_BYTE: \
5717 pwd->b[0] = msa_ ## func ## _df(df, pwd->b[0], pws->b[0], \
5718 pwt->b[0]); \
5719 pwd->b[1] = msa_ ## func ## _df(df, pwd->b[1], pws->b[1], \
5720 pwt->b[1]); \
5721 pwd->b[2] = msa_ ## func ## _df(df, pwd->b[2], pws->b[2], \
5722 pwt->b[2]); \
5723 pwd->b[3] = msa_ ## func ## _df(df, pwd->b[3], pws->b[3], \
5724 pwt->b[3]); \
5725 pwd->b[4] = msa_ ## func ## _df(df, pwd->b[4], pws->b[4], \
5726 pwt->b[4]); \
5727 pwd->b[5] = msa_ ## func ## _df(df, pwd->b[5], pws->b[5], \
5728 pwt->b[5]); \
5729 pwd->b[6] = msa_ ## func ## _df(df, pwd->b[6], pws->b[6], \
5730 pwt->b[6]); \
5731 pwd->b[7] = msa_ ## func ## _df(df, pwd->b[7], pws->b[7], \
5732 pwt->b[7]); \
5733 pwd->b[8] = msa_ ## func ## _df(df, pwd->b[8], pws->b[8], \
5734 pwt->b[8]); \
5735 pwd->b[9] = msa_ ## func ## _df(df, pwd->b[9], pws->b[9], \
5736 pwt->b[9]); \
5737 pwd->b[10] = msa_ ## func ## _df(df, pwd->b[10], pws->b[10], \
5738 pwt->b[10]); \
5739 pwd->b[11] = msa_ ## func ## _df(df, pwd->b[11], pws->b[11], \
5740 pwt->b[11]); \
5741 pwd->b[12] = msa_ ## func ## _df(df, pwd->b[12], pws->b[12], \
5742 pwt->b[12]); \
5743 pwd->b[13] = msa_ ## func ## _df(df, pwd->b[13], pws->b[13], \
5744 pwt->b[13]); \
5745 pwd->b[14] = msa_ ## func ## _df(df, pwd->b[14], pws->b[14], \
5746 pwt->b[14]); \
5747 pwd->b[15] = msa_ ## func ## _df(df, pwd->b[15], pws->b[15], \
5748 pwt->b[15]); \
5749 break; \
5750 case DF_HALF: \
5751 pwd->h[0] = msa_ ## func ## _df(df, pwd->h[0], pws->h[0], pwt->h[0]); \
5752 pwd->h[1] = msa_ ## func ## _df(df, pwd->h[1], pws->h[1], pwt->h[1]); \
5753 pwd->h[2] = msa_ ## func ## _df(df, pwd->h[2], pws->h[2], pwt->h[2]); \
5754 pwd->h[3] = msa_ ## func ## _df(df, pwd->h[3], pws->h[3], pwt->h[3]); \
5755 pwd->h[4] = msa_ ## func ## _df(df, pwd->h[4], pws->h[4], pwt->h[4]); \
5756 pwd->h[5] = msa_ ## func ## _df(df, pwd->h[5], pws->h[5], pwt->h[5]); \
5757 pwd->h[6] = msa_ ## func ## _df(df, pwd->h[6], pws->h[6], pwt->h[6]); \
5758 pwd->h[7] = msa_ ## func ## _df(df, pwd->h[7], pws->h[7], pwt->h[7]); \
5759 break; \
5760 case DF_WORD: \
5761 pwd->w[0] = msa_ ## func ## _df(df, pwd->w[0], pws->w[0], pwt->w[0]); \
5762 pwd->w[1] = msa_ ## func ## _df(df, pwd->w[1], pws->w[1], pwt->w[1]); \
5763 pwd->w[2] = msa_ ## func ## _df(df, pwd->w[2], pws->w[2], pwt->w[2]); \
5764 pwd->w[3] = msa_ ## func ## _df(df, pwd->w[3], pws->w[3], pwt->w[3]); \
5765 break; \
5766 case DF_DOUBLE: \
5767 pwd->d[0] = msa_ ## func ## _df(df, pwd->d[0], pws->d[0], pwt->d[0]); \
5768 pwd->d[1] = msa_ ## func ## _df(df, pwd->d[1], pws->d[1], pwt->d[1]); \
5769 break; \
5770 default: \
5771 assert(0); \
5772 } \
5773 }
5774
5775 MSA_TEROP_DF(binsl)
5776 MSA_TEROP_DF(binsr)
5777 MSA_TEROP_DF(madd_q)
5778 MSA_TEROP_DF(msub_q)
5779 MSA_TEROP_DF(maddr_q)
5780 MSA_TEROP_DF(msubr_q)
5781 #undef MSA_TEROP_DF
5782
5783 static inline void msa_splat_df(uint32_t df, wr_t *pwd,
5784 wr_t *pws, target_ulong rt)
5785 {
5786 uint32_t n = rt % DF_ELEMENTS(df);
5787 uint32_t i;
5788
5789 switch (df) {
5790 case DF_BYTE:
5791 for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) {
5792 pwd->b[i] = pws->b[n];
5793 }
5794 break;
5795 case DF_HALF:
5796 for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) {
5797 pwd->h[i] = pws->h[n];
5798 }
5799 break;
5800 case DF_WORD:
5801 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
5802 pwd->w[i] = pws->w[n];
5803 }
5804 break;
5805 case DF_DOUBLE:
5806 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
5807 pwd->d[i] = pws->d[n];
5808 }
5809 break;
5810 default:
5811 assert(0);
5812 }
5813 }
5814
5815 void helper_msa_splat_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
5816 uint32_t ws, uint32_t rt)
5817 {
5818 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5819 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5820
5821 msa_splat_df(df, pwd, pws, env->active_tc.gpr[rt]);
5822 }
5823
5824 #define MSA_DO_B MSA_DO(b)
5825 #define MSA_DO_H MSA_DO(h)
5826 #define MSA_DO_W MSA_DO(w)
5827 #define MSA_DO_D MSA_DO(d)
5828
5829 #define MSA_LOOP_B MSA_LOOP(B)
5830 #define MSA_LOOP_H MSA_LOOP(H)
5831 #define MSA_LOOP_W MSA_LOOP(W)
5832 #define MSA_LOOP_D MSA_LOOP(D)
5833
5834 #define MSA_LOOP_COND_B MSA_LOOP_COND(DF_BYTE)
5835 #define MSA_LOOP_COND_H MSA_LOOP_COND(DF_HALF)
5836 #define MSA_LOOP_COND_W MSA_LOOP_COND(DF_WORD)
5837 #define MSA_LOOP_COND_D MSA_LOOP_COND(DF_DOUBLE)
5838
5839 #define MSA_LOOP(DF) \
5840 do { \
5841 for (i = 0; i < (MSA_LOOP_COND_ ## DF) ; i++) { \
5842 MSA_DO_ ## DF; \
5843 } \
5844 } while (0)
5845
5846 #define MSA_FN_DF(FUNC) \
5847 void helper_msa_##FUNC(CPUMIPSState *env, uint32_t df, uint32_t wd, \
5848 uint32_t ws, uint32_t wt) \
5849 { \
5850 wr_t *pwd = &(env->active_fpu.fpr[wd].wr); \
5851 wr_t *pws = &(env->active_fpu.fpr[ws].wr); \
5852 wr_t *pwt = &(env->active_fpu.fpr[wt].wr); \
5853 wr_t wx, *pwx = &wx; \
5854 uint32_t i; \
5855 switch (df) { \
5856 case DF_BYTE: \
5857 MSA_LOOP_B; \
5858 break; \
5859 case DF_HALF: \
5860 MSA_LOOP_H; \
5861 break; \
5862 case DF_WORD: \
5863 MSA_LOOP_W; \
5864 break; \
5865 case DF_DOUBLE: \
5866 MSA_LOOP_D; \
5867 break; \
5868 default: \
5869 assert(0); \
5870 } \
5871 msa_move_v(pwd, pwx); \
5872 }
5873
5874 #define MSA_LOOP_COND(DF) \
5875 (DF_ELEMENTS(DF) / 2)
5876
5877 #define Rb(pwr, i) (pwr->b[i])
5878 #define Lb(pwr, i) (pwr->b[i + DF_ELEMENTS(DF_BYTE) / 2])
5879 #define Rh(pwr, i) (pwr->h[i])
5880 #define Lh(pwr, i) (pwr->h[i + DF_ELEMENTS(DF_HALF) / 2])
5881 #define Rw(pwr, i) (pwr->w[i])
5882 #define Lw(pwr, i) (pwr->w[i + DF_ELEMENTS(DF_WORD) / 2])
5883 #define Rd(pwr, i) (pwr->d[i])
5884 #define Ld(pwr, i) (pwr->d[i + DF_ELEMENTS(DF_DOUBLE) / 2])
5885
5886 #undef MSA_LOOP_COND
5887
5888 #define MSA_LOOP_COND(DF) \
5889 (DF_ELEMENTS(DF))
5890
5891 #define MSA_DO(DF) \
5892 do { \
5893 uint32_t n = DF_ELEMENTS(df); \
5894 uint32_t k = (pwd->DF[i] & 0x3f) % (2 * n); \
5895 pwx->DF[i] = \
5896 (pwd->DF[i] & 0xc0) ? 0 : k < n ? pwt->DF[k] : pws->DF[k - n]; \
5897 } while (0)
5898 MSA_FN_DF(vshf_df)
5899 #undef MSA_DO
5900 #undef MSA_LOOP_COND
5901 #undef MSA_FN_DF
5902
5903
5904 void helper_msa_sldi_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
5905 uint32_t ws, uint32_t n)
5906 {
5907 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5908 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5909
5910 msa_sld_df(df, pwd, pws, n);
5911 }
5912
5913 void helper_msa_splati_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
5914 uint32_t ws, uint32_t n)
5915 {
5916 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5917 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5918
5919 msa_splat_df(df, pwd, pws, n);
5920 }
5921
5922 void helper_msa_copy_s_b(CPUMIPSState *env, uint32_t rd,
5923 uint32_t ws, uint32_t n)
5924 {
5925 n %= 16;
5926 #if defined(HOST_WORDS_BIGENDIAN)
5927 if (n < 8) {
5928 n = 8 - n - 1;
5929 } else {
5930 n = 24 - n - 1;
5931 }
5932 #endif
5933 env->active_tc.gpr[rd] = (int8_t)env->active_fpu.fpr[ws].wr.b[n];
5934 }
5935
5936 void helper_msa_copy_s_h(CPUMIPSState *env, uint32_t rd,
5937 uint32_t ws, uint32_t n)
5938 {
5939 n %= 8;
5940 #if defined(HOST_WORDS_BIGENDIAN)
5941 if (n < 4) {
5942 n = 4 - n - 1;
5943 } else {
5944 n = 12 - n - 1;
5945 }
5946 #endif
5947 env->active_tc.gpr[rd] = (int16_t)env->active_fpu.fpr[ws].wr.h[n];
5948 }
5949
5950 void helper_msa_copy_s_w(CPUMIPSState *env, uint32_t rd,
5951 uint32_t ws, uint32_t n)
5952 {
5953 n %= 4;
5954 #if defined(HOST_WORDS_BIGENDIAN)
5955 if (n < 2) {
5956 n = 2 - n - 1;
5957 } else {
5958 n = 6 - n - 1;
5959 }
5960 #endif
5961 env->active_tc.gpr[rd] = (int32_t)env->active_fpu.fpr[ws].wr.w[n];
5962 }
5963
5964 void helper_msa_copy_s_d(CPUMIPSState *env, uint32_t rd,
5965 uint32_t ws, uint32_t n)
5966 {
5967 n %= 2;
5968 env->active_tc.gpr[rd] = (int64_t)env->active_fpu.fpr[ws].wr.d[n];
5969 }
5970
5971 void helper_msa_copy_u_b(CPUMIPSState *env, uint32_t rd,
5972 uint32_t ws, uint32_t n)
5973 {
5974 n %= 16;
5975 #if defined(HOST_WORDS_BIGENDIAN)
5976 if (n < 8) {
5977 n = 8 - n - 1;
5978 } else {
5979 n = 24 - n - 1;
5980 }
5981 #endif
5982 env->active_tc.gpr[rd] = (uint8_t)env->active_fpu.fpr[ws].wr.b[n];
5983 }
5984
5985 void helper_msa_copy_u_h(CPUMIPSState *env, uint32_t rd,
5986 uint32_t ws, uint32_t n)
5987 {
5988 n %= 8;
5989 #if defined(HOST_WORDS_BIGENDIAN)
5990 if (n < 4) {
5991 n = 4 - n - 1;
5992 } else {
5993 n = 12 - n - 1;
5994 }
5995 #endif
5996 env->active_tc.gpr[rd] = (uint16_t)env->active_fpu.fpr[ws].wr.h[n];
5997 }
5998
5999 void helper_msa_copy_u_w(CPUMIPSState *env, uint32_t rd,
6000 uint32_t ws, uint32_t n)
6001 {
6002 n %= 4;
6003 #if defined(HOST_WORDS_BIGENDIAN)
6004 if (n < 2) {
6005 n = 2 - n - 1;
6006 } else {
6007 n = 6 - n - 1;
6008 }
6009 #endif
6010 env->active_tc.gpr[rd] = (uint32_t)env->active_fpu.fpr[ws].wr.w[n];
6011 }
6012
6013 void helper_msa_insert_b(CPUMIPSState *env, uint32_t wd,
6014 uint32_t rs_num, uint32_t n)
6015 {
6016 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6017 target_ulong rs = env->active_tc.gpr[rs_num];
6018 n %= 16;
6019 #if defined(HOST_WORDS_BIGENDIAN)
6020 if (n < 8) {
6021 n = 8 - n - 1;
6022 } else {
6023 n = 24 - n - 1;
6024 }
6025 #endif
6026 pwd->b[n] = (int8_t)rs;
6027 }
6028
6029 void helper_msa_insert_h(CPUMIPSState *env, uint32_t wd,
6030 uint32_t rs_num, uint32_t n)
6031 {
6032 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6033 target_ulong rs = env->active_tc.gpr[rs_num];
6034 n %= 8;
6035 #if defined(HOST_WORDS_BIGENDIAN)
6036 if (n < 4) {
6037 n = 4 - n - 1;
6038 } else {
6039 n = 12 - n - 1;
6040 }
6041 #endif
6042 pwd->h[n] = (int16_t)rs;
6043 }
6044
6045 void helper_msa_insert_w(CPUMIPSState *env, uint32_t wd,
6046 uint32_t rs_num, uint32_t n)
6047 {
6048 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6049 target_ulong rs = env->active_tc.gpr[rs_num];
6050 n %= 4;
6051 #if defined(HOST_WORDS_BIGENDIAN)
6052 if (n < 2) {
6053 n = 2 - n - 1;
6054 } else {
6055 n = 6 - n - 1;
6056 }
6057 #endif
6058 pwd->w[n] = (int32_t)rs;
6059 }
6060
6061 void helper_msa_insert_d(CPUMIPSState *env, uint32_t wd,
6062 uint32_t rs_num, uint32_t n)
6063 {
6064 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6065 target_ulong rs = env->active_tc.gpr[rs_num];
6066 n %= 2;
6067 pwd->d[n] = (int64_t)rs;
6068 }
6069
6070 void helper_msa_insve_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6071 uint32_t ws, uint32_t n)
6072 {
6073 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6074 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6075
6076 switch (df) {
6077 case DF_BYTE:
6078 pwd->b[n] = (int8_t)pws->b[0];
6079 break;
6080 case DF_HALF:
6081 pwd->h[n] = (int16_t)pws->h[0];
6082 break;
6083 case DF_WORD:
6084 pwd->w[n] = (int32_t)pws->w[0];
6085 break;
6086 case DF_DOUBLE:
6087 pwd->d[n] = (int64_t)pws->d[0];
6088 break;
6089 default:
6090 assert(0);
6091 }
6092 }
6093
6094 void helper_msa_ctcmsa(CPUMIPSState *env, target_ulong elm, uint32_t cd)
6095 {
6096 switch (cd) {
6097 case 0:
6098 break;
6099 case 1:
6100 env->active_tc.msacsr = (int32_t)elm & MSACSR_MASK;
6101 restore_msa_fp_status(env);
6102 /* check exception */
6103 if ((GET_FP_ENABLE(env->active_tc.msacsr) | FP_UNIMPLEMENTED)
6104 & GET_FP_CAUSE(env->active_tc.msacsr)) {
6105 do_raise_exception(env, EXCP_MSAFPE, GETPC());
6106 }
6107 break;
6108 }
6109 }
6110
6111 target_ulong helper_msa_cfcmsa(CPUMIPSState *env, uint32_t cs)
6112 {
6113 switch (cs) {
6114 case 0:
6115 return env->msair;
6116 case 1:
6117 return env->active_tc.msacsr & MSACSR_MASK;
6118 }
6119 return 0;
6120 }
6121
6122 void helper_msa_fill_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6123 uint32_t rs)
6124 {
6125 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6126 uint32_t i;
6127
6128 switch (df) {
6129 case DF_BYTE:
6130 for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) {
6131 pwd->b[i] = (int8_t)env->active_tc.gpr[rs];
6132 }
6133 break;
6134 case DF_HALF:
6135 for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) {
6136 pwd->h[i] = (int16_t)env->active_tc.gpr[rs];
6137 }
6138 break;
6139 case DF_WORD:
6140 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6141 pwd->w[i] = (int32_t)env->active_tc.gpr[rs];
6142 }
6143 break;
6144 case DF_DOUBLE:
6145 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6146 pwd->d[i] = (int64_t)env->active_tc.gpr[rs];
6147 }
6148 break;
6149 default:
6150 assert(0);
6151 }
6152 }
6153
6154
6155 #define FLOAT_ONE32 make_float32(0x3f8 << 20)
6156 #define FLOAT_ONE64 make_float64(0x3ffULL << 52)
6157
6158 #define FLOAT_SNAN16(s) (float16_default_nan(s) ^ 0x0220)
6159 /* 0x7c20 */
6160 #define FLOAT_SNAN32(s) (float32_default_nan(s) ^ 0x00400020)
6161 /* 0x7f800020 */
6162 #define FLOAT_SNAN64(s) (float64_default_nan(s) ^ 0x0008000000000020ULL)
6163 /* 0x7ff0000000000020 */
6164
6165 static inline void clear_msacsr_cause(CPUMIPSState *env)
6166 {
6167 SET_FP_CAUSE(env->active_tc.msacsr, 0);
6168 }
6169
6170 static inline void check_msacsr_cause(CPUMIPSState *env, uintptr_t retaddr)
6171 {
6172 if ((GET_FP_CAUSE(env->active_tc.msacsr) &
6173 (GET_FP_ENABLE(env->active_tc.msacsr) | FP_UNIMPLEMENTED)) == 0) {
6174 UPDATE_FP_FLAGS(env->active_tc.msacsr,
6175 GET_FP_CAUSE(env->active_tc.msacsr));
6176 } else {
6177 do_raise_exception(env, EXCP_MSAFPE, retaddr);
6178 }
6179 }
6180
6181 /* Flush-to-zero use cases for update_msacsr() */
6182 #define CLEAR_FS_UNDERFLOW 1
6183 #define CLEAR_IS_INEXACT 2
6184 #define RECIPROCAL_INEXACT 4
6185
6186
6187 static inline int ieee_to_mips_xcpt_msa(int ieee_xcpt)
6188 {
6189 int mips_xcpt = 0;
6190
6191 if (ieee_xcpt & float_flag_invalid) {
6192 mips_xcpt |= FP_INVALID;
6193 }
6194 if (ieee_xcpt & float_flag_overflow) {
6195 mips_xcpt |= FP_OVERFLOW;
6196 }
6197 if (ieee_xcpt & float_flag_underflow) {
6198 mips_xcpt |= FP_UNDERFLOW;
6199 }
6200 if (ieee_xcpt & float_flag_divbyzero) {
6201 mips_xcpt |= FP_DIV0;
6202 }
6203 if (ieee_xcpt & float_flag_inexact) {
6204 mips_xcpt |= FP_INEXACT;
6205 }
6206
6207 return mips_xcpt;
6208 }
6209
6210 static inline int update_msacsr(CPUMIPSState *env, int action, int denormal)
6211 {
6212 int ieee_exception_flags;
6213 int mips_exception_flags = 0;
6214 int cause;
6215 int enable;
6216
6217 ieee_exception_flags = get_float_exception_flags(
6218 &env->active_tc.msa_fp_status);
6219
6220 /* QEMU softfloat does not signal all underflow cases */
6221 if (denormal) {
6222 ieee_exception_flags |= float_flag_underflow;
6223 }
6224 if (ieee_exception_flags) {
6225 mips_exception_flags = ieee_to_mips_xcpt_msa(ieee_exception_flags);
6226 }
6227 enable = GET_FP_ENABLE(env->active_tc.msacsr) | FP_UNIMPLEMENTED;
6228
6229 /* Set Inexact (I) when flushing inputs to zero */
6230 if ((ieee_exception_flags & float_flag_input_denormal) &&
6231 (env->active_tc.msacsr & MSACSR_FS_MASK) != 0) {
6232 if (action & CLEAR_IS_INEXACT) {
6233 mips_exception_flags &= ~FP_INEXACT;
6234 } else {
6235 mips_exception_flags |= FP_INEXACT;
6236 }
6237 }
6238
6239 /* Set Inexact (I) and Underflow (U) when flushing outputs to zero */
6240 if ((ieee_exception_flags & float_flag_output_denormal) &&
6241 (env->active_tc.msacsr & MSACSR_FS_MASK) != 0) {
6242 mips_exception_flags |= FP_INEXACT;
6243 if (action & CLEAR_FS_UNDERFLOW) {
6244 mips_exception_flags &= ~FP_UNDERFLOW;
6245 } else {
6246 mips_exception_flags |= FP_UNDERFLOW;
6247 }
6248 }
6249
6250 /* Set Inexact (I) when Overflow (O) is not enabled */
6251 if ((mips_exception_flags & FP_OVERFLOW) != 0 &&
6252 (enable & FP_OVERFLOW) == 0) {
6253 mips_exception_flags |= FP_INEXACT;
6254 }
6255
6256 /* Clear Exact Underflow when Underflow (U) is not enabled */
6257 if ((mips_exception_flags & FP_UNDERFLOW) != 0 &&
6258 (enable & FP_UNDERFLOW) == 0 &&
6259 (mips_exception_flags & FP_INEXACT) == 0) {
6260 mips_exception_flags &= ~FP_UNDERFLOW;
6261 }
6262
6263 /*
6264 * Reciprocal operations set only Inexact when valid and not
6265 * divide by zero
6266 */
6267 if ((action & RECIPROCAL_INEXACT) &&
6268 (mips_exception_flags & (FP_INVALID | FP_DIV0)) == 0) {
6269 mips_exception_flags = FP_INEXACT;
6270 }
6271
6272 cause = mips_exception_flags & enable; /* all current enabled exceptions */
6273
6274 if (cause == 0) {
6275 /*
6276 * No enabled exception, update the MSACSR Cause
6277 * with all current exceptions
6278 */
6279 SET_FP_CAUSE(env->active_tc.msacsr,
6280 (GET_FP_CAUSE(env->active_tc.msacsr) | mips_exception_flags));
6281 } else {
6282 /* Current exceptions are enabled */
6283 if ((env->active_tc.msacsr & MSACSR_NX_MASK) == 0) {
6284 /*
6285 * Exception(s) will trap, update MSACSR Cause
6286 * with all enabled exceptions
6287 */
6288 SET_FP_CAUSE(env->active_tc.msacsr,
6289 (GET_FP_CAUSE(env->active_tc.msacsr) | mips_exception_flags));
6290 }
6291 }
6292
6293 return mips_exception_flags;
6294 }
6295
6296 static inline int get_enabled_exceptions(const CPUMIPSState *env, int c)
6297 {
6298 int enable = GET_FP_ENABLE(env->active_tc.msacsr) | FP_UNIMPLEMENTED;
6299 return c & enable;
6300 }
6301
6302 static inline float16 float16_from_float32(int32_t a, bool ieee,
6303 float_status *status)
6304 {
6305 float16 f_val;
6306
6307 f_val = float32_to_float16((float32)a, ieee, status);
6308
6309 return a < 0 ? (f_val | (1 << 15)) : f_val;
6310 }
6311
6312 static inline float32 float32_from_float64(int64_t a, float_status *status)
6313 {
6314 float32 f_val;
6315
6316 f_val = float64_to_float32((float64)a, status);
6317
6318 return a < 0 ? (f_val | (1 << 31)) : f_val;
6319 }
6320
6321 static inline float32 float32_from_float16(int16_t a, bool ieee,
6322 float_status *status)
6323 {
6324 float32 f_val;
6325
6326 f_val = float16_to_float32((float16)a, ieee, status);
6327
6328 return a < 0 ? (f_val | (1 << 31)) : f_val;
6329 }
6330
6331 static inline float64 float64_from_float32(int32_t a, float_status *status)
6332 {
6333 float64 f_val;
6334
6335 f_val = float32_to_float64((float64)a, status);
6336
6337 return a < 0 ? (f_val | (1ULL << 63)) : f_val;
6338 }
6339
6340 static inline float32 float32_from_q16(int16_t a, float_status *status)
6341 {
6342 float32 f_val;
6343
6344 /* conversion as integer and scaling */
6345 f_val = int32_to_float32(a, status);
6346 f_val = float32_scalbn(f_val, -15, status);
6347
6348 return f_val;
6349 }
6350
6351 static inline float64 float64_from_q32(int32_t a, float_status *status)
6352 {
6353 float64 f_val;
6354
6355 /* conversion as integer and scaling */
6356 f_val = int32_to_float64(a, status);
6357 f_val = float64_scalbn(f_val, -31, status);
6358
6359 return f_val;
6360 }
6361
6362 static inline int16_t float32_to_q16(float32 a, float_status *status)
6363 {
6364 int32_t q_val;
6365 int32_t q_min = 0xffff8000;
6366 int32_t q_max = 0x00007fff;
6367
6368 int ieee_ex;
6369
6370 if (float32_is_any_nan(a)) {
6371 float_raise(float_flag_invalid, status);
6372 return 0;
6373 }
6374
6375 /* scaling */
6376 a = float32_scalbn(a, 15, status);
6377
6378 ieee_ex = get_float_exception_flags(status);
6379 set_float_exception_flags(ieee_ex & (~float_flag_underflow)
6380 , status);
6381
6382 if (ieee_ex & float_flag_overflow) {
6383 float_raise(float_flag_inexact, status);
6384 return (int32_t)a < 0 ? q_min : q_max;
6385 }
6386
6387 /* conversion to int */
6388 q_val = float32_to_int32(a, status);
6389
6390 ieee_ex = get_float_exception_flags(status);
6391 set_float_exception_flags(ieee_ex & (~float_flag_underflow)
6392 , status);
6393
6394 if (ieee_ex & float_flag_invalid) {
6395 set_float_exception_flags(ieee_ex & (~float_flag_invalid)
6396 , status);
6397 float_raise(float_flag_overflow | float_flag_inexact, status);
6398 return (int32_t)a < 0 ? q_min : q_max;
6399 }
6400
6401 if (q_val < q_min) {
6402 float_raise(float_flag_overflow | float_flag_inexact, status);
6403 return (int16_t)q_min;
6404 }
6405
6406 if (q_max < q_val) {
6407 float_raise(float_flag_overflow | float_flag_inexact, status);
6408 return (int16_t)q_max;
6409 }
6410
6411 return (int16_t)q_val;
6412 }
6413
6414 static inline int32_t float64_to_q32(float64 a, float_status *status)
6415 {
6416 int64_t q_val;
6417 int64_t q_min = 0xffffffff80000000LL;
6418 int64_t q_max = 0x000000007fffffffLL;
6419
6420 int ieee_ex;
6421
6422 if (float64_is_any_nan(a)) {
6423 float_raise(float_flag_invalid, status);
6424 return 0;
6425 }
6426
6427 /* scaling */
6428 a = float64_scalbn(a, 31, status);
6429
6430 ieee_ex = get_float_exception_flags(status);
6431 set_float_exception_flags(ieee_ex & (~float_flag_underflow)
6432 , status);
6433
6434 if (ieee_ex & float_flag_overflow) {
6435 float_raise(float_flag_inexact, status);
6436 return (int64_t)a < 0 ? q_min : q_max;
6437 }
6438
6439 /* conversion to integer */
6440 q_val = float64_to_int64(a, status);
6441
6442 ieee_ex = get_float_exception_flags(status);
6443 set_float_exception_flags(ieee_ex & (~float_flag_underflow)
6444 , status);
6445
6446 if (ieee_ex & float_flag_invalid) {
6447 set_float_exception_flags(ieee_ex & (~float_flag_invalid)
6448 , status);
6449 float_raise(float_flag_overflow | float_flag_inexact, status);
6450 return (int64_t)a < 0 ? q_min : q_max;
6451 }
6452
6453 if (q_val < q_min) {
6454 float_raise(float_flag_overflow | float_flag_inexact, status);
6455 return (int32_t)q_min;
6456 }
6457
6458 if (q_max < q_val) {
6459 float_raise(float_flag_overflow | float_flag_inexact, status);
6460 return (int32_t)q_max;
6461 }
6462
6463 return (int32_t)q_val;
6464 }
6465
6466 #define MSA_FLOAT_COND(DEST, OP, ARG1, ARG2, BITS, QUIET) \
6467 do { \
6468 float_status *status = &env->active_tc.msa_fp_status; \
6469 int c; \
6470 int64_t cond; \
6471 set_float_exception_flags(0, status); \
6472 if (!QUIET) { \
6473 cond = float ## BITS ## _ ## OP(ARG1, ARG2, status); \
6474 } else { \
6475 cond = float ## BITS ## _ ## OP ## _quiet(ARG1, ARG2, status); \
6476 } \
6477 DEST = cond ? M_MAX_UINT(BITS) : 0; \
6478 c = update_msacsr(env, CLEAR_IS_INEXACT, 0); \
6479 \
6480 if (get_enabled_exceptions(env, c)) { \
6481 DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \
6482 } \
6483 } while (0)
6484
6485 #define MSA_FLOAT_AF(DEST, ARG1, ARG2, BITS, QUIET) \
6486 do { \
6487 MSA_FLOAT_COND(DEST, eq, ARG1, ARG2, BITS, QUIET); \
6488 if ((DEST & M_MAX_UINT(BITS)) == M_MAX_UINT(BITS)) { \
6489 DEST = 0; \
6490 } \
6491 } while (0)
6492
6493 #define MSA_FLOAT_UEQ(DEST, ARG1, ARG2, BITS, QUIET) \
6494 do { \
6495 MSA_FLOAT_COND(DEST, unordered, ARG1, ARG2, BITS, QUIET); \
6496 if (DEST == 0) { \
6497 MSA_FLOAT_COND(DEST, eq, ARG1, ARG2, BITS, QUIET); \
6498 } \
6499 } while (0)
6500
6501 #define MSA_FLOAT_NE(DEST, ARG1, ARG2, BITS, QUIET) \
6502 do { \
6503 MSA_FLOAT_COND(DEST, lt, ARG1, ARG2, BITS, QUIET); \
6504 if (DEST == 0) { \
6505 MSA_FLOAT_COND(DEST, lt, ARG2, ARG1, BITS, QUIET); \
6506 } \
6507 } while (0)
6508
6509 #define MSA_FLOAT_UNE(DEST, ARG1, ARG2, BITS, QUIET) \
6510 do { \
6511 MSA_FLOAT_COND(DEST, unordered, ARG1, ARG2, BITS, QUIET); \
6512 if (DEST == 0) { \
6513 MSA_FLOAT_COND(DEST, lt, ARG1, ARG2, BITS, QUIET); \
6514 if (DEST == 0) { \
6515 MSA_FLOAT_COND(DEST, lt, ARG2, ARG1, BITS, QUIET); \
6516 } \
6517 } \
6518 } while (0)
6519
6520 #define MSA_FLOAT_ULE(DEST, ARG1, ARG2, BITS, QUIET) \
6521 do { \
6522 MSA_FLOAT_COND(DEST, unordered, ARG1, ARG2, BITS, QUIET); \
6523 if (DEST == 0) { \
6524 MSA_FLOAT_COND(DEST, le, ARG1, ARG2, BITS, QUIET); \
6525 } \
6526 } while (0)
6527
6528 #define MSA_FLOAT_ULT(DEST, ARG1, ARG2, BITS, QUIET) \
6529 do { \
6530 MSA_FLOAT_COND(DEST, unordered, ARG1, ARG2, BITS, QUIET); \
6531 if (DEST == 0) { \
6532 MSA_FLOAT_COND(DEST, lt, ARG1, ARG2, BITS, QUIET); \
6533 } \
6534 } while (0)
6535
6536 #define MSA_FLOAT_OR(DEST, ARG1, ARG2, BITS, QUIET) \
6537 do { \
6538 MSA_FLOAT_COND(DEST, le, ARG1, ARG2, BITS, QUIET); \
6539 if (DEST == 0) { \
6540 MSA_FLOAT_COND(DEST, le, ARG2, ARG1, BITS, QUIET); \
6541 } \
6542 } while (0)
6543
6544 static inline void compare_af(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
6545 wr_t *pwt, uint32_t df, int quiet,
6546 uintptr_t retaddr)
6547 {
6548 wr_t wx, *pwx = &wx;
6549 uint32_t i;
6550
6551 clear_msacsr_cause(env);
6552
6553 switch (df) {
6554 case DF_WORD:
6555 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6556 MSA_FLOAT_AF(pwx->w[i], pws->w[i], pwt->w[i], 32, quiet);
6557 }
6558 break;
6559 case DF_DOUBLE:
6560 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6561 MSA_FLOAT_AF(pwx->d[i], pws->d[i], pwt->d[i], 64, quiet);
6562 }
6563 break;
6564 default:
6565 assert(0);
6566 }
6567
6568 check_msacsr_cause(env, retaddr);
6569
6570 msa_move_v(pwd, pwx);
6571 }
6572
6573 static inline void compare_un(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
6574 wr_t *pwt, uint32_t df, int quiet,
6575 uintptr_t retaddr)
6576 {
6577 wr_t wx, *pwx = &wx;
6578 uint32_t i;
6579
6580 clear_msacsr_cause(env);
6581
6582 switch (df) {
6583 case DF_WORD:
6584 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6585 MSA_FLOAT_COND(pwx->w[i], unordered, pws->w[i], pwt->w[i], 32,
6586 quiet);
6587 }
6588 break;
6589 case DF_DOUBLE:
6590 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6591 MSA_FLOAT_COND(pwx->d[i], unordered, pws->d[i], pwt->d[i], 64,
6592 quiet);
6593 }
6594 break;
6595 default:
6596 assert(0);
6597 }
6598
6599 check_msacsr_cause(env, retaddr);
6600
6601 msa_move_v(pwd, pwx);
6602 }
6603
6604 static inline void compare_eq(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
6605 wr_t *pwt, uint32_t df, int quiet,
6606 uintptr_t retaddr)
6607 {
6608 wr_t wx, *pwx = &wx;
6609 uint32_t i;
6610
6611 clear_msacsr_cause(env);
6612
6613 switch (df) {
6614 case DF_WORD:
6615 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6616 MSA_FLOAT_COND(pwx->w[i], eq, pws->w[i], pwt->w[i], 32, quiet);
6617 }
6618 break;
6619 case DF_DOUBLE:
6620 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6621 MSA_FLOAT_COND(pwx->d[i], eq, pws->d[i], pwt->d[i], 64, quiet);
6622 }
6623 break;
6624 default:
6625 assert(0);
6626 }
6627
6628 check_msacsr_cause(env, retaddr);
6629
6630 msa_move_v(pwd, pwx);
6631 }
6632
6633 static inline void compare_ueq(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
6634 wr_t *pwt, uint32_t df, int quiet,
6635 uintptr_t retaddr)
6636 {
6637 wr_t wx, *pwx = &wx;
6638 uint32_t i;
6639
6640 clear_msacsr_cause(env);
6641
6642 switch (df) {
6643 case DF_WORD:
6644 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6645 MSA_FLOAT_UEQ(pwx->w[i], pws->w[i], pwt->w[i], 32, quiet);
6646 }
6647 break;
6648 case DF_DOUBLE:
6649 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6650 MSA_FLOAT_UEQ(pwx->d[i], pws->d[i], pwt->d[i], 64, quiet);
6651 }
6652 break;
6653 default:
6654 assert(0);
6655 }
6656
6657 check_msacsr_cause(env, retaddr);
6658
6659 msa_move_v(pwd, pwx);
6660 }
6661
6662 static inline void compare_lt(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
6663 wr_t *pwt, uint32_t df, int quiet,
6664 uintptr_t retaddr)
6665 {
6666 wr_t wx, *pwx = &wx;
6667 uint32_t i;
6668
6669 clear_msacsr_cause(env);
6670
6671 switch (df) {
6672 case DF_WORD:
6673 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6674 MSA_FLOAT_COND(pwx->w[i], lt, pws->w[i], pwt->w[i], 32, quiet);
6675 }
6676 break;
6677 case DF_DOUBLE:
6678 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6679 MSA_FLOAT_COND(pwx->d[i], lt, pws->d[i], pwt->d[i], 64, quiet);
6680 }
6681 break;
6682 default:
6683 assert(0);
6684 }
6685
6686 check_msacsr_cause(env, retaddr);
6687
6688 msa_move_v(pwd, pwx);
6689 }
6690
6691 static inline void compare_ult(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
6692 wr_t *pwt, uint32_t df, int quiet,
6693 uintptr_t retaddr)
6694 {
6695 wr_t wx, *pwx = &wx;
6696 uint32_t i;
6697
6698 clear_msacsr_cause(env);
6699
6700 switch (df) {
6701 case DF_WORD:
6702 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6703 MSA_FLOAT_ULT(pwx->w[i], pws->w[i], pwt->w[i], 32, quiet);
6704 }
6705 break;
6706 case DF_DOUBLE:
6707 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6708 MSA_FLOAT_ULT(pwx->d[i], pws->d[i], pwt->d[i], 64, quiet);
6709 }
6710 break;
6711 default:
6712 assert(0);
6713 }
6714
6715 check_msacsr_cause(env, retaddr);
6716
6717 msa_move_v(pwd, pwx);
6718 }
6719
6720 static inline void compare_le(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
6721 wr_t *pwt, uint32_t df, int quiet,
6722 uintptr_t retaddr)
6723 {
6724 wr_t wx, *pwx = &wx;
6725 uint32_t i;
6726
6727 clear_msacsr_cause(env);
6728
6729 switch (df) {
6730 case DF_WORD:
6731 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6732 MSA_FLOAT_COND(pwx->w[i], le, pws->w[i], pwt->w[i], 32, quiet);
6733 }
6734 break;
6735 case DF_DOUBLE:
6736 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6737 MSA_FLOAT_COND(pwx->d[i], le, pws->d[i], pwt->d[i], 64, quiet);
6738 }
6739 break;
6740 default:
6741 assert(0);
6742 }
6743
6744 check_msacsr_cause(env, retaddr);
6745
6746 msa_move_v(pwd, pwx);
6747 }
6748
6749 static inline void compare_ule(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
6750 wr_t *pwt, uint32_t df, int quiet,
6751 uintptr_t retaddr)
6752 {
6753 wr_t wx, *pwx = &wx;
6754 uint32_t i;
6755
6756 clear_msacsr_cause(env);
6757
6758 switch (df) {
6759 case DF_WORD:
6760 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6761 MSA_FLOAT_ULE(pwx->w[i], pws->w[i], pwt->w[i], 32, quiet);
6762 }
6763 break;
6764 case DF_DOUBLE:
6765 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6766 MSA_FLOAT_ULE(pwx->d[i], pws->d[i], pwt->d[i], 64, quiet);
6767 }
6768 break;
6769 default:
6770 assert(0);
6771 }
6772
6773 check_msacsr_cause(env, retaddr);
6774
6775 msa_move_v(pwd, pwx);
6776 }
6777
6778 static inline void compare_or(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
6779 wr_t *pwt, uint32_t df, int quiet,
6780 uintptr_t retaddr)
6781 {
6782 wr_t wx, *pwx = &wx;
6783 uint32_t i;
6784
6785 clear_msacsr_cause(env);
6786
6787 switch (df) {
6788 case DF_WORD:
6789 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6790 MSA_FLOAT_OR(pwx->w[i], pws->w[i], pwt->w[i], 32, quiet);
6791 }
6792 break;
6793 case DF_DOUBLE:
6794 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6795 MSA_FLOAT_OR(pwx->d[i], pws->d[i], pwt->d[i], 64, quiet);
6796 }
6797 break;
6798 default:
6799 assert(0);
6800 }
6801
6802 check_msacsr_cause(env, retaddr);
6803
6804 msa_move_v(pwd, pwx);
6805 }
6806
6807 static inline void compare_une(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
6808 wr_t *pwt, uint32_t df, int quiet,
6809 uintptr_t retaddr)
6810 {
6811 wr_t wx, *pwx = &wx;
6812 uint32_t i;
6813
6814 clear_msacsr_cause(env);
6815
6816 switch (df) {
6817 case DF_WORD:
6818 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6819 MSA_FLOAT_UNE(pwx->w[i], pws->w[i], pwt->w[i], 32, quiet);
6820 }
6821 break;
6822 case DF_DOUBLE:
6823 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6824 MSA_FLOAT_UNE(pwx->d[i], pws->d[i], pwt->d[i], 64, quiet);
6825 }
6826 break;
6827 default:
6828 assert(0);
6829 }
6830
6831 check_msacsr_cause(env, retaddr);
6832
6833 msa_move_v(pwd, pwx);
6834 }
6835
6836 static inline void compare_ne(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
6837 wr_t *pwt, uint32_t df, int quiet,
6838 uintptr_t retaddr)
6839 {
6840 wr_t wx, *pwx = &wx;
6841 uint32_t i;
6842
6843 clear_msacsr_cause(env);
6844
6845 switch (df) {
6846 case DF_WORD:
6847 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6848 MSA_FLOAT_NE(pwx->w[i], pws->w[i], pwt->w[i], 32, quiet);
6849 }
6850 break;
6851 case DF_DOUBLE:
6852 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6853 MSA_FLOAT_NE(pwx->d[i], pws->d[i], pwt->d[i], 64, quiet);
6854 }
6855 break;
6856 default:
6857 assert(0);
6858 }
6859
6860 check_msacsr_cause(env, retaddr);
6861
6862 msa_move_v(pwd, pwx);
6863 }
6864
6865 void helper_msa_fcaf_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6866 uint32_t ws, uint32_t wt)
6867 {
6868 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6869 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6870 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6871 compare_af(env, pwd, pws, pwt, df, 1, GETPC());
6872 }
6873
6874 void helper_msa_fcun_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6875 uint32_t ws, uint32_t wt)
6876 {
6877 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6878 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6879 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6880 compare_un(env, pwd, pws, pwt, df, 1, GETPC());
6881 }
6882
6883 void helper_msa_fceq_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6884 uint32_t ws, uint32_t wt)
6885 {
6886 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6887 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6888 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6889 compare_eq(env, pwd, pws, pwt, df, 1, GETPC());
6890 }
6891
6892 void helper_msa_fcueq_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6893 uint32_t ws, uint32_t wt)
6894 {
6895 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6896 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6897 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6898 compare_ueq(env, pwd, pws, pwt, df, 1, GETPC());
6899 }
6900
6901 void helper_msa_fclt_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6902 uint32_t ws, uint32_t wt)
6903 {
6904 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6905 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6906 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6907 compare_lt(env, pwd, pws, pwt, df, 1, GETPC());
6908 }
6909
6910 void helper_msa_fcult_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6911 uint32_t ws, uint32_t wt)
6912 {
6913 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6914 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6915 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6916 compare_ult(env, pwd, pws, pwt, df, 1, GETPC());
6917 }
6918
6919 void helper_msa_fcle_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6920 uint32_t ws, uint32_t wt)
6921 {
6922 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6923 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6924 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6925 compare_le(env, pwd, pws, pwt, df, 1, GETPC());
6926 }
6927
6928 void helper_msa_fcule_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6929 uint32_t ws, uint32_t wt)
6930 {
6931 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6932 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6933 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6934 compare_ule(env, pwd, pws, pwt, df, 1, GETPC());
6935 }
6936
6937 void helper_msa_fsaf_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6938 uint32_t ws, uint32_t wt)
6939 {
6940 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6941 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6942 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6943 compare_af(env, pwd, pws, pwt, df, 0, GETPC());
6944 }
6945
6946 void helper_msa_fsun_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6947 uint32_t ws, uint32_t wt)
6948 {
6949 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6950 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6951 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6952 compare_un(env, pwd, pws, pwt, df, 0, GETPC());
6953 }
6954
6955 void helper_msa_fseq_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6956 uint32_t ws, uint32_t wt)
6957 {
6958 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6959 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6960 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6961 compare_eq(env, pwd, pws, pwt, df, 0, GETPC());
6962 }
6963
6964 void helper_msa_fsueq_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6965 uint32_t ws, uint32_t wt)
6966 {
6967 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6968 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6969 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6970 compare_ueq(env, pwd, pws, pwt, df, 0, GETPC());
6971 }
6972
6973 void helper_msa_fslt_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6974 uint32_t ws, uint32_t wt)
6975 {
6976 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6977 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6978 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6979 compare_lt(env, pwd, pws, pwt, df, 0, GETPC());
6980 }
6981
6982 void helper_msa_fsult_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6983 uint32_t ws, uint32_t wt)
6984 {
6985 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6986 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6987 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6988 compare_ult(env, pwd, pws, pwt, df, 0, GETPC());
6989 }
6990
6991 void helper_msa_fsle_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6992 uint32_t ws, uint32_t wt)
6993 {
6994 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6995 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6996 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6997 compare_le(env, pwd, pws, pwt, df, 0, GETPC());
6998 }
6999
7000 void helper_msa_fsule_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7001 uint32_t ws, uint32_t wt)
7002 {
7003 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7004 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7005 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7006 compare_ule(env, pwd, pws, pwt, df, 0, GETPC());
7007 }
7008
7009 void helper_msa_fcor_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7010 uint32_t ws, uint32_t wt)
7011 {
7012 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7013 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7014 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7015 compare_or(env, pwd, pws, pwt, df, 1, GETPC());
7016 }
7017
7018 void helper_msa_fcune_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7019 uint32_t ws, uint32_t wt)
7020 {
7021 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7022 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7023 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7024 compare_une(env, pwd, pws, pwt, df, 1, GETPC());
7025 }
7026
7027 void helper_msa_fcne_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7028 uint32_t ws, uint32_t wt)
7029 {
7030 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7031 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7032 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7033 compare_ne(env, pwd, pws, pwt, df, 1, GETPC());
7034 }
7035
7036 void helper_msa_fsor_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7037 uint32_t ws, uint32_t wt)
7038 {
7039 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7040 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7041 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7042 compare_or(env, pwd, pws, pwt, df, 0, GETPC());
7043 }
7044
7045 void helper_msa_fsune_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7046 uint32_t ws, uint32_t wt)
7047 {
7048 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7049 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7050 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7051 compare_une(env, pwd, pws, pwt, df, 0, GETPC());
7052 }
7053
7054 void helper_msa_fsne_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7055 uint32_t ws, uint32_t wt)
7056 {
7057 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7058 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7059 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7060 compare_ne(env, pwd, pws, pwt, df, 0, GETPC());
7061 }
7062
7063 #define float16_is_zero(ARG) 0
7064 #define float16_is_zero_or_denormal(ARG) 0
7065
7066 #define IS_DENORMAL(ARG, BITS) \
7067 (!float ## BITS ## _is_zero(ARG) \
7068 && float ## BITS ## _is_zero_or_denormal(ARG))
7069
7070 #define MSA_FLOAT_BINOP(DEST, OP, ARG1, ARG2, BITS) \
7071 do { \
7072 float_status *status = &env->active_tc.msa_fp_status; \
7073 int c; \
7074 \
7075 set_float_exception_flags(0, status); \
7076 DEST = float ## BITS ## _ ## OP(ARG1, ARG2, status); \
7077 c = update_msacsr(env, 0, IS_DENORMAL(DEST, BITS)); \
7078 \
7079 if (get_enabled_exceptions(env, c)) { \
7080 DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \
7081 } \
7082 } while (0)
7083
7084 void helper_msa_fadd_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7085 uint32_t ws, uint32_t wt)
7086 {
7087 wr_t wx, *pwx = &wx;
7088 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7089 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7090 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7091 uint32_t i;
7092
7093 clear_msacsr_cause(env);
7094
7095 switch (df) {
7096 case DF_WORD:
7097 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7098 MSA_FLOAT_BINOP(pwx->w[i], add, pws->w[i], pwt->w[i], 32);
7099 }
7100 break;
7101 case DF_DOUBLE:
7102 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7103 MSA_FLOAT_BINOP(pwx->d[i], add, pws->d[i], pwt->d[i], 64);
7104 }
7105 break;
7106 default:
7107 assert(0);
7108 }
7109
7110 check_msacsr_cause(env, GETPC());
7111 msa_move_v(pwd, pwx);
7112 }
7113
7114 void helper_msa_fsub_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7115 uint32_t ws, uint32_t wt)
7116 {
7117 wr_t wx, *pwx = &wx;
7118 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7119 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7120 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7121 uint32_t i;
7122
7123 clear_msacsr_cause(env);
7124
7125 switch (df) {
7126 case DF_WORD:
7127 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7128 MSA_FLOAT_BINOP(pwx->w[i], sub, pws->w[i], pwt->w[i], 32);
7129 }
7130 break;
7131 case DF_DOUBLE:
7132 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7133 MSA_FLOAT_BINOP(pwx->d[i], sub, pws->d[i], pwt->d[i], 64);
7134 }
7135 break;
7136 default:
7137 assert(0);
7138 }
7139
7140 check_msacsr_cause(env, GETPC());
7141 msa_move_v(pwd, pwx);
7142 }
7143
7144 void helper_msa_fmul_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7145 uint32_t ws, uint32_t wt)
7146 {
7147 wr_t wx, *pwx = &wx;
7148 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7149 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7150 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7151 uint32_t i;
7152
7153 clear_msacsr_cause(env);
7154
7155 switch (df) {
7156 case DF_WORD:
7157 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7158 MSA_FLOAT_BINOP(pwx->w[i], mul, pws->w[i], pwt->w[i], 32);
7159 }
7160 break;
7161 case DF_DOUBLE:
7162 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7163 MSA_FLOAT_BINOP(pwx->d[i], mul, pws->d[i], pwt->d[i], 64);
7164 }
7165 break;
7166 default:
7167 assert(0);
7168 }
7169
7170 check_msacsr_cause(env, GETPC());
7171
7172 msa_move_v(pwd, pwx);
7173 }
7174
7175 void helper_msa_fdiv_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7176 uint32_t ws, uint32_t wt)
7177 {
7178 wr_t wx, *pwx = &wx;
7179 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7180 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7181 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7182 uint32_t i;
7183
7184 clear_msacsr_cause(env);
7185
7186 switch (df) {
7187 case DF_WORD:
7188 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7189 MSA_FLOAT_BINOP(pwx->w[i], div, pws->w[i], pwt->w[i], 32);
7190 }
7191 break;
7192 case DF_DOUBLE:
7193 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7194 MSA_FLOAT_BINOP(pwx->d[i], div, pws->d[i], pwt->d[i], 64);
7195 }
7196 break;
7197 default:
7198 assert(0);
7199 }
7200
7201 check_msacsr_cause(env, GETPC());
7202
7203 msa_move_v(pwd, pwx);
7204 }
7205
7206 #define MSA_FLOAT_MULADD(DEST, ARG1, ARG2, ARG3, NEGATE, BITS) \
7207 do { \
7208 float_status *status = &env->active_tc.msa_fp_status; \
7209 int c; \
7210 \
7211 set_float_exception_flags(0, status); \
7212 DEST = float ## BITS ## _muladd(ARG2, ARG3, ARG1, NEGATE, status); \
7213 c = update_msacsr(env, 0, IS_DENORMAL(DEST, BITS)); \
7214 \
7215 if (get_enabled_exceptions(env, c)) { \
7216 DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \
7217 } \
7218 } while (0)
7219
7220 void helper_msa_fmadd_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7221 uint32_t ws, uint32_t wt)
7222 {
7223 wr_t wx, *pwx = &wx;
7224 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7225 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7226 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7227 uint32_t i;
7228
7229 clear_msacsr_cause(env);
7230
7231 switch (df) {
7232 case DF_WORD:
7233 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7234 MSA_FLOAT_MULADD(pwx->w[i], pwd->w[i],
7235 pws->w[i], pwt->w[i], 0, 32);
7236 }
7237 break;
7238 case DF_DOUBLE:
7239 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7240 MSA_FLOAT_MULADD(pwx->d[i], pwd->d[i],
7241 pws->d[i], pwt->d[i], 0, 64);
7242 }
7243 break;
7244 default:
7245 assert(0);
7246 }
7247
7248 check_msacsr_cause(env, GETPC());
7249
7250 msa_move_v(pwd, pwx);
7251 }
7252
7253 void helper_msa_fmsub_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7254 uint32_t ws, uint32_t wt)
7255 {
7256 wr_t wx, *pwx = &wx;
7257 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7258 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7259 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7260 uint32_t i;
7261
7262 clear_msacsr_cause(env);
7263
7264 switch (df) {
7265 case DF_WORD:
7266 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7267 MSA_FLOAT_MULADD(pwx->w[i], pwd->w[i],
7268 pws->w[i], pwt->w[i],
7269 float_muladd_negate_product, 32);
7270 }
7271 break;
7272 case DF_DOUBLE:
7273 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7274 MSA_FLOAT_MULADD(pwx->d[i], pwd->d[i],
7275 pws->d[i], pwt->d[i],
7276 float_muladd_negate_product, 64);
7277 }
7278 break;
7279 default:
7280 assert(0);
7281 }
7282
7283 check_msacsr_cause(env, GETPC());
7284
7285 msa_move_v(pwd, pwx);
7286 }
7287
7288 void helper_msa_fexp2_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7289 uint32_t ws, uint32_t wt)
7290 {
7291 wr_t wx, *pwx = &wx;
7292 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7293 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7294 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7295 uint32_t i;
7296
7297 clear_msacsr_cause(env);
7298
7299 switch (df) {
7300 case DF_WORD:
7301 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7302 MSA_FLOAT_BINOP(pwx->w[i], scalbn, pws->w[i],
7303 pwt->w[i] > 0x200 ? 0x200 :
7304 pwt->w[i] < -0x200 ? -0x200 : pwt->w[i],
7305 32);
7306 }
7307 break;
7308 case DF_DOUBLE:
7309 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7310 MSA_FLOAT_BINOP(pwx->d[i], scalbn, pws->d[i],
7311 pwt->d[i] > 0x1000 ? 0x1000 :
7312 pwt->d[i] < -0x1000 ? -0x1000 : pwt->d[i],
7313 64);
7314 }
7315 break;
7316 default:
7317 assert(0);
7318 }
7319
7320 check_msacsr_cause(env, GETPC());
7321
7322 msa_move_v(pwd, pwx);
7323 }
7324
7325 #define MSA_FLOAT_UNOP(DEST, OP, ARG, BITS) \
7326 do { \
7327 float_status *status = &env->active_tc.msa_fp_status; \
7328 int c; \
7329 \
7330 set_float_exception_flags(0, status); \
7331 DEST = float ## BITS ## _ ## OP(ARG, status); \
7332 c = update_msacsr(env, 0, IS_DENORMAL(DEST, BITS)); \
7333 \
7334 if (get_enabled_exceptions(env, c)) { \
7335 DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \
7336 } \
7337 } while (0)
7338
7339 void helper_msa_fexdo_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7340 uint32_t ws, uint32_t wt)
7341 {
7342 wr_t wx, *pwx = &wx;
7343 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7344 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7345 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7346 uint32_t i;
7347
7348 clear_msacsr_cause(env);
7349
7350 switch (df) {
7351 case DF_WORD:
7352 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7353 /*
7354 * Half precision floats come in two formats: standard
7355 * IEEE and "ARM" format. The latter gains extra exponent
7356 * range by omitting the NaN/Inf encodings.
7357 */
7358 bool ieee = true;
7359
7360 MSA_FLOAT_BINOP(Lh(pwx, i), from_float32, pws->w[i], ieee, 16);
7361 MSA_FLOAT_BINOP(Rh(pwx, i), from_float32, pwt->w[i], ieee, 16);
7362 }
7363 break;
7364 case DF_DOUBLE:
7365 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7366 MSA_FLOAT_UNOP(Lw(pwx, i), from_float64, pws->d[i], 32);
7367 MSA_FLOAT_UNOP(Rw(pwx, i), from_float64, pwt->d[i], 32);
7368 }
7369 break;
7370 default:
7371 assert(0);
7372 }
7373
7374 check_msacsr_cause(env, GETPC());
7375 msa_move_v(pwd, pwx);
7376 }
7377
7378 #define MSA_FLOAT_UNOP_XD(DEST, OP, ARG, BITS, XBITS) \
7379 do { \
7380 float_status *status = &env->active_tc.msa_fp_status; \
7381 int c; \
7382 \
7383 set_float_exception_flags(0, status); \
7384 DEST = float ## BITS ## _ ## OP(ARG, status); \
7385 c = update_msacsr(env, CLEAR_FS_UNDERFLOW, 0); \
7386 \
7387 if (get_enabled_exceptions(env, c)) { \
7388 DEST = ((FLOAT_SNAN ## XBITS(status) >> 6) << 6) | c; \
7389 } \
7390 } while (0)
7391
7392 void helper_msa_ftq_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7393 uint32_t ws, uint32_t wt)
7394 {
7395 wr_t wx, *pwx = &wx;
7396 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7397 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7398 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7399 uint32_t i;
7400
7401 clear_msacsr_cause(env);
7402
7403 switch (df) {
7404 case DF_WORD:
7405 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7406 MSA_FLOAT_UNOP_XD(Lh(pwx, i), to_q16, pws->w[i], 32, 16);
7407 MSA_FLOAT_UNOP_XD(Rh(pwx, i), to_q16, pwt->w[i], 32, 16);
7408 }
7409 break;
7410 case DF_DOUBLE:
7411 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7412 MSA_FLOAT_UNOP_XD(Lw(pwx, i), to_q32, pws->d[i], 64, 32);
7413 MSA_FLOAT_UNOP_XD(Rw(pwx, i), to_q32, pwt->d[i], 64, 32);
7414 }
7415 break;
7416 default:
7417 assert(0);
7418 }
7419
7420 check_msacsr_cause(env, GETPC());
7421
7422 msa_move_v(pwd, pwx);
7423 }
7424
7425 #define NUMBER_QNAN_PAIR(ARG1, ARG2, BITS, STATUS) \
7426 !float ## BITS ## _is_any_nan(ARG1) \
7427 && float ## BITS ## _is_quiet_nan(ARG2, STATUS)
7428
7429 #define MSA_FLOAT_MAXOP(DEST, OP, ARG1, ARG2, BITS) \
7430 do { \
7431 float_status *status = &env->active_tc.msa_fp_status; \
7432 int c; \
7433 \
7434 set_float_exception_flags(0, status); \
7435 DEST = float ## BITS ## _ ## OP(ARG1, ARG2, status); \
7436 c = update_msacsr(env, 0, 0); \
7437 \
7438 if (get_enabled_exceptions(env, c)) { \
7439 DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \
7440 } \
7441 } while (0)
7442
7443 #define FMAXMIN_A(F, G, X, _S, _T, BITS, STATUS) \
7444 do { \
7445 uint## BITS ##_t S = _S, T = _T; \
7446 uint## BITS ##_t as, at, xs, xt, xd; \
7447 if (NUMBER_QNAN_PAIR(S, T, BITS, STATUS)) { \
7448 T = S; \
7449 } \
7450 else if (NUMBER_QNAN_PAIR(T, S, BITS, STATUS)) { \
7451 S = T; \
7452 } \
7453 as = float## BITS ##_abs(S); \
7454 at = float## BITS ##_abs(T); \
7455 MSA_FLOAT_MAXOP(xs, F, S, T, BITS); \
7456 MSA_FLOAT_MAXOP(xt, G, S, T, BITS); \
7457 MSA_FLOAT_MAXOP(xd, F, as, at, BITS); \
7458 X = (as == at || xd == float## BITS ##_abs(xs)) ? xs : xt; \
7459 } while (0)
7460
7461 void helper_msa_fmin_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7462 uint32_t ws, uint32_t wt)
7463 {
7464 float_status *status = &env->active_tc.msa_fp_status;
7465 wr_t wx, *pwx = &wx;
7466 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7467 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7468 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7469
7470 clear_msacsr_cause(env);
7471
7472 if (df == DF_WORD) {
7473
7474 if (NUMBER_QNAN_PAIR(pws->w[0], pwt->w[0], 32, status)) {
7475 MSA_FLOAT_MAXOP(pwx->w[0], min, pws->w[0], pws->w[0], 32);
7476 } else if (NUMBER_QNAN_PAIR(pwt->w[0], pws->w[0], 32, status)) {
7477 MSA_FLOAT_MAXOP(pwx->w[0], min, pwt->w[0], pwt->w[0], 32);
7478 } else {
7479 MSA_FLOAT_MAXOP(pwx->w[0], min, pws->w[0], pwt->w[0], 32);
7480 }
7481
7482 if (NUMBER_QNAN_PAIR(pws->w[1], pwt->w[1], 32, status)) {
7483 MSA_FLOAT_MAXOP(pwx->w[1], min, pws->w[1], pws->w[1], 32);
7484 } else if (NUMBER_QNAN_PAIR(pwt->w[1], pws->w[1], 32, status)) {
7485 MSA_FLOAT_MAXOP(pwx->w[1], min, pwt->w[1], pwt->w[1], 32);
7486 } else {
7487 MSA_FLOAT_MAXOP(pwx->w[1], min, pws->w[1], pwt->w[1], 32);
7488 }
7489
7490 if (NUMBER_QNAN_PAIR(pws->w[2], pwt->w[2], 32, status)) {
7491 MSA_FLOAT_MAXOP(pwx->w[2], min, pws->w[2], pws->w[2], 32);
7492 } else if (NUMBER_QNAN_PAIR(pwt->w[2], pws->w[2], 32, status)) {
7493 MSA_FLOAT_MAXOP(pwx->w[2], min, pwt->w[2], pwt->w[2], 32);
7494 } else {
7495 MSA_FLOAT_MAXOP(pwx->w[2], min, pws->w[2], pwt->w[2], 32);
7496 }
7497
7498 if (NUMBER_QNAN_PAIR(pws->w[3], pwt->w[3], 32, status)) {
7499 MSA_FLOAT_MAXOP(pwx->w[3], min, pws->w[3], pws->w[3], 32);
7500 } else if (NUMBER_QNAN_PAIR(pwt->w[3], pws->w[3], 32, status)) {
7501 MSA_FLOAT_MAXOP(pwx->w[3], min, pwt->w[3], pwt->w[3], 32);
7502 } else {
7503 MSA_FLOAT_MAXOP(pwx->w[3], min, pws->w[3], pwt->w[3], 32);
7504 }
7505
7506 } else if (df == DF_DOUBLE) {
7507
7508 if (NUMBER_QNAN_PAIR(pws->d[0], pwt->d[0], 64, status)) {
7509 MSA_FLOAT_MAXOP(pwx->d[0], min, pws->d[0], pws->d[0], 64);
7510 } else if (NUMBER_QNAN_PAIR(pwt->d[0], pws->d[0], 64, status)) {
7511 MSA_FLOAT_MAXOP(pwx->d[0], min, pwt->d[0], pwt->d[0], 64);
7512 } else {
7513 MSA_FLOAT_MAXOP(pwx->d[0], min, pws->d[0], pwt->d[0], 64);
7514 }
7515
7516 if (NUMBER_QNAN_PAIR(pws->d[1], pwt->d[1], 64, status)) {
7517 MSA_FLOAT_MAXOP(pwx->d[1], min, pws->d[1], pws->d[1], 64);
7518 } else if (NUMBER_QNAN_PAIR(pwt->d[1], pws->d[1], 64, status)) {
7519 MSA_FLOAT_MAXOP(pwx->d[1], min, pwt->d[1], pwt->d[1], 64);
7520 } else {
7521 MSA_FLOAT_MAXOP(pwx->d[1], min, pws->d[1], pwt->d[1], 64);
7522 }
7523
7524 } else {
7525
7526 assert(0);
7527
7528 }
7529
7530 check_msacsr_cause(env, GETPC());
7531
7532 msa_move_v(pwd, pwx);
7533 }
7534
7535 void helper_msa_fmin_a_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7536 uint32_t ws, uint32_t wt)
7537 {
7538 float_status *status = &env->active_tc.msa_fp_status;
7539 wr_t wx, *pwx = &wx;
7540 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7541 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7542 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7543
7544 clear_msacsr_cause(env);
7545
7546 if (df == DF_WORD) {
7547 FMAXMIN_A(min, max, pwx->w[0], pws->w[0], pwt->w[0], 32, status);
7548 FMAXMIN_A(min, max, pwx->w[1], pws->w[1], pwt->w[1], 32, status);
7549 FMAXMIN_A(min, max, pwx->w[2], pws->w[2], pwt->w[2], 32, status);
7550 FMAXMIN_A(min, max, pwx->w[3], pws->w[3], pwt->w[3], 32, status);
7551 } else if (df == DF_DOUBLE) {
7552 FMAXMIN_A(min, max, pwx->d[0], pws->d[0], pwt->d[0], 64, status);
7553 FMAXMIN_A(min, max, pwx->d[1], pws->d[1], pwt->d[1], 64, status);
7554 } else {
7555 assert(0);
7556 }
7557
7558 check_msacsr_cause(env, GETPC());
7559
7560 msa_move_v(pwd, pwx);
7561 }
7562
7563 void helper_msa_fmax_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7564 uint32_t ws, uint32_t wt)
7565 {
7566 float_status *status = &env->active_tc.msa_fp_status;
7567 wr_t wx, *pwx = &wx;
7568 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7569 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7570 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7571
7572 clear_msacsr_cause(env);
7573
7574 if (df == DF_WORD) {
7575
7576 if (NUMBER_QNAN_PAIR(pws->w[0], pwt->w[0], 32, status)) {
7577 MSA_FLOAT_MAXOP(pwx->w[0], max, pws->w[0], pws->w[0], 32);
7578 } else if (NUMBER_QNAN_PAIR(pwt->w[0], pws->w[0], 32, status)) {
7579 MSA_FLOAT_MAXOP(pwx->w[0], max, pwt->w[0], pwt->w[0], 32);
7580 } else {
7581 MSA_FLOAT_MAXOP(pwx->w[0], max, pws->w[0], pwt->w[0], 32);
7582 }
7583
7584 if (NUMBER_QNAN_PAIR(pws->w[1], pwt->w[1], 32, status)) {
7585 MSA_FLOAT_MAXOP(pwx->w[1], max, pws->w[1], pws->w[1], 32);
7586 } else if (NUMBER_QNAN_PAIR(pwt->w[1], pws->w[1], 32, status)) {
7587 MSA_FLOAT_MAXOP(pwx->w[1], max, pwt->w[1], pwt->w[1], 32);
7588 } else {
7589 MSA_FLOAT_MAXOP(pwx->w[1], max, pws->w[1], pwt->w[1], 32);
7590 }
7591
7592 if (NUMBER_QNAN_PAIR(pws->w[2], pwt->w[2], 32, status)) {
7593 MSA_FLOAT_MAXOP(pwx->w[2], max, pws->w[2], pws->w[2], 32);
7594 } else if (NUMBER_QNAN_PAIR(pwt->w[2], pws->w[2], 32, status)) {
7595 MSA_FLOAT_MAXOP(pwx->w[2], max, pwt->w[2], pwt->w[2], 32);
7596 } else {
7597 MSA_FLOAT_MAXOP(pwx->w[2], max, pws->w[2], pwt->w[2], 32);
7598 }
7599
7600 if (NUMBER_QNAN_PAIR(pws->w[3], pwt->w[3], 32, status)) {
7601 MSA_FLOAT_MAXOP(pwx->w[3], max, pws->w[3], pws->w[3], 32);
7602 } else if (NUMBER_QNAN_PAIR(pwt->w[3], pws->w[3], 32, status)) {
7603 MSA_FLOAT_MAXOP(pwx->w[3], max, pwt->w[3], pwt->w[3], 32);
7604 } else {
7605 MSA_FLOAT_MAXOP(pwx->w[3], max, pws->w[3], pwt->w[3], 32);
7606 }
7607
7608 } else if (df == DF_DOUBLE) {
7609
7610 if (NUMBER_QNAN_PAIR(pws->d[0], pwt->d[0], 64, status)) {
7611 MSA_FLOAT_MAXOP(pwx->d[0], max, pws->d[0], pws->d[0], 64);
7612 } else if (NUMBER_QNAN_PAIR(pwt->d[0], pws->d[0], 64, status)) {
7613 MSA_FLOAT_MAXOP(pwx->d[0], max, pwt->d[0], pwt->d[0], 64);
7614 } else {
7615 MSA_FLOAT_MAXOP(pwx->d[0], max, pws->d[0], pwt->d[0], 64);
7616 }
7617
7618 if (NUMBER_QNAN_PAIR(pws->d[1], pwt->d[1], 64, status)) {
7619 MSA_FLOAT_MAXOP(pwx->d[1], max, pws->d[1], pws->d[1], 64);
7620 } else if (NUMBER_QNAN_PAIR(pwt->d[1], pws->d[1], 64, status)) {
7621 MSA_FLOAT_MAXOP(pwx->d[1], max, pwt->d[1], pwt->d[1], 64);
7622 } else {
7623 MSA_FLOAT_MAXOP(pwx->d[1], max, pws->d[1], pwt->d[1], 64);
7624 }
7625
7626 } else {
7627
7628 assert(0);
7629
7630 }
7631
7632 check_msacsr_cause(env, GETPC());
7633
7634 msa_move_v(pwd, pwx);
7635 }
7636
7637 void helper_msa_fmax_a_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7638 uint32_t ws, uint32_t wt)
7639 {
7640 float_status *status = &env->active_tc.msa_fp_status;
7641 wr_t wx, *pwx = &wx;
7642 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7643 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7644 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7645
7646 clear_msacsr_cause(env);
7647
7648 if (df == DF_WORD) {
7649 FMAXMIN_A(max, min, pwx->w[0], pws->w[0], pwt->w[0], 32, status);
7650 FMAXMIN_A(max, min, pwx->w[1], pws->w[1], pwt->w[1], 32, status);
7651 FMAXMIN_A(max, min, pwx->w[2], pws->w[2], pwt->w[2], 32, status);
7652 FMAXMIN_A(max, min, pwx->w[3], pws->w[3], pwt->w[3], 32, status);
7653 } else if (df == DF_DOUBLE) {
7654 FMAXMIN_A(max, min, pwx->d[0], pws->d[0], pwt->d[0], 64, status);
7655 FMAXMIN_A(max, min, pwx->d[1], pws->d[1], pwt->d[1], 64, status);
7656 } else {
7657 assert(0);
7658 }
7659
7660 check_msacsr_cause(env, GETPC());
7661
7662 msa_move_v(pwd, pwx);
7663 }
7664
7665 void helper_msa_fclass_df(CPUMIPSState *env, uint32_t df,
7666 uint32_t wd, uint32_t ws)
7667 {
7668 float_status *status = &env->active_tc.msa_fp_status;
7669
7670 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7671 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7672 if (df == DF_WORD) {
7673 pwd->w[0] = float_class_s(pws->w[0], status);
7674 pwd->w[1] = float_class_s(pws->w[1], status);
7675 pwd->w[2] = float_class_s(pws->w[2], status);
7676 pwd->w[3] = float_class_s(pws->w[3], status);
7677 } else if (df == DF_DOUBLE) {
7678 pwd->d[0] = float_class_d(pws->d[0], status);
7679 pwd->d[1] = float_class_d(pws->d[1], status);
7680 } else {
7681 assert(0);
7682 }
7683 }
7684
7685 #define MSA_FLOAT_UNOP0(DEST, OP, ARG, BITS) \
7686 do { \
7687 float_status *status = &env->active_tc.msa_fp_status; \
7688 int c; \
7689 \
7690 set_float_exception_flags(0, status); \
7691 DEST = float ## BITS ## _ ## OP(ARG, status); \
7692 c = update_msacsr(env, CLEAR_FS_UNDERFLOW, 0); \
7693 \
7694 if (get_enabled_exceptions(env, c)) { \
7695 DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \
7696 } else if (float ## BITS ## _is_any_nan(ARG)) { \
7697 DEST = 0; \
7698 } \
7699 } while (0)
7700
7701 void helper_msa_ftrunc_s_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7702 uint32_t ws)
7703 {
7704 wr_t wx, *pwx = &wx;
7705 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7706 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7707 uint32_t i;
7708
7709 clear_msacsr_cause(env);
7710
7711 switch (df) {
7712 case DF_WORD:
7713 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7714 MSA_FLOAT_UNOP0(pwx->w[i], to_int32_round_to_zero, pws->w[i], 32);
7715 }
7716 break;
7717 case DF_DOUBLE:
7718 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7719 MSA_FLOAT_UNOP0(pwx->d[i], to_int64_round_to_zero, pws->d[i], 64);
7720 }
7721 break;
7722 default:
7723 assert(0);
7724 }
7725
7726 check_msacsr_cause(env, GETPC());
7727
7728 msa_move_v(pwd, pwx);
7729 }
7730
7731 void helper_msa_ftrunc_u_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7732 uint32_t ws)
7733 {
7734 wr_t wx, *pwx = &wx;
7735 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7736 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7737 uint32_t i;
7738
7739 clear_msacsr_cause(env);
7740
7741 switch (df) {
7742 case DF_WORD:
7743 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7744 MSA_FLOAT_UNOP0(pwx->w[i], to_uint32_round_to_zero, pws->w[i], 32);
7745 }
7746 break;
7747 case DF_DOUBLE:
7748 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7749 MSA_FLOAT_UNOP0(pwx->d[i], to_uint64_round_to_zero, pws->d[i], 64);
7750 }
7751 break;
7752 default:
7753 assert(0);
7754 }
7755
7756 check_msacsr_cause(env, GETPC());
7757
7758 msa_move_v(pwd, pwx);
7759 }
7760
7761 void helper_msa_fsqrt_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7762 uint32_t ws)
7763 {
7764 wr_t wx, *pwx = &wx;
7765 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7766 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7767 uint32_t i;
7768
7769 clear_msacsr_cause(env);
7770
7771 switch (df) {
7772 case DF_WORD:
7773 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7774 MSA_FLOAT_UNOP(pwx->w[i], sqrt, pws->w[i], 32);
7775 }
7776 break;
7777 case DF_DOUBLE:
7778 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7779 MSA_FLOAT_UNOP(pwx->d[i], sqrt, pws->d[i], 64);
7780 }
7781 break;
7782 default:
7783 assert(0);
7784 }
7785
7786 check_msacsr_cause(env, GETPC());
7787
7788 msa_move_v(pwd, pwx);
7789 }
7790
7791 #define MSA_FLOAT_RECIPROCAL(DEST, ARG, BITS) \
7792 do { \
7793 float_status *status = &env->active_tc.msa_fp_status; \
7794 int c; \
7795 \
7796 set_float_exception_flags(0, status); \
7797 DEST = float ## BITS ## _ ## div(FLOAT_ONE ## BITS, ARG, status); \
7798 c = update_msacsr(env, float ## BITS ## _is_infinity(ARG) || \
7799 float ## BITS ## _is_quiet_nan(DEST, status) ? \
7800 0 : RECIPROCAL_INEXACT, \
7801 IS_DENORMAL(DEST, BITS)); \
7802 \
7803 if (get_enabled_exceptions(env, c)) { \
7804 DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \
7805 } \
7806 } while (0)
7807
7808 void helper_msa_frsqrt_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7809 uint32_t ws)
7810 {
7811 wr_t wx, *pwx = &wx;
7812 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7813 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7814 uint32_t i;
7815
7816 clear_msacsr_cause(env);
7817
7818 switch (df) {
7819 case DF_WORD:
7820 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7821 MSA_FLOAT_RECIPROCAL(pwx->w[i], float32_sqrt(pws->w[i],
7822 &env->active_tc.msa_fp_status), 32);
7823 }
7824 break;
7825 case DF_DOUBLE:
7826 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7827 MSA_FLOAT_RECIPROCAL(pwx->d[i], float64_sqrt(pws->d[i],
7828 &env->active_tc.msa_fp_status), 64);
7829 }
7830 break;
7831 default:
7832 assert(0);
7833 }
7834
7835 check_msacsr_cause(env, GETPC());
7836
7837 msa_move_v(pwd, pwx);
7838 }
7839
7840 void helper_msa_frcp_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7841 uint32_t ws)
7842 {
7843 wr_t wx, *pwx = &wx;
7844 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7845 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7846 uint32_t i;
7847
7848 clear_msacsr_cause(env);
7849
7850 switch (df) {
7851 case DF_WORD:
7852 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7853 MSA_FLOAT_RECIPROCAL(pwx->w[i], pws->w[i], 32);
7854 }
7855 break;
7856 case DF_DOUBLE:
7857 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7858 MSA_FLOAT_RECIPROCAL(pwx->d[i], pws->d[i], 64);
7859 }
7860 break;
7861 default:
7862 assert(0);
7863 }
7864
7865 check_msacsr_cause(env, GETPC());
7866
7867 msa_move_v(pwd, pwx);
7868 }
7869
7870 void helper_msa_frint_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7871 uint32_t ws)
7872 {
7873 wr_t wx, *pwx = &wx;
7874 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7875 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7876 uint32_t i;
7877
7878 clear_msacsr_cause(env);
7879
7880 switch (df) {
7881 case DF_WORD:
7882 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7883 MSA_FLOAT_UNOP(pwx->w[i], round_to_int, pws->w[i], 32);
7884 }
7885 break;
7886 case DF_DOUBLE:
7887 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7888 MSA_FLOAT_UNOP(pwx->d[i], round_to_int, pws->d[i], 64);
7889 }
7890 break;
7891 default:
7892 assert(0);
7893 }
7894
7895 check_msacsr_cause(env, GETPC());
7896
7897 msa_move_v(pwd, pwx);
7898 }
7899
7900 #define MSA_FLOAT_LOGB(DEST, ARG, BITS) \
7901 do { \
7902 float_status *status = &env->active_tc.msa_fp_status; \
7903 int c; \
7904 \
7905 set_float_exception_flags(0, status); \
7906 set_float_rounding_mode(float_round_down, status); \
7907 DEST = float ## BITS ## _ ## log2(ARG, status); \
7908 DEST = float ## BITS ## _ ## round_to_int(DEST, status); \
7909 set_float_rounding_mode(ieee_rm[(env->active_tc.msacsr & \
7910 MSACSR_RM_MASK) >> MSACSR_RM], \
7911 status); \
7912 \
7913 set_float_exception_flags(get_float_exception_flags(status) & \
7914 (~float_flag_inexact), \
7915 status); \
7916 \
7917 c = update_msacsr(env, 0, IS_DENORMAL(DEST, BITS)); \
7918 \
7919 if (get_enabled_exceptions(env, c)) { \
7920 DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \
7921 } \
7922 } while (0)
7923
7924 void helper_msa_flog2_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7925 uint32_t ws)
7926 {
7927 wr_t wx, *pwx = &wx;
7928 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7929 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7930 uint32_t i;
7931
7932 clear_msacsr_cause(env);
7933
7934 switch (df) {
7935 case DF_WORD:
7936 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7937 MSA_FLOAT_LOGB(pwx->w[i], pws->w[i], 32);
7938 }
7939 break;
7940 case DF_DOUBLE:
7941 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7942 MSA_FLOAT_LOGB(pwx->d[i], pws->d[i], 64);
7943 }
7944 break;
7945 default:
7946 assert(0);
7947 }
7948
7949 check_msacsr_cause(env, GETPC());
7950
7951 msa_move_v(pwd, pwx);
7952 }
7953
7954 void helper_msa_fexupl_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7955 uint32_t ws)
7956 {
7957 wr_t wx, *pwx = &wx;
7958 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7959 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7960 uint32_t i;
7961
7962 clear_msacsr_cause(env);
7963
7964 switch (df) {
7965 case DF_WORD:
7966 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7967 /*
7968 * Half precision floats come in two formats: standard
7969 * IEEE and "ARM" format. The latter gains extra exponent
7970 * range by omitting the NaN/Inf encodings.
7971 */
7972 bool ieee = true;
7973
7974 MSA_FLOAT_BINOP(pwx->w[i], from_float16, Lh(pws, i), ieee, 32);
7975 }
7976 break;
7977 case DF_DOUBLE:
7978 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7979 MSA_FLOAT_UNOP(pwx->d[i], from_float32, Lw(pws, i), 64);
7980 }
7981 break;
7982 default:
7983 assert(0);
7984 }
7985
7986 check_msacsr_cause(env, GETPC());
7987 msa_move_v(pwd, pwx);
7988 }
7989
7990 void helper_msa_fexupr_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7991 uint32_t ws)
7992 {
7993 wr_t wx, *pwx = &wx;
7994 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7995 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7996 uint32_t i;
7997
7998 clear_msacsr_cause(env);
7999
8000 switch (df) {
8001 case DF_WORD:
8002 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
8003 /*
8004 * Half precision floats come in two formats: standard
8005 * IEEE and "ARM" format. The latter gains extra exponent
8006 * range by omitting the NaN/Inf encodings.
8007 */
8008 bool ieee = true;
8009
8010 MSA_FLOAT_BINOP(pwx->w[i], from_float16, Rh(pws, i), ieee, 32);
8011 }
8012 break;
8013 case DF_DOUBLE:
8014 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
8015 MSA_FLOAT_UNOP(pwx->d[i], from_float32, Rw(pws, i), 64);
8016 }
8017 break;
8018 default:
8019 assert(0);
8020 }
8021
8022 check_msacsr_cause(env, GETPC());
8023 msa_move_v(pwd, pwx);
8024 }
8025
8026 void helper_msa_ffql_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
8027 uint32_t ws)
8028 {
8029 wr_t wx, *pwx = &wx;
8030 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
8031 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
8032 uint32_t i;
8033
8034 switch (df) {
8035 case DF_WORD:
8036 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
8037 MSA_FLOAT_UNOP(pwx->w[i], from_q16, Lh(pws, i), 32);
8038 }
8039 break;
8040 case DF_DOUBLE:
8041 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
8042 MSA_FLOAT_UNOP(pwx->d[i], from_q32, Lw(pws, i), 64);
8043 }
8044 break;
8045 default:
8046 assert(0);
8047 }
8048
8049 msa_move_v(pwd, pwx);
8050 }
8051
8052 void helper_msa_ffqr_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
8053 uint32_t ws)
8054 {
8055 wr_t wx, *pwx = &wx;
8056 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
8057 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
8058 uint32_t i;
8059
8060 switch (df) {
8061 case DF_WORD:
8062 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
8063 MSA_FLOAT_UNOP(pwx->w[i], from_q16, Rh(pws, i), 32);
8064 }
8065 break;
8066 case DF_DOUBLE:
8067 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
8068 MSA_FLOAT_UNOP(pwx->d[i], from_q32, Rw(pws, i), 64);
8069 }
8070 break;
8071 default:
8072 assert(0);
8073 }
8074
8075 msa_move_v(pwd, pwx);
8076 }
8077
8078 void helper_msa_ftint_s_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
8079 uint32_t ws)
8080 {
8081 wr_t wx, *pwx = &wx;
8082 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
8083 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
8084 uint32_t i;
8085
8086 clear_msacsr_cause(env);
8087
8088 switch (df) {
8089 case DF_WORD:
8090 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
8091 MSA_FLOAT_UNOP0(pwx->w[i], to_int32, pws->w[i], 32);
8092 }
8093 break;
8094 case DF_DOUBLE:
8095 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
8096 MSA_FLOAT_UNOP0(pwx->d[i], to_int64, pws->d[i], 64);
8097 }
8098 break;
8099 default:
8100 assert(0);
8101 }
8102
8103 check_msacsr_cause(env, GETPC());
8104
8105 msa_move_v(pwd, pwx);
8106 }
8107
8108 void helper_msa_ftint_u_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
8109 uint32_t ws)
8110 {
8111 wr_t wx, *pwx = &wx;
8112 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
8113 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
8114 uint32_t i;
8115
8116 clear_msacsr_cause(env);
8117
8118 switch (df) {
8119 case DF_WORD:
8120 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
8121 MSA_FLOAT_UNOP0(pwx->w[i], to_uint32, pws->w[i], 32);
8122 }
8123 break;
8124 case DF_DOUBLE:
8125 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
8126 MSA_FLOAT_UNOP0(pwx->d[i], to_uint64, pws->d[i], 64);
8127 }
8128 break;
8129 default:
8130 assert(0);
8131 }
8132
8133 check_msacsr_cause(env, GETPC());
8134
8135 msa_move_v(pwd, pwx);
8136 }
8137
8138 #define float32_from_int32 int32_to_float32
8139 #define float32_from_uint32 uint32_to_float32
8140
8141 #define float64_from_int64 int64_to_float64
8142 #define float64_from_uint64 uint64_to_float64
8143
8144 void helper_msa_ffint_s_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
8145 uint32_t ws)
8146 {
8147 wr_t wx, *pwx = &wx;
8148 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
8149 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
8150 uint32_t i;
8151
8152 clear_msacsr_cause(env);
8153
8154 switch (df) {
8155 case DF_WORD:
8156 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
8157 MSA_FLOAT_UNOP(pwx->w[i], from_int32, pws->w[i], 32);
8158 }
8159 break;
8160 case DF_DOUBLE:
8161 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
8162 MSA_FLOAT_UNOP(pwx->d[i], from_int64, pws->d[i], 64);
8163 }
8164 break;
8165 default:
8166 assert(0);
8167 }
8168
8169 check_msacsr_cause(env, GETPC());
8170
8171 msa_move_v(pwd, pwx);
8172 }
8173
8174 void helper_msa_ffint_u_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
8175 uint32_t ws)
8176 {
8177 wr_t wx, *pwx = &wx;
8178 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
8179 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
8180 uint32_t i;
8181
8182 clear_msacsr_cause(env);
8183
8184 switch (df) {
8185 case DF_WORD:
8186 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
8187 MSA_FLOAT_UNOP(pwx->w[i], from_uint32, pws->w[i], 32);
8188 }
8189 break;
8190 case DF_DOUBLE:
8191 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
8192 MSA_FLOAT_UNOP(pwx->d[i], from_uint64, pws->d[i], 64);
8193 }
8194 break;
8195 default:
8196 assert(0);
8197 }
8198
8199 check_msacsr_cause(env, GETPC());
8200
8201 msa_move_v(pwd, pwx);
8202 }
AR7 emulation for QEMU