hw/dma: Add SiFive platform DMA controller emulation
[qemu/ar7.git] / include / hw / block / swim.h
blob9d8b65c5617e5f8938b620a97a115f1e3076f809
1 /*
2 * QEMU Macintosh floppy disk controller emulator (SWIM)
4 * Copyright (c) 2014-2018 Laurent Vivier <laurent@vivier.eu>
6 * This work is licensed under the terms of the GNU GPL, version 2. See
7 * the COPYING file in the top-level directory.
9 */
11 #ifndef SWIM_H
12 #define SWIM_H
14 #include "qemu/osdep.h"
15 #include "hw/sysbus.h"
17 #define SWIM_MAX_FD 2
19 typedef struct SWIMDrive SWIMDrive;
20 typedef struct SWIMBus SWIMBus;
21 typedef struct SWIMCtrl SWIMCtrl;
23 #define TYPE_SWIM_DRIVE "swim-drive"
24 #define SWIM_DRIVE(obj) OBJECT_CHECK(SWIMDrive, (obj), TYPE_SWIM_DRIVE)
26 struct SWIMDrive {
27 DeviceState qdev;
28 int32_t unit;
29 BlockConf conf;
32 #define TYPE_SWIM_BUS "swim-bus"
33 #define SWIM_BUS(obj) OBJECT_CHECK(SWIMBus, (obj), TYPE_SWIM_BUS)
35 struct SWIMBus {
36 BusState bus;
37 struct SWIMCtrl *ctrl;
40 typedef struct FDrive {
41 SWIMCtrl *swimctrl;
42 BlockBackend *blk;
43 BlockConf *conf;
44 } FDrive;
46 struct SWIMCtrl {
47 MemoryRegion iomem;
48 FDrive drives[SWIM_MAX_FD];
49 int mode;
50 /* IWM mode */
51 int iwm_switch;
52 uint16_t regs[8];
53 #define IWM_PH0 0
54 #define IWM_PH1 1
55 #define IWM_PH2 2
56 #define IWM_PH3 3
57 #define IWM_MTR 4
58 #define IWM_DRIVE 5
59 #define IWM_Q6 6
60 #define IWM_Q7 7
61 uint8_t iwm_data;
62 uint8_t iwm_mode;
63 /* SWIM mode */
64 uint8_t swim_phase;
65 uint8_t swim_mode;
66 SWIMBus bus;
69 #define TYPE_SWIM "swim"
70 #define SWIM(obj) OBJECT_CHECK(Swim, (obj), TYPE_SWIM)
72 typedef struct Swim {
73 SysBusDevice parent_obj;
74 SWIMCtrl ctrl;
75 } Swim;
76 #endif