hw/dma: Add SiFive platform DMA controller emulation
[qemu/ar7.git] / hw / nios2 / cpu_pic.c
blob5ea7e52ab8302e5153981baf78bba76c79ce4506
1 /*
2 * Altera Nios2 CPU PIC
4 * Copyright (c) 2016 Marek Vasut <marek.vasut@gmail.com>
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2.1 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see
18 * <http://www.gnu.org/licenses/lgpl-2.1.html>
21 #include "qemu/osdep.h"
22 #include "cpu.h"
23 #include "hw/irq.h"
25 #include "qemu/config-file.h"
27 #include "boot.h"
29 static void nios2_pic_cpu_handler(void *opaque, int irq, int level)
31 Nios2CPU *cpu = opaque;
32 CPUNios2State *env = &cpu->env;
33 CPUState *cs = CPU(cpu);
34 int type = irq ? CPU_INTERRUPT_NMI : CPU_INTERRUPT_HARD;
36 if (type == CPU_INTERRUPT_HARD) {
37 env->irq_pending = level;
39 if (level && (env->regs[CR_STATUS] & CR_STATUS_PIE)) {
40 env->irq_pending = 0;
41 cpu_interrupt(cs, type);
42 } else if (!level) {
43 env->irq_pending = 0;
44 cpu_reset_interrupt(cs, type);
46 } else {
47 if (level) {
48 cpu_interrupt(cs, type);
49 } else {
50 cpu_reset_interrupt(cs, type);
55 void nios2_check_interrupts(CPUNios2State *env)
57 if (env->irq_pending &&
58 (env->regs[CR_STATUS] & CR_STATUS_PIE)) {
59 env->irq_pending = 0;
60 cpu_interrupt(env_cpu(env), CPU_INTERRUPT_HARD);
64 qemu_irq *nios2_cpu_pic_init(Nios2CPU *cpu)
66 return qemu_allocate_irqs(nios2_pic_cpu_handler, cpu, 2);