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HEAD
target-arm: Add the pmovsclr_el0 and pmintenclr_el1 registers
[qemu/ar7.git]
/
target-xtensa
/
Makefile.objs
blob
481de91973859ff784b11e8fe9188a4f8208ca3a
1
obj-y += xtensa-semi.o
2
obj-y += core-dc232b.o
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obj-y += core-dc233c.o
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obj-y += core-fsf.o
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obj-$(CONFIG_SOFTMMU) += monitor.o
6
obj-y += translate.o op_helper.o helper.o cpu.o
7
obj-y += gdbstub.o