4 The memory API models the memory and I/O buses and controllers of a QEMU
5 machine. It attempts to allow modelling of:
8 - memory-mapped I/O (MMIO)
9 - memory controllers that can dynamically reroute physical memory regions
10 to different destinations
12 The memory model provides support for
14 - tracking RAM changes by the guest
15 - setting up coalesced memory for kvm
16 - setting up ioeventfd regions for kvm
18 Memory is modelled as an acyclic graph of MemoryRegion objects. Sinks
19 (leaves) are RAM and MMIO regions, while other nodes represent
20 buses, memory controllers, and memory regions that have been rerouted.
22 In addition to MemoryRegion objects, the memory API provides AddressSpace
23 objects for every root and possibly for intermediate MemoryRegions too.
24 These represent memory as seen from the CPU or a device's viewpoint.
29 There are multiple types of memory regions (all represented by a single C type
32 - RAM: a RAM region is simply a range of host memory that can be made available
34 You typically initialize these with memory_region_init_ram(). Some special
35 purposes require the variants memory_region_init_resizeable_ram(),
36 memory_region_init_ram_from_file(), or memory_region_init_ram_ptr().
38 - MMIO: a range of guest memory that is implemented by host callbacks;
39 each read or write causes a callback to be called on the host.
40 You initialize these with memory_region_init_io(), passing it a
41 MemoryRegionOps structure describing the callbacks.
43 - ROM: a ROM memory region works like RAM for reads (directly accessing
44 a region of host memory), and forbids writes. You initialize these with
45 memory_region_init_rom().
47 - ROM device: a ROM device memory region works like RAM for reads
48 (directly accessing a region of host memory), but like MMIO for
49 writes (invoking a callback). You initialize these with
50 memory_region_init_rom_device().
52 - IOMMU region: an IOMMU region translates addresses of accesses made to it
53 and forwards them to some other target memory region. As the name suggests,
54 these are only needed for modelling an IOMMU, not for simple devices.
55 You initialize these with memory_region_init_iommu().
57 - container: a container simply includes other memory regions, each at
58 a different offset. Containers are useful for grouping several regions
59 into one unit. For example, a PCI BAR may be composed of a RAM region
62 A container's subregions are usually non-overlapping. In some cases it is
63 useful to have overlapping regions; for example a memory controller that
64 can overlay a subregion of RAM with MMIO or ROM, or a PCI controller
65 that does not prevent card from claiming overlapping BARs.
67 You initialize a pure container with memory_region_init().
69 - alias: a subsection of another region. Aliases allow a region to be
70 split apart into discontiguous regions. Examples of uses are memory banks
71 used when the guest address space is smaller than the amount of RAM
72 addressed, or a memory controller that splits main memory to expose a "PCI
73 hole". Aliases may point to any type of region, including other aliases,
74 but an alias may not point back to itself, directly or indirectly.
75 You initialize these with memory_region_init_alias().
77 - reservation region: a reservation region is primarily for debugging.
78 It claims I/O space that is not supposed to be handled by QEMU itself.
79 The typical use is to track parts of the address space which will be
80 handled by the host kernel when KVM is enabled. You initialize these
81 by passing a NULL callback parameter to memory_region_init_io().
83 It is valid to add subregions to a region which is not a pure container
84 (that is, to an MMIO, RAM or ROM region). This means that the region
85 will act like a container, except that any addresses within the container's
86 region which are not claimed by any subregion are handled by the
87 container itself (ie by its MMIO callbacks or RAM backing). However
88 it is generally possible to achieve the same effect with a pure container
89 one of whose subregions is a low priority "background" region covering
90 the whole address range; this is often clearer and is preferred.
91 Subregions cannot be added to an alias region.
96 Where the memory region is backed by host memory (RAM, ROM and
97 ROM device memory region types), this host memory needs to be
98 copied to the destination on migration. These APIs which allocate
99 the host memory for you will also register the memory so it is
101 - memory_region_init_ram()
102 - memory_region_init_rom()
103 - memory_region_init_rom_device()
105 For most devices and boards this is the correct thing. If you
106 have a special case where you need to manage the migration of
107 the backing memory yourself, you can call the functions:
108 - memory_region_init_ram_nomigrate()
109 - memory_region_init_rom_nomigrate()
110 - memory_region_init_rom_device_nomigrate()
111 which only initialize the MemoryRegion and leave handling
112 migration to the caller.
115 - memory_region_init_resizeable_ram()
116 - memory_region_init_ram_from_file()
117 - memory_region_init_ram_from_fd()
118 - memory_region_init_ram_ptr()
119 - memory_region_init_ram_device_ptr()
120 are for special cases only, and so they do not automatically
121 register the backing memory for migration; the caller must
122 manage migration if necessary.
127 Regions are assigned names by the constructor. For most regions these are
128 only used for debugging purposes, but RAM regions also use the name to identify
129 live migration sections. This means that RAM region names need to have ABI
135 A region is created by one of the memory_region_init*() functions and
136 attached to an object, which acts as its owner or parent. QEMU ensures
137 that the owner object remains alive as long as the region is visible to
138 the guest, or as long as the region is in use by a virtual CPU or another
139 device. For example, the owner object will not die between an
140 address_space_map operation and the corresponding address_space_unmap.
142 After creation, a region can be added to an address space or a
143 container with memory_region_add_subregion(), and removed using
144 memory_region_del_subregion().
146 Various region attributes (read-only, dirty logging, coalesced mmio,
147 ioeventfd) can be changed during the region lifecycle. They take effect
148 as soon as the region is made visible. This can be immediately, later,
151 Destruction of a memory region happens automatically when the owner
154 If however the memory region is part of a dynamically allocated data
155 structure, you should call object_unparent() to destroy the memory region
156 before the data structure is freed. For an example see VFIOMSIXInfo
157 and VFIOQuirk in hw/vfio/pci.c.
159 You must not destroy a memory region as long as it may be in use by a
160 device or CPU. In order to do this, as a general rule do not create or
161 destroy memory regions dynamically during a device's lifetime, and only
162 call object_unparent() in the memory region owner's instance_finalize
163 callback. The dynamically allocated data structure that contains the
164 memory region then should obviously be freed in the instance_finalize
167 If you break this rule, the following situation can happen:
169 - the memory region's owner had a reference taken via memory_region_ref
170 (for example by address_space_map)
172 - the region is unparented, and has no owner anymore
174 - when address_space_unmap is called, the reference to the memory region's
178 There is an exception to the above rule: it is okay to call
179 object_unparent at any time for an alias or a container region. It is
180 therefore also okay to create or destroy alias and container regions
181 dynamically during a device's lifetime.
183 This exceptional usage is valid because aliases and containers only help
184 QEMU building the guest's memory map; they are never accessed directly.
185 memory_region_ref and memory_region_unref are never called on aliases
186 or containers, and the above situation then cannot happen. Exploiting
187 this exception is rarely necessary, and therefore it is discouraged,
188 but nevertheless it is used in a few places.
190 For regions that "have no owner" (NULL is passed at creation time), the
191 machine object is actually used as the owner. Since instance_finalize is
192 never called for the machine object, you must never call object_unparent
193 on regions that have no owner, unless they are aliases or containers.
196 Overlapping regions and priority
197 --------------------------------
198 Usually, regions may not overlap each other; a memory address decodes into
199 exactly one target. In some cases it is useful to allow regions to overlap,
200 and sometimes to control which of an overlapping regions is visible to the
201 guest. This is done with memory_region_add_subregion_overlap(), which
202 allows the region to overlap any other region in the same container, and
203 specifies a priority that allows the core to decide which of two regions at
204 the same address are visible (highest wins).
205 Priority values are signed, and the default value is zero. This means that
206 you can use memory_region_add_subregion_overlap() both to specify a region
207 that must sit 'above' any others (with a positive priority) and also a
208 background region that sits 'below' others (with a negative priority).
210 If the higher priority region in an overlap is a container or alias, then
211 the lower priority region will appear in any "holes" that the higher priority
212 region has left by not mapping subregions to that area of its address range.
213 (This applies recursively -- if the subregions are themselves containers or
214 aliases that leave holes then the lower priority region will appear in these
217 For example, suppose we have a container A of size 0x8000 with two subregions
218 B and C. B is a container mapped at 0x2000, size 0x4000, priority 2; C is
219 an MMIO region mapped at 0x0, size 0x6000, priority 1. B currently has two
220 of its own subregions: D of size 0x1000 at offset 0 and E of size 0x1000 at
221 offset 0x2000. As a diagram:
223 0 1000 2000 3000 4000 5000 6000 7000 8000
224 |------|------|------|------|------|------|------|------|
226 C: [CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC]
231 The regions that will be seen within this address range then are:
232 [CCCCCCCCCCCC][DDDDD][CCCCC][EEEEE][CCCCC]
234 Since B has higher priority than C, its subregions appear in the flat map
235 even where they overlap with C. In ranges where B has not mapped anything
238 If B had provided its own MMIO operations (ie it was not a pure container)
239 then these would be used for any addresses in its range not handled by
240 D or E, and the result would be:
241 [CCCCCCCCCCCC][DDDDD][BBBBB][EEEEE][BBBBB]
243 Priority values are local to a container, because the priorities of two
244 regions are only compared when they are both children of the same container.
245 This means that the device in charge of the container (typically modelling
246 a bus or a memory controller) can use them to manage the interaction of
247 its child regions without any side effects on other parts of the system.
248 In the example above, the priorities of D and E are unimportant because
249 they do not overlap each other. It is the relative priority of B and C
250 that causes D and E to appear on top of C: D and E's priorities are never
251 compared against the priority of C.
255 The memory core uses the following rules to select a memory region when the
256 guest accesses an address:
258 - all direct subregions of the root region are matched against the address, in
259 descending priority order
260 - if the address lies outside the region offset/size, the subregion is
262 - if the subregion is a leaf (RAM or MMIO), the search terminates, returning
264 - if the subregion is a container, the same algorithm is used within the
265 subregion (after the address is adjusted by the subregion offset)
266 - if the subregion is an alias, the search is continued at the alias target
267 (after the address is adjusted by the subregion offset and alias offset)
268 - if a recursive search within a container or alias subregion does not
269 find a match (because of a "hole" in the container's coverage of its
270 address range), then if this is a container with its own MMIO or RAM
271 backing the search terminates, returning the container itself. Otherwise
272 we continue with the next subregion in priority order
273 - if none of the subregions match the address then the search terminates
279 system_memory: container@0-2^48-1
281 +---- lomem: alias@0-0xdfffffff ---> #ram (0-0xdfffffff)
283 +---- himem: alias@0x100000000-0x11fffffff ---> #ram (0xe0000000-0xffffffff)
285 +---- vga-window: alias@0xa0000-0xbffff ---> #pci (0xa0000-0xbffff)
288 +---- pci-hole: alias@0xe0000000-0xffffffff ---> #pci (0xe0000000-0xffffffff)
292 +--- vga-area: container@0xa0000-0xbffff
294 | +--- alias@0x00000-0x7fff ---> #vram (0x010000-0x017fff)
296 | +--- alias@0x08000-0xffff ---> #vram (0x020000-0x027fff)
298 +---- vram: ram@0xe1000000-0xe1ffffff
300 +---- vga-mmio: mmio@0xe2000000-0xe200ffff
302 ram: ram@0x00000000-0xffffffff
304 This is a (simplified) PC memory map. The 4GB RAM block is mapped into the
305 system address space via two aliases: "lomem" is a 1:1 mapping of the first
306 3.5GB; "himem" maps the last 0.5GB at address 4GB. This leaves 0.5GB for the
307 so-called PCI hole, that allows a 32-bit PCI bus to exist in a system with
310 The memory controller diverts addresses in the range 640K-768K to the PCI
311 address space. This is modelled using the "vga-window" alias, mapped at a
312 higher priority so it obscures the RAM at the same addresses. The vga window
313 can be removed by programming the memory controller; this is modelled by
314 removing the alias and exposing the RAM underneath.
316 The pci address space is not a direct child of the system address space, since
317 we only want parts of it to be visible (we accomplish this using aliases).
318 It has two subregions: vga-area models the legacy vga window and is occupied
319 by two 32K memory banks pointing at two sections of the framebuffer.
320 In addition the vram is mapped as a BAR at address e1000000, and an additional
321 BAR containing MMIO registers is mapped after it.
323 Note that if the guest maps a BAR outside the PCI hole, it would not be
324 visible as the pci-hole alias clips it to a 0.5GB range.
329 MMIO regions are provided with ->read() and ->write() callbacks,
330 which are sufficient for most devices. Some devices change behaviour
331 based on the attributes used for the memory transaction, or need
332 to be able to respond that the access should provoke a bus error
333 rather than completing successfully; those devices can use the
334 ->read_with_attrs() and ->write_with_attrs() callbacks instead.
336 In addition various constraints can be supplied to control how these
337 callbacks are called:
339 - .valid.min_access_size, .valid.max_access_size define the access sizes
340 (in bytes) which the device accepts; accesses outside this range will
341 have device and bus specific behaviour (ignored, or machine check)
342 - .valid.unaligned specifies that the *device being modelled* supports
343 unaligned accesses; if false, unaligned accesses will invoke the
344 appropriate bus or CPU specific behaviour.
345 - .impl.min_access_size, .impl.max_access_size define the access sizes
346 (in bytes) supported by the *implementation*; other access sizes will be
347 emulated using the ones available. For example a 4-byte write will be
348 emulated using four 1-byte writes, if .impl.max_access_size = 1.
349 - .impl.unaligned specifies that the *implementation* supports unaligned
350 accesses; if false, unaligned accesses will be emulated by two aligned