2 * QEMU models for LatticeMico32 uclinux and evr32 boards.
4 * Copyright (c) 2010 Michael Walle <michael@walle.cc>
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
20 #include "qemu/osdep.h"
21 #include "qemu/units.h"
22 #include "qemu/error-report.h"
24 #include "hw/sysbus.h"
26 #include "hw/block/flash.h"
27 #include "hw/boards.h"
28 #include "hw/loader.h"
30 #include "lm32_hwsetup.h"
32 #include "exec/address-spaces.h"
33 #include "sysemu/sysemu.h"
45 static void cpu_irq_handler(void *opaque
, int irq
, int level
)
47 LM32CPU
*cpu
= opaque
;
48 CPUState
*cs
= CPU(cpu
);
51 cpu_interrupt(cs
, CPU_INTERRUPT_HARD
);
53 cpu_reset_interrupt(cs
, CPU_INTERRUPT_HARD
);
57 static void main_cpu_reset(void *opaque
)
59 ResetInfo
*reset_info
= opaque
;
60 CPULM32State
*env
= &reset_info
->cpu
->env
;
62 cpu_reset(CPU(reset_info
->cpu
));
65 env
->pc
= (uint32_t)reset_info
->bootstrap_pc
;
66 env
->regs
[R_R1
] = (uint32_t)reset_info
->hwsetup_base
;
67 env
->regs
[R_R2
] = (uint32_t)reset_info
->cmdline_base
;
68 env
->regs
[R_R3
] = (uint32_t)reset_info
->initrd_base
;
69 env
->regs
[R_R4
] = (uint32_t)(reset_info
->initrd_base
+
70 reset_info
->initrd_size
);
71 env
->eba
= reset_info
->flash_base
;
72 env
->deba
= reset_info
->flash_base
;
75 static void lm32_evr_init(MachineState
*machine
)
77 const char *kernel_filename
= machine
->kernel_filename
;
81 MemoryRegion
*address_space_mem
= get_system_memory();
82 MemoryRegion
*phys_ram
= g_new(MemoryRegion
, 1);
84 ResetInfo
*reset_info
;
88 hwaddr flash_base
= 0x04000000;
89 size_t flash_sector_size
= 256 * KiB
;
90 size_t flash_size
= 32 * MiB
;
91 hwaddr ram_base
= 0x08000000;
92 size_t ram_size
= 64 * MiB
;
93 hwaddr timer0_base
= 0x80002000;
94 hwaddr uart0_base
= 0x80006000;
95 hwaddr timer1_base
= 0x8000a000;
100 reset_info
= g_malloc0(sizeof(ResetInfo
));
102 cpu
= LM32_CPU(cpu_create(machine
->cpu_type
));
105 reset_info
->cpu
= cpu
;
107 reset_info
->flash_base
= flash_base
;
109 memory_region_allocate_system_memory(phys_ram
, NULL
, "lm32_evr.sdram",
111 memory_region_add_subregion(address_space_mem
, ram_base
, phys_ram
);
113 dinfo
= drive_get(IF_PFLASH
, 0, 0);
114 /* Spansion S29NS128P */
115 pflash_cfi02_register(flash_base
, "lm32_evr.flash", flash_size
,
116 dinfo
? blk_by_legacy_dinfo(dinfo
) : NULL
,
118 1, 2, 0x01, 0x7e, 0x43, 0x00, 0x555, 0x2aa, 1);
120 /* create irq lines */
121 env
->pic_state
= lm32_pic_init(qemu_allocate_irq(cpu_irq_handler
, cpu
, 0));
122 for (i
= 0; i
< 32; i
++) {
123 irq
[i
] = qdev_get_gpio_in(env
->pic_state
, i
);
126 lm32_uart_create(uart0_base
, irq
[uart0_irq
], serial_hd(0));
127 sysbus_create_simple("lm32-timer", timer0_base
, irq
[timer0_irq
]);
128 sysbus_create_simple("lm32-timer", timer1_base
, irq
[timer1_irq
]);
130 /* make sure juart isn't the first chardev */
131 env
->juart_state
= lm32_juart_init(serial_hd(1));
133 reset_info
->bootstrap_pc
= flash_base
;
135 if (kernel_filename
) {
139 kernel_size
= load_elf(kernel_filename
, NULL
, NULL
, NULL
,
141 1, EM_LATTICEMICO32
, 0, 0);
142 reset_info
->bootstrap_pc
= entry
;
144 if (kernel_size
< 0) {
145 kernel_size
= load_image_targphys(kernel_filename
, ram_base
,
147 reset_info
->bootstrap_pc
= ram_base
;
150 if (kernel_size
< 0) {
151 error_report("could not load kernel '%s'", kernel_filename
);
156 qemu_register_reset(main_cpu_reset
, reset_info
);
159 static void lm32_uclinux_init(MachineState
*machine
)
161 const char *kernel_filename
= machine
->kernel_filename
;
162 const char *kernel_cmdline
= machine
->kernel_cmdline
;
163 const char *initrd_filename
= machine
->initrd_filename
;
167 MemoryRegion
*address_space_mem
= get_system_memory();
168 MemoryRegion
*phys_ram
= g_new(MemoryRegion
, 1);
171 ResetInfo
*reset_info
;
175 hwaddr flash_base
= 0x04000000;
176 size_t flash_sector_size
= 256 * KiB
;
177 size_t flash_size
= 32 * MiB
;
178 hwaddr ram_base
= 0x08000000;
179 size_t ram_size
= 64 * MiB
;
180 hwaddr uart0_base
= 0x80000000;
181 hwaddr timer0_base
= 0x80002000;
182 hwaddr timer1_base
= 0x80010000;
183 hwaddr timer2_base
= 0x80012000;
188 hwaddr hwsetup_base
= 0x0bffe000;
189 hwaddr cmdline_base
= 0x0bfff000;
190 hwaddr initrd_base
= 0x08400000;
191 size_t initrd_max
= 0x01000000;
193 reset_info
= g_malloc0(sizeof(ResetInfo
));
195 cpu
= LM32_CPU(cpu_create(machine
->cpu_type
));
198 reset_info
->cpu
= cpu
;
200 reset_info
->flash_base
= flash_base
;
202 memory_region_allocate_system_memory(phys_ram
, NULL
,
203 "lm32_uclinux.sdram", ram_size
);
204 memory_region_add_subregion(address_space_mem
, ram_base
, phys_ram
);
206 dinfo
= drive_get(IF_PFLASH
, 0, 0);
207 /* Spansion S29NS128P */
208 pflash_cfi02_register(flash_base
, "lm32_uclinux.flash", flash_size
,
209 dinfo
? blk_by_legacy_dinfo(dinfo
) : NULL
,
211 1, 2, 0x01, 0x7e, 0x43, 0x00, 0x555, 0x2aa, 1);
213 /* create irq lines */
214 env
->pic_state
= lm32_pic_init(qemu_allocate_irq(cpu_irq_handler
, env
, 0));
215 for (i
= 0; i
< 32; i
++) {
216 irq
[i
] = qdev_get_gpio_in(env
->pic_state
, i
);
219 lm32_uart_create(uart0_base
, irq
[uart0_irq
], serial_hd(0));
220 sysbus_create_simple("lm32-timer", timer0_base
, irq
[timer0_irq
]);
221 sysbus_create_simple("lm32-timer", timer1_base
, irq
[timer1_irq
]);
222 sysbus_create_simple("lm32-timer", timer2_base
, irq
[timer2_irq
]);
224 /* make sure juart isn't the first chardev */
225 env
->juart_state
= lm32_juart_init(serial_hd(1));
227 reset_info
->bootstrap_pc
= flash_base
;
229 if (kernel_filename
) {
233 kernel_size
= load_elf(kernel_filename
, NULL
, NULL
, NULL
,
235 1, EM_LATTICEMICO32
, 0, 0);
236 reset_info
->bootstrap_pc
= entry
;
238 if (kernel_size
< 0) {
239 kernel_size
= load_image_targphys(kernel_filename
, ram_base
,
241 reset_info
->bootstrap_pc
= ram_base
;
244 if (kernel_size
< 0) {
245 error_report("could not load kernel '%s'", kernel_filename
);
250 /* generate a rom with the hardware description */
252 hwsetup_add_cpu(hw
, "LM32", 75000000);
253 hwsetup_add_flash(hw
, "flash", flash_base
, flash_size
);
254 hwsetup_add_ddr_sdram(hw
, "ddr_sdram", ram_base
, ram_size
);
255 hwsetup_add_timer(hw
, "timer0", timer0_base
, timer0_irq
);
256 hwsetup_add_timer(hw
, "timer1_dev_only", timer1_base
, timer1_irq
);
257 hwsetup_add_timer(hw
, "timer2_dev_only", timer2_base
, timer2_irq
);
258 hwsetup_add_uart(hw
, "uart", uart0_base
, uart0_irq
);
259 hwsetup_add_trailer(hw
);
260 hwsetup_create_rom(hw
, hwsetup_base
);
263 reset_info
->hwsetup_base
= hwsetup_base
;
265 if (kernel_cmdline
&& strlen(kernel_cmdline
)) {
266 pstrcpy_targphys("cmdline", cmdline_base
, TARGET_PAGE_SIZE
,
268 reset_info
->cmdline_base
= cmdline_base
;
271 if (initrd_filename
) {
273 initrd_size
= load_image_targphys(initrd_filename
, initrd_base
,
275 reset_info
->initrd_base
= initrd_base
;
276 reset_info
->initrd_size
= initrd_size
;
279 qemu_register_reset(main_cpu_reset
, reset_info
);
282 static void lm32_evr_class_init(ObjectClass
*oc
, void *data
)
284 MachineClass
*mc
= MACHINE_CLASS(oc
);
286 mc
->desc
= "LatticeMico32 EVR32 eval system";
287 mc
->init
= lm32_evr_init
;
289 mc
->default_cpu_type
= LM32_CPU_TYPE_NAME("lm32-full");
292 static const TypeInfo lm32_evr_type
= {
293 .name
= MACHINE_TYPE_NAME("lm32-evr"),
294 .parent
= TYPE_MACHINE
,
295 .class_init
= lm32_evr_class_init
,
298 static void lm32_uclinux_class_init(ObjectClass
*oc
, void *data
)
300 MachineClass
*mc
= MACHINE_CLASS(oc
);
302 mc
->desc
= "lm32 platform for uClinux and u-boot by Theobroma Systems";
303 mc
->init
= lm32_uclinux_init
;
305 mc
->default_cpu_type
= LM32_CPU_TYPE_NAME("lm32-full");
308 static const TypeInfo lm32_uclinux_type
= {
309 .name
= MACHINE_TYPE_NAME("lm32-uclinux"),
310 .parent
= TYPE_MACHINE
,
311 .class_init
= lm32_uclinux_class_init
,
314 static void lm32_machine_init(void)
316 type_register_static(&lm32_evr_type
);
317 type_register_static(&lm32_uclinux_type
);
320 type_init(lm32_machine_init
)