4 * Copyright (c) 2006-2007 CodeSourcery.
5 * Written by Paul Brook
7 * This code is licensed under the GPL.
10 #include "qemu/osdep.h"
11 #include "qemu/error-report.h"
12 #include "qapi/error.h"
15 #include "hw/arm/arm.h"
16 #include "hw/arm/linux-boot-if.h"
17 #include "sysemu/kvm.h"
18 #include "sysemu/sysemu.h"
19 #include "sysemu/numa.h"
20 #include "hw/boards.h"
21 #include "hw/loader.h"
23 #include "sysemu/device_tree.h"
24 #include "qemu/config-file.h"
25 #include "qemu/option.h"
26 #include "exec/address-spaces.h"
28 /* Kernel boot protocol is specified in the kernel docs
29 * Documentation/arm/Booting and Documentation/arm64/booting.txt
30 * They have different preferred image load offsets from system RAM base.
32 #define KERNEL_ARGS_ADDR 0x100
33 #define KERNEL_LOAD_ADDR 0x00010000
34 #define KERNEL64_LOAD_ADDR 0x00080000
36 #define ARM64_TEXT_OFFSET_OFFSET 8
37 #define ARM64_MAGIC_OFFSET 56
39 static AddressSpace
*arm_boot_address_space(ARMCPU
*cpu
,
40 const struct arm_boot_info
*info
)
42 /* Return the address space to use for bootloader reads and writes.
43 * We prefer the secure address space if the CPU has it and we're
44 * going to boot the guest into it.
47 CPUState
*cs
= CPU(cpu
);
49 if (arm_feature(&cpu
->env
, ARM_FEATURE_EL3
) && info
->secure_boot
) {
55 return cpu_get_address_space(cs
, asidx
);
59 FIXUP_NONE
= 0, /* do nothing */
60 FIXUP_TERMINATOR
, /* end of insns */
61 FIXUP_BOARDID
, /* overwrite with board ID number */
62 FIXUP_BOARD_SETUP
, /* overwrite with board specific setup code address */
63 FIXUP_ARGPTR
, /* overwrite with pointer to kernel args */
64 FIXUP_ENTRYPOINT
, /* overwrite with kernel entry point */
65 FIXUP_GIC_CPU_IF
, /* overwrite with GIC CPU interface address */
66 FIXUP_BOOTREG
, /* overwrite with boot register address */
67 FIXUP_DSB
, /* overwrite with correct DSB insn for cpu */
71 typedef struct ARMInsnFixup
{
76 static const ARMInsnFixup bootloader_aarch64
[] = {
77 { 0x580000c0 }, /* ldr x0, arg ; Load the lower 32-bits of DTB */
78 { 0xaa1f03e1 }, /* mov x1, xzr */
79 { 0xaa1f03e2 }, /* mov x2, xzr */
80 { 0xaa1f03e3 }, /* mov x3, xzr */
81 { 0x58000084 }, /* ldr x4, entry ; Load the lower 32-bits of kernel entry */
82 { 0xd61f0080 }, /* br x4 ; Jump to the kernel entry point */
83 { 0, FIXUP_ARGPTR
}, /* arg: .word @DTB Lower 32-bits */
84 { 0 }, /* .word @DTB Higher 32-bits */
85 { 0, FIXUP_ENTRYPOINT
}, /* entry: .word @Kernel Entry Lower 32-bits */
86 { 0 }, /* .word @Kernel Entry Higher 32-bits */
87 { 0, FIXUP_TERMINATOR
}
90 /* A very small bootloader: call the board-setup code (if needed),
91 * set r0-r2, then jump to the kernel.
92 * If we're not calling boot setup code then we don't copy across
93 * the first BOOTLOADER_NO_BOARD_SETUP_OFFSET insns in this array.
96 static const ARMInsnFixup bootloader
[] = {
97 { 0xe28fe004 }, /* add lr, pc, #4 */
98 { 0xe51ff004 }, /* ldr pc, [pc, #-4] */
99 { 0, FIXUP_BOARD_SETUP
},
100 #define BOOTLOADER_NO_BOARD_SETUP_OFFSET 3
101 { 0xe3a00000 }, /* mov r0, #0 */
102 { 0xe59f1004 }, /* ldr r1, [pc, #4] */
103 { 0xe59f2004 }, /* ldr r2, [pc, #4] */
104 { 0xe59ff004 }, /* ldr pc, [pc, #4] */
105 { 0, FIXUP_BOARDID
},
107 { 0, FIXUP_ENTRYPOINT
},
108 { 0, FIXUP_TERMINATOR
}
111 /* Handling for secondary CPU boot in a multicore system.
112 * Unlike the uniprocessor/primary CPU boot, this is platform
113 * dependent. The default code here is based on the secondary
114 * CPU boot protocol used on realview/vexpress boards, with
115 * some parameterisation to increase its flexibility.
116 * QEMU platform models for which this code is not appropriate
117 * should override write_secondary_boot and secondary_cpu_reset_hook
120 * This code enables the interrupt controllers for the secondary
121 * CPUs and then puts all the secondary CPUs into a loop waiting
122 * for an interprocessor interrupt and polling a configurable
123 * location for the kernel secondary CPU entry point.
125 #define DSB_INSN 0xf57ff04f
126 #define CP15_DSB_INSN 0xee070f9a /* mcr cp15, 0, r0, c7, c10, 4 */
128 static const ARMInsnFixup smpboot
[] = {
129 { 0xe59f2028 }, /* ldr r2, gic_cpu_if */
130 { 0xe59f0028 }, /* ldr r0, bootreg_addr */
131 { 0xe3a01001 }, /* mov r1, #1 */
132 { 0xe5821000 }, /* str r1, [r2] - set GICC_CTLR.Enable */
133 { 0xe3a010ff }, /* mov r1, #0xff */
134 { 0xe5821004 }, /* str r1, [r2, 4] - set GIC_PMR.Priority to 0xff */
135 { 0, FIXUP_DSB
}, /* dsb */
136 { 0xe320f003 }, /* wfi */
137 { 0xe5901000 }, /* ldr r1, [r0] */
138 { 0xe1110001 }, /* tst r1, r1 */
139 { 0x0afffffb }, /* beq <wfi> */
140 { 0xe12fff11 }, /* bx r1 */
141 { 0, FIXUP_GIC_CPU_IF
}, /* gic_cpu_if: .word 0x.... */
142 { 0, FIXUP_BOOTREG
}, /* bootreg_addr: .word 0x.... */
143 { 0, FIXUP_TERMINATOR
}
146 static void write_bootloader(const char *name
, hwaddr addr
,
147 const ARMInsnFixup
*insns
, uint32_t *fixupcontext
,
150 /* Fix up the specified bootloader fragment and write it into
151 * guest memory using rom_add_blob_fixed(). fixupcontext is
152 * an array giving the values to write in for the fixup types
153 * which write a value into the code array.
159 while (insns
[len
].fixup
!= FIXUP_TERMINATOR
) {
163 code
= g_new0(uint32_t, len
);
165 for (i
= 0; i
< len
; i
++) {
166 uint32_t insn
= insns
[i
].insn
;
167 FixupType fixup
= insns
[i
].fixup
;
173 case FIXUP_BOARD_SETUP
:
175 case FIXUP_ENTRYPOINT
:
176 case FIXUP_GIC_CPU_IF
:
179 insn
= fixupcontext
[fixup
];
184 code
[i
] = tswap32(insn
);
187 rom_add_blob_fixed_as(name
, code
, len
* sizeof(uint32_t), addr
, as
);
192 static void default_write_secondary(ARMCPU
*cpu
,
193 const struct arm_boot_info
*info
)
195 uint32_t fixupcontext
[FIXUP_MAX
];
196 AddressSpace
*as
= arm_boot_address_space(cpu
, info
);
198 fixupcontext
[FIXUP_GIC_CPU_IF
] = info
->gic_cpu_if_addr
;
199 fixupcontext
[FIXUP_BOOTREG
] = info
->smp_bootreg_addr
;
200 if (arm_feature(&cpu
->env
, ARM_FEATURE_V7
)) {
201 fixupcontext
[FIXUP_DSB
] = DSB_INSN
;
203 fixupcontext
[FIXUP_DSB
] = CP15_DSB_INSN
;
206 write_bootloader("smpboot", info
->smp_loader_start
,
207 smpboot
, fixupcontext
, as
);
210 void arm_write_secure_board_setup_dummy_smc(ARMCPU
*cpu
,
211 const struct arm_boot_info
*info
,
214 AddressSpace
*as
= arm_boot_address_space(cpu
, info
);
216 uint32_t mvbar_blob
[] = {
217 /* mvbar_addr: secure monitor vectors
218 * Default unimplemented and unused vectors to spin. Makes it
219 * easier to debug (as opposed to the CPU running away).
221 0xeafffffe, /* (spin) */
222 0xeafffffe, /* (spin) */
223 0xe1b0f00e, /* movs pc, lr ;SMC exception return */
224 0xeafffffe, /* (spin) */
225 0xeafffffe, /* (spin) */
226 0xeafffffe, /* (spin) */
227 0xeafffffe, /* (spin) */
228 0xeafffffe, /* (spin) */
230 uint32_t board_setup_blob
[] = {
231 /* board setup addr */
232 0xe3a00e00 + (mvbar_addr
>> 4), /* mov r0, #mvbar_addr */
233 0xee0c0f30, /* mcr p15, 0, r0, c12, c0, 1 ;set MVBAR */
234 0xee110f11, /* mrc p15, 0, r0, c1 , c1, 0 ;read SCR */
235 0xe3800031, /* orr r0, #0x31 ;enable AW, FW, NS */
236 0xee010f11, /* mcr p15, 0, r0, c1, c1, 0 ;write SCR */
237 0xe1a0100e, /* mov r1, lr ;save LR across SMC */
238 0xe1600070, /* smc #0 ;call monitor to flush SCR */
239 0xe1a0f001, /* mov pc, r1 ;return */
242 /* check that mvbar_addr is correctly aligned and relocatable (using MOV) */
243 assert((mvbar_addr
& 0x1f) == 0 && (mvbar_addr
>> 4) < 0x100);
245 /* check that these blobs don't overlap */
246 assert((mvbar_addr
+ sizeof(mvbar_blob
) <= info
->board_setup_addr
)
247 || (info
->board_setup_addr
+ sizeof(board_setup_blob
) <= mvbar_addr
));
249 for (n
= 0; n
< ARRAY_SIZE(mvbar_blob
); n
++) {
250 mvbar_blob
[n
] = tswap32(mvbar_blob
[n
]);
252 rom_add_blob_fixed_as("board-setup-mvbar", mvbar_blob
, sizeof(mvbar_blob
),
255 for (n
= 0; n
< ARRAY_SIZE(board_setup_blob
); n
++) {
256 board_setup_blob
[n
] = tswap32(board_setup_blob
[n
]);
258 rom_add_blob_fixed_as("board-setup", board_setup_blob
,
259 sizeof(board_setup_blob
), info
->board_setup_addr
, as
);
262 static void default_reset_secondary(ARMCPU
*cpu
,
263 const struct arm_boot_info
*info
)
265 AddressSpace
*as
= arm_boot_address_space(cpu
, info
);
266 CPUState
*cs
= CPU(cpu
);
268 address_space_stl_notdirty(as
, info
->smp_bootreg_addr
,
269 0, MEMTXATTRS_UNSPECIFIED
, NULL
);
270 cpu_set_pc(cs
, info
->smp_loader_start
);
273 static inline bool have_dtb(const struct arm_boot_info
*info
)
275 return info
->dtb_filename
|| info
->get_dtb
;
278 #define WRITE_WORD(p, value) do { \
279 address_space_stl_notdirty(as, p, value, \
280 MEMTXATTRS_UNSPECIFIED, NULL); \
284 static void set_kernel_args(const struct arm_boot_info
*info
, AddressSpace
*as
)
286 int initrd_size
= info
->initrd_size
;
287 hwaddr base
= info
->loader_start
;
290 p
= base
+ KERNEL_ARGS_ADDR
;
293 WRITE_WORD(p
, 0x54410001);
295 WRITE_WORD(p
, 0x1000);
298 /* TODO: handle multiple chips on one ATAG list */
300 WRITE_WORD(p
, 0x54410002);
301 WRITE_WORD(p
, info
->ram_size
);
302 WRITE_WORD(p
, info
->loader_start
);
306 WRITE_WORD(p
, 0x54420005);
307 WRITE_WORD(p
, info
->initrd_start
);
308 WRITE_WORD(p
, initrd_size
);
310 if (info
->atag_revision
) {
313 WRITE_WORD(p
, 0x54410007);
314 WRITE_WORD(p
, info
->atag_revision
);
316 if (info
->kernel_cmdline
&& *info
->kernel_cmdline
) {
320 cmdline_size
= strlen(info
->kernel_cmdline
);
321 address_space_write(as
, p
+ 8, MEMTXATTRS_UNSPECIFIED
,
322 (const uint8_t *)info
->kernel_cmdline
,
324 cmdline_size
= (cmdline_size
>> 2) + 1;
325 WRITE_WORD(p
, cmdline_size
+ 2);
326 WRITE_WORD(p
, 0x54410009);
327 p
+= cmdline_size
* 4;
329 if (info
->atag_board
) {
332 uint8_t atag_board_buf
[0x1000];
334 atag_board_len
= (info
->atag_board(info
, atag_board_buf
) + 3) & ~3;
335 WRITE_WORD(p
, (atag_board_len
+ 8) >> 2);
336 WRITE_WORD(p
, 0x414f4d50);
337 address_space_write(as
, p
, MEMTXATTRS_UNSPECIFIED
,
338 atag_board_buf
, atag_board_len
);
346 static void set_kernel_args_old(const struct arm_boot_info
*info
,
351 int initrd_size
= info
->initrd_size
;
352 hwaddr base
= info
->loader_start
;
354 /* see linux/include/asm-arm/setup.h */
355 p
= base
+ KERNEL_ARGS_ADDR
;
359 WRITE_WORD(p
, info
->ram_size
/ 4096);
362 #define FLAG_READONLY 1
363 #define FLAG_RDLOAD 4
364 #define FLAG_RDPROMPT 8
366 WRITE_WORD(p
, FLAG_READONLY
| FLAG_RDLOAD
| FLAG_RDPROMPT
);
368 WRITE_WORD(p
, (31 << 8) | 0); /* /dev/mtdblock0 */
377 /* memc_control_reg */
379 /* unsigned char sounddefault */
380 /* unsigned char adfsdrives */
381 /* unsigned char bytes_per_char_h */
382 /* unsigned char bytes_per_char_v */
384 /* pages_in_bank[4] */
393 WRITE_WORD(p
, info
->initrd_start
);
398 WRITE_WORD(p
, initrd_size
);
403 /* system_serial_low */
405 /* system_serial_high */
409 /* zero unused fields */
410 while (p
< base
+ KERNEL_ARGS_ADDR
+ 256 + 1024) {
413 s
= info
->kernel_cmdline
;
415 address_space_write(as
, p
, MEMTXATTRS_UNSPECIFIED
,
416 (const uint8_t *)s
, strlen(s
) + 1);
422 static void fdt_add_psci_node(void *fdt
)
424 uint32_t cpu_suspend_fn
;
428 ARMCPU
*armcpu
= ARM_CPU(qemu_get_cpu(0));
429 const char *psci_method
;
430 int64_t psci_conduit
;
433 psci_conduit
= object_property_get_int(OBJECT(armcpu
),
436 switch (psci_conduit
) {
437 case QEMU_PSCI_CONDUIT_DISABLED
:
439 case QEMU_PSCI_CONDUIT_HVC
:
442 case QEMU_PSCI_CONDUIT_SMC
:
446 g_assert_not_reached();
450 * If /psci node is present in provided DTB, assume that no fixup
451 * is necessary and all PSCI configuration should be taken as-is
453 rc
= fdt_path_offset(fdt
, "/psci");
458 qemu_fdt_add_subnode(fdt
, "/psci");
459 if (armcpu
->psci_version
== 2) {
460 const char comp
[] = "arm,psci-0.2\0arm,psci";
461 qemu_fdt_setprop(fdt
, "/psci", "compatible", comp
, sizeof(comp
));
463 cpu_off_fn
= QEMU_PSCI_0_2_FN_CPU_OFF
;
464 if (arm_feature(&armcpu
->env
, ARM_FEATURE_AARCH64
)) {
465 cpu_suspend_fn
= QEMU_PSCI_0_2_FN64_CPU_SUSPEND
;
466 cpu_on_fn
= QEMU_PSCI_0_2_FN64_CPU_ON
;
467 migrate_fn
= QEMU_PSCI_0_2_FN64_MIGRATE
;
469 cpu_suspend_fn
= QEMU_PSCI_0_2_FN_CPU_SUSPEND
;
470 cpu_on_fn
= QEMU_PSCI_0_2_FN_CPU_ON
;
471 migrate_fn
= QEMU_PSCI_0_2_FN_MIGRATE
;
474 qemu_fdt_setprop_string(fdt
, "/psci", "compatible", "arm,psci");
476 cpu_suspend_fn
= QEMU_PSCI_0_1_FN_CPU_SUSPEND
;
477 cpu_off_fn
= QEMU_PSCI_0_1_FN_CPU_OFF
;
478 cpu_on_fn
= QEMU_PSCI_0_1_FN_CPU_ON
;
479 migrate_fn
= QEMU_PSCI_0_1_FN_MIGRATE
;
482 /* We adopt the PSCI spec's nomenclature, and use 'conduit' to refer
483 * to the instruction that should be used to invoke PSCI functions.
484 * However, the device tree binding uses 'method' instead, so that is
485 * what we should use here.
487 qemu_fdt_setprop_string(fdt
, "/psci", "method", psci_method
);
489 qemu_fdt_setprop_cell(fdt
, "/psci", "cpu_suspend", cpu_suspend_fn
);
490 qemu_fdt_setprop_cell(fdt
, "/psci", "cpu_off", cpu_off_fn
);
491 qemu_fdt_setprop_cell(fdt
, "/psci", "cpu_on", cpu_on_fn
);
492 qemu_fdt_setprop_cell(fdt
, "/psci", "migrate", migrate_fn
);
496 * load_dtb() - load a device tree binary image into memory
497 * @addr: the address to load the image at
498 * @binfo: struct describing the boot environment
499 * @addr_limit: upper limit of the available memory area at @addr
500 * @as: address space to load image to
502 * Load a device tree supplied by the machine or by the user with the
503 * '-dtb' command line option, and put it at offset @addr in target
506 * If @addr_limit contains a meaningful value (i.e., it is strictly greater
507 * than @addr), the device tree is only loaded if its size does not exceed
510 * Returns: the size of the device tree image on success,
511 * 0 if the image size exceeds the limit,
514 * Note: Must not be called unless have_dtb(binfo) is true.
516 static int load_dtb(hwaddr addr
, const struct arm_boot_info
*binfo
,
517 hwaddr addr_limit
, AddressSpace
*as
)
521 uint32_t acells
, scells
;
524 hwaddr mem_base
, mem_len
;
526 if (binfo
->dtb_filename
) {
528 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, binfo
->dtb_filename
);
530 fprintf(stderr
, "Couldn't open dtb file %s\n", binfo
->dtb_filename
);
534 fdt
= load_device_tree(filename
, &size
);
536 fprintf(stderr
, "Couldn't open dtb file %s\n", filename
);
542 fdt
= binfo
->get_dtb(binfo
, &size
);
544 fprintf(stderr
, "Board was unable to create a dtb blob\n");
549 if (addr_limit
> addr
&& size
> (addr_limit
- addr
)) {
550 /* Installing the device tree blob at addr would exceed addr_limit.
551 * Whether this constitutes failure is up to the caller to decide,
552 * so just return 0 as size, i.e., no error.
558 acells
= qemu_fdt_getprop_cell(fdt
, "/", "#address-cells",
560 scells
= qemu_fdt_getprop_cell(fdt
, "/", "#size-cells",
562 if (acells
== 0 || scells
== 0) {
563 fprintf(stderr
, "dtb file invalid (#address-cells or #size-cells 0)\n");
567 if (scells
< 2 && binfo
->ram_size
>= (1ULL << 32)) {
568 /* This is user error so deserves a friendlier error message
569 * than the failure of setprop_sized_cells would provide
571 fprintf(stderr
, "qemu: dtb file not compatible with "
576 if (nb_numa_nodes
> 0) {
578 * Turn the /memory node created before into a NOP node, then create
579 * /memory@addr nodes for all numa nodes respectively.
581 qemu_fdt_nop_node(fdt
, "/memory");
582 mem_base
= binfo
->loader_start
;
583 for (i
= 0; i
< nb_numa_nodes
; i
++) {
584 mem_len
= numa_info
[i
].node_mem
;
585 nodename
= g_strdup_printf("/memory@%" PRIx64
, mem_base
);
586 qemu_fdt_add_subnode(fdt
, nodename
);
587 qemu_fdt_setprop_string(fdt
, nodename
, "device_type", "memory");
588 rc
= qemu_fdt_setprop_sized_cells(fdt
, nodename
, "reg",
592 fprintf(stderr
, "couldn't set %s/reg for node %d\n", nodename
,
597 qemu_fdt_setprop_cell(fdt
, nodename
, "numa-node-id", i
);
604 rc
= fdt_path_offset(fdt
, "/memory");
606 qemu_fdt_add_subnode(fdt
, "/memory");
609 if (!qemu_fdt_getprop(fdt
, "/memory", "device_type", NULL
, &err
)) {
610 qemu_fdt_setprop_string(fdt
, "/memory", "device_type", "memory");
613 rc
= qemu_fdt_setprop_sized_cells(fdt
, "/memory", "reg",
614 acells
, binfo
->loader_start
,
615 scells
, binfo
->ram_size
);
617 fprintf(stderr
, "couldn't set /memory/reg\n");
622 rc
= fdt_path_offset(fdt
, "/chosen");
624 qemu_fdt_add_subnode(fdt
, "/chosen");
627 if (binfo
->kernel_cmdline
&& *binfo
->kernel_cmdline
) {
628 rc
= qemu_fdt_setprop_string(fdt
, "/chosen", "bootargs",
629 binfo
->kernel_cmdline
);
631 fprintf(stderr
, "couldn't set /chosen/bootargs\n");
636 if (binfo
->initrd_size
) {
637 rc
= qemu_fdt_setprop_cell(fdt
, "/chosen", "linux,initrd-start",
638 binfo
->initrd_start
);
640 fprintf(stderr
, "couldn't set /chosen/linux,initrd-start\n");
644 rc
= qemu_fdt_setprop_cell(fdt
, "/chosen", "linux,initrd-end",
645 binfo
->initrd_start
+ binfo
->initrd_size
);
647 fprintf(stderr
, "couldn't set /chosen/linux,initrd-end\n");
652 fdt_add_psci_node(fdt
);
654 if (binfo
->modify_dtb
) {
655 binfo
->modify_dtb(binfo
, fdt
);
658 qemu_fdt_dumpdtb(fdt
, size
);
660 /* Put the DTB into the memory map as a ROM image: this will ensure
661 * the DTB is copied again upon reset, even if addr points into RAM.
663 rom_add_blob_fixed_as("dtb", fdt
, size
, addr
, as
);
674 static void do_cpu_reset(void *opaque
)
676 ARMCPU
*cpu
= opaque
;
677 CPUState
*cs
= CPU(cpu
);
678 CPUARMState
*env
= &cpu
->env
;
679 const struct arm_boot_info
*info
= env
->boot_info
;
683 if (!info
->is_linux
) {
685 /* Jump to the entry point. */
686 uint64_t entry
= info
->entry
;
688 switch (info
->endianness
) {
689 case ARM_ENDIANNESS_LE
:
690 env
->cp15
.sctlr_el
[1] &= ~SCTLR_E0E
;
691 for (i
= 1; i
< 4; ++i
) {
692 env
->cp15
.sctlr_el
[i
] &= ~SCTLR_EE
;
694 env
->uncached_cpsr
&= ~CPSR_E
;
696 case ARM_ENDIANNESS_BE8
:
697 env
->cp15
.sctlr_el
[1] |= SCTLR_E0E
;
698 for (i
= 1; i
< 4; ++i
) {
699 env
->cp15
.sctlr_el
[i
] |= SCTLR_EE
;
701 env
->uncached_cpsr
|= CPSR_E
;
703 case ARM_ENDIANNESS_BE32
:
704 env
->cp15
.sctlr_el
[1] |= SCTLR_B
;
706 case ARM_ENDIANNESS_UNKNOWN
:
707 break; /* Board's decision */
709 g_assert_not_reached();
713 env
->thumb
= info
->entry
& 1;
716 cpu_set_pc(cs
, entry
);
718 /* If we are booting Linux then we need to check whether we are
719 * booting into secure or non-secure state and adjust the state
720 * accordingly. Out of reset, ARM is defined to be in secure state
721 * (SCR.NS = 0), we change that here if non-secure boot has been
724 if (arm_feature(env
, ARM_FEATURE_EL3
)) {
725 /* AArch64 is defined to come out of reset into EL3 if enabled.
726 * If we are booting Linux then we need to adjust our EL as
727 * Linux expects us to be in EL2 or EL1. AArch32 resets into
728 * SVC, which Linux expects, so no privilege/exception level to
732 env
->cp15
.scr_el3
|= SCR_RW
;
733 if (arm_feature(env
, ARM_FEATURE_EL2
)) {
734 env
->cp15
.hcr_el2
|= HCR_RW
;
735 env
->pstate
= PSTATE_MODE_EL2h
;
737 env
->pstate
= PSTATE_MODE_EL1h
;
739 /* AArch64 kernels never boot in secure mode */
740 assert(!info
->secure_boot
);
741 /* This hook is only supported for AArch32 currently:
742 * bootloader_aarch64[] will not call the hook, and
743 * the code above has already dropped us into EL2 or EL1.
745 assert(!info
->secure_board_setup
);
748 if (arm_feature(env
, ARM_FEATURE_EL2
)) {
749 /* If we have EL2 then Linux expects the HVC insn to work */
750 env
->cp15
.scr_el3
|= SCR_HCE
;
753 /* Set to non-secure if not a secure boot */
754 if (!info
->secure_boot
&&
755 (cs
!= first_cpu
|| !info
->secure_board_setup
)) {
756 /* Linux expects non-secure state */
757 env
->cp15
.scr_el3
|= SCR_NS
;
761 if (cs
== first_cpu
) {
762 AddressSpace
*as
= arm_boot_address_space(cpu
, info
);
764 cpu_set_pc(cs
, info
->loader_start
);
766 if (!have_dtb(info
)) {
768 set_kernel_args_old(info
, as
);
770 set_kernel_args(info
, as
);
774 info
->secondary_cpu_reset_hook(cpu
, info
);
781 * load_image_to_fw_cfg() - Load an image file into an fw_cfg entry identified
783 * @fw_cfg: The firmware config instance to store the data in.
784 * @size_key: The firmware config key to store the size of the loaded
785 * data under, with fw_cfg_add_i32().
786 * @data_key: The firmware config key to store the loaded data under,
787 * with fw_cfg_add_bytes().
788 * @image_name: The name of the image file to load. If it is NULL, the
789 * function returns without doing anything.
790 * @try_decompress: Whether the image should be decompressed (gunzipped) before
791 * adding it to fw_cfg. If decompression fails, the image is
794 * In case of failure, the function prints an error message to stderr and the
795 * process exits with status 1.
797 static void load_image_to_fw_cfg(FWCfgState
*fw_cfg
, uint16_t size_key
,
798 uint16_t data_key
, const char *image_name
,
804 if (image_name
== NULL
) {
808 if (try_decompress
) {
809 size
= load_image_gzipped_buffer(image_name
,
810 LOAD_IMAGE_MAX_GUNZIP_BYTES
, &data
);
813 if (size
== (size_t)-1) {
817 if (!g_file_get_contents(image_name
, &contents
, &length
, NULL
)) {
818 error_report("failed to load \"%s\"", image_name
);
822 data
= (uint8_t *)contents
;
825 fw_cfg_add_i32(fw_cfg
, size_key
, size
);
826 fw_cfg_add_bytes(fw_cfg
, data_key
, data
, size
);
829 static int do_arm_linux_init(Object
*obj
, void *opaque
)
831 if (object_dynamic_cast(obj
, TYPE_ARM_LINUX_BOOT_IF
)) {
832 ARMLinuxBootIf
*albif
= ARM_LINUX_BOOT_IF(obj
);
833 ARMLinuxBootIfClass
*albifc
= ARM_LINUX_BOOT_IF_GET_CLASS(obj
);
834 struct arm_boot_info
*info
= opaque
;
836 if (albifc
->arm_linux_init
) {
837 albifc
->arm_linux_init(albif
, info
->secure_boot
);
843 static uint64_t arm_load_elf(struct arm_boot_info
*info
, uint64_t *pentry
,
844 uint64_t *lowaddr
, uint64_t *highaddr
,
845 int elf_machine
, AddressSpace
*as
)
858 load_elf_hdr(info
->kernel_filename
, &elf_header
, &elf_is64
, &err
);
865 big_endian
= elf_header
.h64
.e_ident
[EI_DATA
] == ELFDATA2MSB
;
866 info
->endianness
= big_endian
? ARM_ENDIANNESS_BE8
869 big_endian
= elf_header
.h32
.e_ident
[EI_DATA
] == ELFDATA2MSB
;
871 if (bswap32(elf_header
.h32
.e_flags
) & EF_ARM_BE8
) {
872 info
->endianness
= ARM_ENDIANNESS_BE8
;
874 info
->endianness
= ARM_ENDIANNESS_BE32
;
875 /* In BE32, the CPU has a different view of the per-byte
876 * address map than the rest of the system. BE32 ELF files
877 * are organised such that they can be programmed through
878 * the CPU's per-word byte-reversed view of the world. QEMU
879 * however loads ELF files independently of the CPU. So
880 * tell the ELF loader to byte reverse the data for us.
885 info
->endianness
= ARM_ENDIANNESS_LE
;
889 ret
= load_elf_as(info
->kernel_filename
, NULL
, NULL
,
890 pentry
, lowaddr
, highaddr
, big_endian
, elf_machine
,
893 /* The header loaded but the image didn't */
900 static uint64_t load_aarch64_image(const char *filename
, hwaddr mem_base
,
901 hwaddr
*entry
, AddressSpace
*as
)
903 hwaddr kernel_load_offset
= KERNEL64_LOAD_ADDR
;
907 /* On aarch64, it's the bootloader's job to uncompress the kernel. */
908 size
= load_image_gzipped_buffer(filename
, LOAD_IMAGE_MAX_GUNZIP_BYTES
,
914 /* Load as raw file otherwise */
915 if (!g_file_get_contents(filename
, (char **)&buffer
, &len
, NULL
)) {
921 /* check the arm64 magic header value -- very old kernels may not have it */
922 if (size
> ARM64_MAGIC_OFFSET
+ 4 &&
923 memcmp(buffer
+ ARM64_MAGIC_OFFSET
, "ARM\x64", 4) == 0) {
926 /* The arm64 Image header has text_offset and image_size fields at 8 and
927 * 16 bytes into the Image header, respectively. The text_offset field
928 * is only valid if the image_size is non-zero.
930 memcpy(&hdrvals
, buffer
+ ARM64_TEXT_OFFSET_OFFSET
, sizeof(hdrvals
));
931 if (hdrvals
[1] != 0) {
932 kernel_load_offset
= le64_to_cpu(hdrvals
[0]);
936 *entry
= mem_base
+ kernel_load_offset
;
937 rom_add_blob_fixed_as(filename
, buffer
, size
, *entry
, as
);
944 static void arm_load_kernel_notify(Notifier
*notifier
, void *data
)
950 uint64_t elf_entry
, elf_low_addr
, elf_high_addr
;
953 static const ARMInsnFixup
*primary_loader
;
954 ArmLoadKernelNotifier
*n
= DO_UPCAST(ArmLoadKernelNotifier
,
956 ARMCPU
*cpu
= n
->cpu
;
957 CPUARMState
*env
= &cpu
->env
;
958 struct arm_boot_info
*info
=
959 container_of(n
, struct arm_boot_info
, load_kernel_notifier
);
960 AddressSpace
*as
= arm_boot_address_space(cpu
, info
);
962 /* The board code is not supposed to set secure_board_setup unless
963 * running its code in secure mode is actually possible, and KVM
964 * doesn't support secure.
966 assert(!(info
->secure_board_setup
&& kvm_enabled()));
968 info
->dtb_filename
= qemu_opt_get(qemu_get_machine_opts(), "dtb");
970 /* Load the kernel. */
971 if (!info
->kernel_filename
|| info
->firmware_loaded
) {
973 if (have_dtb(info
)) {
974 /* If we have a device tree blob, but no kernel to supply it to (or
975 * the kernel is supposed to be loaded by the bootloader), copy the
976 * DTB to the base of RAM for the bootloader to pick up.
978 if (load_dtb(info
->loader_start
, info
, 0, as
) < 0) {
983 if (info
->kernel_filename
) {
985 bool try_decompressing_kernel
;
987 fw_cfg
= fw_cfg_find();
988 try_decompressing_kernel
= arm_feature(&cpu
->env
,
989 ARM_FEATURE_AARCH64
);
991 /* Expose the kernel, the command line, and the initrd in fw_cfg.
992 * We don't process them here at all, it's all left to the
995 load_image_to_fw_cfg(fw_cfg
,
996 FW_CFG_KERNEL_SIZE
, FW_CFG_KERNEL_DATA
,
997 info
->kernel_filename
,
998 try_decompressing_kernel
);
999 load_image_to_fw_cfg(fw_cfg
,
1000 FW_CFG_INITRD_SIZE
, FW_CFG_INITRD_DATA
,
1001 info
->initrd_filename
, false);
1003 if (info
->kernel_cmdline
) {
1004 fw_cfg_add_i32(fw_cfg
, FW_CFG_CMDLINE_SIZE
,
1005 strlen(info
->kernel_cmdline
) + 1);
1006 fw_cfg_add_string(fw_cfg
, FW_CFG_CMDLINE_DATA
,
1007 info
->kernel_cmdline
);
1011 /* We will start from address 0 (typically a boot ROM image) in the
1012 * same way as hardware.
1017 if (arm_feature(env
, ARM_FEATURE_AARCH64
)) {
1018 primary_loader
= bootloader_aarch64
;
1019 elf_machine
= EM_AARCH64
;
1021 primary_loader
= bootloader
;
1022 if (!info
->write_board_setup
) {
1023 primary_loader
+= BOOTLOADER_NO_BOARD_SETUP_OFFSET
;
1025 elf_machine
= EM_ARM
;
1028 if (!info
->secondary_cpu_reset_hook
) {
1029 info
->secondary_cpu_reset_hook
= default_reset_secondary
;
1031 if (!info
->write_secondary_boot
) {
1032 info
->write_secondary_boot
= default_write_secondary
;
1035 if (info
->nb_cpus
== 0)
1038 /* We want to put the initrd far enough into RAM that when the
1039 * kernel is uncompressed it will not clobber the initrd. However
1040 * on boards without much RAM we must ensure that we still leave
1041 * enough room for a decent sized initrd, and on boards with large
1042 * amounts of RAM we must avoid the initrd being so far up in RAM
1043 * that it is outside lowmem and inaccessible to the kernel.
1044 * So for boards with less than 256MB of RAM we put the initrd
1045 * halfway into RAM, and for boards with 256MB of RAM or more we put
1046 * the initrd at 128MB.
1048 info
->initrd_start
= info
->loader_start
+
1049 MIN(info
->ram_size
/ 2, 128 * 1024 * 1024);
1053 /* Assume that raw images are linux kernels, and ELF images are not. */
1054 /* If the filename contains 'vmlinux', assume ELF images are linux, too. */
1055 is_linux
= (strstr(info
->kernel_filename
, "vmlinux") != NULL
);
1056 kernel_size
= arm_load_elf(info
, &elf_entry
, &elf_low_addr
,
1057 &elf_high_addr
, elf_machine
, as
);
1058 if (kernel_size
> 0 && have_dtb(info
)) {
1059 /* If there is still some room left at the base of RAM, try and put
1060 * the DTB there like we do for images loaded with -bios or -pflash.
1062 if (elf_low_addr
> info
->loader_start
1063 || elf_high_addr
< info
->loader_start
) {
1064 /* Pass elf_low_addr as address limit to load_dtb if it may be
1065 * pointing into RAM, otherwise pass '0' (no limit)
1067 if (elf_low_addr
< info
->loader_start
) {
1070 if (load_dtb(info
->loader_start
, info
, elf_low_addr
, as
) < 0) {
1076 if (kernel_size
< 0) {
1077 kernel_size
= load_uimage_as(info
->kernel_filename
, &entry
, NULL
,
1078 &is_linux
, NULL
, NULL
, as
);
1080 if (arm_feature(&cpu
->env
, ARM_FEATURE_AARCH64
) && kernel_size
< 0) {
1081 kernel_size
= load_aarch64_image(info
->kernel_filename
,
1082 info
->loader_start
, &entry
, as
);
1084 } else if (kernel_size
< 0) {
1086 entry
= info
->loader_start
+ KERNEL_LOAD_ADDR
;
1087 kernel_size
= load_image_targphys_as(info
->kernel_filename
, entry
,
1088 info
->ram_size
- KERNEL_LOAD_ADDR
,
1091 } else if (entry
== info
->loader_start
) {
1092 /* Don't map bootloader memory if it conflicts with the kernel image. */
1095 if (kernel_size
< 0) {
1096 error_report("could not load kernel '%s'", info
->kernel_filename
);
1099 info
->entry
= entry
;
1101 uint32_t fixupcontext
[FIXUP_MAX
];
1103 if (info
->initrd_filename
) {
1104 initrd_size
= load_ramdisk_as(info
->initrd_filename
,
1106 info
->ram_size
- info
->initrd_start
,
1108 if (initrd_size
< 0) {
1109 initrd_size
= load_image_targphys_as(info
->initrd_filename
,
1115 if (initrd_size
< 0) {
1116 error_report("could not load initrd '%s'",
1117 info
->initrd_filename
);
1123 info
->initrd_size
= initrd_size
;
1125 fixupcontext
[FIXUP_BOARDID
] = info
->board_id
;
1126 fixupcontext
[FIXUP_BOARD_SETUP
] = info
->board_setup_addr
;
1128 /* for device tree boot, we pass the DTB directly in r2. Otherwise
1129 * we point to the kernel args.
1131 if (have_dtb(info
)) {
1135 if (elf_machine
== EM_AARCH64
) {
1137 * Some AArch64 kernels on early bootup map the fdt region as
1139 * [ ALIGN_DOWN(fdt, 2MB) ... ALIGN_DOWN(fdt, 2MB) + 2MB ]
1141 * Let's play safe and prealign it to 2MB to give us some space.
1143 align
= 2 * 1024 * 1024;
1146 * Some 32bit kernels will trash anything in the 4K page the
1147 * initrd ends in, so make sure the DTB isn't caught up in that.
1152 /* Place the DTB after the initrd in memory with alignment. */
1153 dtb_start
= QEMU_ALIGN_UP(info
->initrd_start
+ initrd_size
, align
);
1154 if (load_dtb(dtb_start
, info
, 0, as
) < 0) {
1157 fixupcontext
[FIXUP_ARGPTR
] = dtb_start
;
1159 fixupcontext
[FIXUP_ARGPTR
] = info
->loader_start
+ KERNEL_ARGS_ADDR
;
1160 if (info
->ram_size
>= (1ULL << 32)) {
1161 error_report("RAM size must be less than 4GB to boot"
1162 " Linux kernel using ATAGS (try passing a device tree"
1167 fixupcontext
[FIXUP_ENTRYPOINT
] = entry
;
1169 write_bootloader("bootloader", info
->loader_start
,
1170 primary_loader
, fixupcontext
, as
);
1172 if (info
->nb_cpus
> 1) {
1173 info
->write_secondary_boot(cpu
, info
);
1175 if (info
->write_board_setup
) {
1176 info
->write_board_setup(cpu
, info
);
1179 /* Notify devices which need to fake up firmware initialization
1180 * that we're doing a direct kernel boot.
1182 object_child_foreach_recursive(object_get_root(),
1183 do_arm_linux_init
, info
);
1185 info
->is_linux
= is_linux
;
1187 for (cs
= CPU(cpu
); cs
; cs
= CPU_NEXT(cs
)) {
1188 ARM_CPU(cs
)->env
.boot_info
= info
;
1192 void arm_load_kernel(ARMCPU
*cpu
, struct arm_boot_info
*info
)
1196 info
->load_kernel_notifier
.cpu
= cpu
;
1197 info
->load_kernel_notifier
.notifier
.notify
= arm_load_kernel_notify
;
1198 qemu_add_machine_init_done_notifier(&info
->load_kernel_notifier
.notifier
);
1200 /* CPU objects (unlike devices) are not automatically reset on system
1201 * reset, so we must always register a handler to do so. If we're
1202 * actually loading a kernel, the handler is also responsible for
1203 * arranging that we start it correctly.
1205 for (cs
= CPU(cpu
); cs
; cs
= CPU_NEXT(cs
)) {
1206 qemu_register_reset(do_cpu_reset
, ARM_CPU(cs
));
1210 static const TypeInfo arm_linux_boot_if_info
= {
1211 .name
= TYPE_ARM_LINUX_BOOT_IF
,
1212 .parent
= TYPE_INTERFACE
,
1213 .class_size
= sizeof(ARMLinuxBootIfClass
),
1216 static void arm_linux_boot_register_types(void)
1218 type_register_static(&arm_linux_boot_if_info
);
1221 type_init(arm_linux_boot_register_types
)