2 * QEMU Motorla 680x0 Macintosh hardware System Emulator
4 * Permission is hereby granted, free of charge, to any person obtaining a copy
5 * of this software and associated documentation files (the "Software"), to deal
6 * in the Software without restriction, including without limitation the rights
7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
8 * copies of the Software, and to permit persons to whom the Software is
9 * furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 #include "qemu/osdep.h"
24 #include "qemu/units.h"
25 #include "qemu-common.h"
26 #include "sysemu/sysemu.h"
29 #include "hw/boards.h"
32 #include "hw/loader.h"
33 #include "ui/console.h"
34 #include "exec/address-spaces.h"
35 #include "hw/char/escc.h"
36 #include "hw/sysbus.h"
37 #include "hw/scsi/esp.h"
39 #include "hw/misc/mac_via.h"
40 #include "hw/input/adb.h"
41 #include "hw/nubus/mac-nubus-bridge.h"
42 #include "hw/display/macfb.h"
43 #include "hw/block/swim.h"
45 #include "qapi/error.h"
46 #include "sysemu/qtest.h"
47 #include "sysemu/runstate.h"
48 #include "sysemu/reset.h"
50 #define MACROM_ADDR 0x40000000
51 #define MACROM_SIZE 0x00100000
53 #define MACROM_FILENAME "MacROM.bin"
55 #define Q800_MACHINE_ID 35
56 #define Q800_CPU_ID (1 << 2)
57 #define Q800_FPU_ID (1 << 2)
58 #define Q800_MMU_ID (1 << 2)
61 #define Q800_MAC_CPU_ID 2
63 #define IO_BASE 0x50000000
64 #define IO_SLICE 0x00040000
65 #define IO_SIZE 0x04000000
67 #define VIA_BASE (IO_BASE + 0x00000)
68 #define SONIC_PROM_BASE (IO_BASE + 0x08000)
69 #define SONIC_BASE (IO_BASE + 0x0a000)
70 #define SCC_BASE (IO_BASE + 0x0c020)
71 #define ESP_BASE (IO_BASE + 0x10000)
72 #define ESP_PDMA (IO_BASE + 0x10100)
73 #define ASC_BASE (IO_BASE + 0x14000)
74 #define SWIM_BASE (IO_BASE + 0x1E000)
76 #define NUBUS_SUPER_SLOT_BASE 0x60000000
77 #define NUBUS_SLOT_BASE 0xf0000000
80 * the video base, whereas it a Nubus address,
81 * is needed by the kernel to have early display and
82 * thus provided by the bootloader
84 #define VIDEO_BASE 0xf9001000
86 #define MAC_CLOCK 3686418
89 * The GLUE (General Logic Unit) is an Apple custom integrated circuit chip
90 * that performs a variety of functions (RAM management, clock generation, ...).
91 * The GLUE chip receives interrupt requests from various devices,
92 * assign priority to each, and asserts one or more interrupt line to the
101 static void GLUE_set_irq(void *opaque
, int irq
, int level
)
103 GLUEState
*s
= opaque
;
109 s
->ipr
&= ~(1 << irq
);
112 for (i
= 7; i
>= 0; i
--) {
113 if ((s
->ipr
>> i
) & 1) {
114 m68k_set_irq_level(s
->cpu
, i
+ 1, i
+ 25);
118 m68k_set_irq_level(s
->cpu
, 0, 0);
121 static void main_cpu_reset(void *opaque
)
123 M68kCPU
*cpu
= opaque
;
124 CPUState
*cs
= CPU(cpu
);
127 cpu
->env
.aregs
[7] = ldl_phys(cs
->as
, 0);
128 cpu
->env
.pc
= ldl_phys(cs
->as
, 4);
131 static void q800_init(MachineState
*machine
)
139 ram_addr_t initrd_base
;
144 const int io_slice_nb
= (IO_SIZE
/ IO_SLICE
) - 1;
146 ram_addr_t ram_size
= machine
->ram_size
;
147 const char *kernel_filename
= machine
->kernel_filename
;
148 const char *initrd_filename
= machine
->initrd_filename
;
149 const char *kernel_cmdline
= machine
->kernel_cmdline
;
150 hwaddr parameters_base
;
153 DeviceState
*via_dev
;
154 SysBusESPState
*sysbus_esp
;
156 SysBusDevice
*sysbus
;
162 linux_boot
= (kernel_filename
!= NULL
);
164 if (ram_size
> 1 * GiB
) {
165 error_report("Too much memory for this machine: %" PRId64
" MiB, "
166 "maximum 1024 MiB", ram_size
/ MiB
);
171 cpu
= M68K_CPU(cpu_create(machine
->cpu_type
));
172 qemu_register_reset(main_cpu_reset
, cpu
);
175 ram
= g_malloc(sizeof(*ram
));
176 memory_region_init_ram(ram
, NULL
, "m68k_mac.ram", ram_size
, &error_abort
);
177 memory_region_add_subregion(get_system_memory(), 0, ram
);
180 * Memory from IO_BASE to IO_BASE + IO_SLICE is repeated
181 * from IO_BASE + IO_SLICE to IO_BASE + IO_SIZE
183 io
= g_new(MemoryRegion
, io_slice_nb
);
184 for (i
= 0; i
< io_slice_nb
; i
++) {
185 char *name
= g_strdup_printf("mac_m68k.io[%d]", i
+ 1);
187 memory_region_init_alias(&io
[i
], NULL
, name
, get_system_memory(),
189 memory_region_add_subregion(get_system_memory(),
190 IO_BASE
+ (i
+ 1) * IO_SLICE
, &io
[i
]);
196 irq
= g_new0(GLUEState
, 1);
198 pic
= qemu_allocate_irqs(GLUE_set_irq
, irq
, 8);
202 via_dev
= qdev_create(NULL
, TYPE_MAC_VIA
);
203 qdev_init_nofail(via_dev
);
204 sysbus
= SYS_BUS_DEVICE(via_dev
);
205 sysbus_mmio_map(sysbus
, 0, VIA_BASE
);
206 qdev_connect_gpio_out_named(DEVICE(sysbus
), "irq", 0, pic
[0]);
207 qdev_connect_gpio_out_named(DEVICE(sysbus
), "irq", 1, pic
[1]);
210 adb_bus
= qdev_get_child_bus(via_dev
, "adb.0");
211 dev
= qdev_create(adb_bus
, TYPE_ADB_KEYBOARD
);
212 qdev_init_nofail(dev
);
213 dev
= qdev_create(adb_bus
, TYPE_ADB_MOUSE
);
214 qdev_init_nofail(dev
);
219 error_report("q800 can only have one ethernet interface");
223 qemu_check_nic_model(&nd_table
[0], "dp83932");
226 * MacSonic driver needs an Apple MAC address
229 * 00:80:19 Dayna Communications, Inc.
232 * (Q800 use the last one)
234 nd_table
[0].macaddr
.a
[0] = 0x08;
235 nd_table
[0].macaddr
.a
[1] = 0x00;
236 nd_table
[0].macaddr
.a
[2] = 0x07;
238 dev
= qdev_create(NULL
, "dp8393x");
239 qdev_set_nic_properties(dev
, &nd_table
[0]);
240 qdev_prop_set_uint8(dev
, "it_shift", 2);
241 qdev_prop_set_bit(dev
, "big_endian", true);
242 qdev_prop_set_ptr(dev
, "dma_mr", get_system_memory());
243 qdev_init_nofail(dev
);
244 sysbus
= SYS_BUS_DEVICE(dev
);
245 sysbus_mmio_map(sysbus
, 0, SONIC_BASE
);
246 sysbus_mmio_map(sysbus
, 1, SONIC_PROM_BASE
);
247 sysbus_connect_irq(sysbus
, 0, pic
[2]);
251 dev
= qdev_create(NULL
, TYPE_ESCC
);
252 qdev_prop_set_uint32(dev
, "disabled", 0);
253 qdev_prop_set_uint32(dev
, "frequency", MAC_CLOCK
);
254 qdev_prop_set_uint32(dev
, "it_shift", 1);
255 qdev_prop_set_bit(dev
, "bit_swap", true);
256 qdev_prop_set_chr(dev
, "chrA", serial_hd(0));
257 qdev_prop_set_chr(dev
, "chrB", serial_hd(1));
258 qdev_prop_set_uint32(dev
, "chnBtype", 0);
259 qdev_prop_set_uint32(dev
, "chnAtype", 0);
260 qdev_init_nofail(dev
);
261 sysbus
= SYS_BUS_DEVICE(dev
);
262 sysbus_connect_irq(sysbus
, 0, pic
[3]);
263 sysbus_connect_irq(sysbus
, 1, pic
[3]);
264 sysbus_mmio_map(sysbus
, 0, SCC_BASE
);
268 dev
= qdev_create(NULL
, TYPE_ESP
);
269 sysbus_esp
= ESP_STATE(dev
);
270 esp
= &sysbus_esp
->esp
;
271 esp
->dma_memory_read
= NULL
;
272 esp
->dma_memory_write
= NULL
;
273 esp
->dma_opaque
= NULL
;
274 sysbus_esp
->it_shift
= 4;
275 esp
->dma_enabled
= 1;
276 qdev_init_nofail(dev
);
278 sysbus
= SYS_BUS_DEVICE(dev
);
279 sysbus_connect_irq(sysbus
, 0, qdev_get_gpio_in_named(via_dev
,
282 sysbus_connect_irq(sysbus
, 1,
283 qdev_get_gpio_in_named(via_dev
, "via2-irq",
284 VIA2_IRQ_SCSI_DATA_BIT
));
285 sysbus_mmio_map(sysbus
, 0, ESP_BASE
);
286 sysbus_mmio_map(sysbus
, 1, ESP_PDMA
);
288 scsi_bus_legacy_handle_cmdline(&esp
->bus
);
290 /* SWIM floppy controller */
292 dev
= qdev_create(NULL
, TYPE_SWIM
);
293 qdev_init_nofail(dev
);
294 sysbus_mmio_map(SYS_BUS_DEVICE(dev
), 0, SWIM_BASE
);
298 dev
= qdev_create(NULL
, TYPE_MAC_NUBUS_BRIDGE
);
299 qdev_init_nofail(dev
);
300 sysbus_mmio_map(SYS_BUS_DEVICE(dev
), 0, NUBUS_SUPER_SLOT_BASE
);
301 sysbus_mmio_map(SYS_BUS_DEVICE(dev
), 1, NUBUS_SLOT_BASE
);
303 nubus
= MAC_NUBUS_BRIDGE(dev
)->bus
;
305 /* framebuffer in nubus slot #9 */
307 dev
= qdev_create(BUS(nubus
), TYPE_NUBUS_MACFB
);
308 qdev_prop_set_uint32(dev
, "width", graphic_width
);
309 qdev_prop_set_uint32(dev
, "height", graphic_height
);
310 qdev_prop_set_uint8(dev
, "depth", graphic_depth
);
311 qdev_init_nofail(dev
);
316 kernel_size
= load_elf(kernel_filename
, NULL
, NULL
, NULL
,
317 &elf_entry
, NULL
, &high
, 1,
319 if (kernel_size
< 0) {
320 error_report("could not load kernel '%s'", kernel_filename
);
323 stl_phys(cs
->as
, 4, elf_entry
); /* reset initial PC */
324 parameters_base
= (high
+ 1) & ~1;
326 BOOTINFO1(cs
->as
, parameters_base
, BI_MACHTYPE
, MACH_MAC
);
327 BOOTINFO1(cs
->as
, parameters_base
, BI_FPUTYPE
, Q800_FPU_ID
);
328 BOOTINFO1(cs
->as
, parameters_base
, BI_MMUTYPE
, Q800_MMU_ID
);
329 BOOTINFO1(cs
->as
, parameters_base
, BI_CPUTYPE
, Q800_CPU_ID
);
330 BOOTINFO1(cs
->as
, parameters_base
, BI_MAC_CPUID
, Q800_MAC_CPU_ID
);
331 BOOTINFO1(cs
->as
, parameters_base
, BI_MAC_MODEL
, Q800_MACHINE_ID
);
332 BOOTINFO1(cs
->as
, parameters_base
,
333 BI_MAC_MEMSIZE
, ram_size
>> 20); /* in MB */
334 BOOTINFO2(cs
->as
, parameters_base
, BI_MEMCHUNK
, 0, ram_size
);
335 BOOTINFO1(cs
->as
, parameters_base
, BI_MAC_VADDR
, VIDEO_BASE
);
336 BOOTINFO1(cs
->as
, parameters_base
, BI_MAC_VDEPTH
, graphic_depth
);
337 BOOTINFO1(cs
->as
, parameters_base
, BI_MAC_VDIM
,
338 (graphic_height
<< 16) | graphic_width
);
339 BOOTINFO1(cs
->as
, parameters_base
, BI_MAC_VROW
,
340 (graphic_width
* graphic_depth
+ 7) / 8);
341 BOOTINFO1(cs
->as
, parameters_base
, BI_MAC_SCCBASE
, SCC_BASE
);
343 if (kernel_cmdline
) {
344 BOOTINFOSTR(cs
->as
, parameters_base
, BI_COMMAND_LINE
,
349 if (initrd_filename
) {
350 initrd_size
= get_image_size(initrd_filename
);
351 if (initrd_size
< 0) {
352 error_report("could not load initial ram disk '%s'",
357 initrd_base
= (ram_size
- initrd_size
) & TARGET_PAGE_MASK
;
358 load_image_targphys(initrd_filename
, initrd_base
,
359 ram_size
- initrd_base
);
360 BOOTINFO2(cs
->as
, parameters_base
, BI_RAMDISK
, initrd_base
,
366 BOOTINFO0(cs
->as
, parameters_base
, BI_LAST
);
369 /* allocate and load BIOS */
370 rom
= g_malloc(sizeof(*rom
));
371 memory_region_init_ram(rom
, NULL
, "m68k_mac.rom", MACROM_SIZE
,
373 if (bios_name
== NULL
) {
374 bios_name
= MACROM_FILENAME
;
376 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, bios_name
);
377 memory_region_set_readonly(rom
, true);
378 memory_region_add_subregion(get_system_memory(), MACROM_ADDR
, rom
);
380 /* Load MacROM binary */
382 bios_size
= load_image_targphys(filename
, MACROM_ADDR
, MACROM_SIZE
);
388 /* Remove qtest_enabled() check once firmware files are in the tree */
389 if (!qtest_enabled()) {
390 if (bios_size
< 0 || bios_size
> MACROM_SIZE
) {
391 error_report("could not load MacROM '%s'", bios_name
);
395 ptr
= rom_ptr(MACROM_ADDR
, MACROM_SIZE
);
396 stl_phys(cs
->as
, 0, ldl_p(ptr
)); /* reset initial SP */
398 MACROM_ADDR
+ ldl_p(ptr
+ 4)); /* reset initial PC */
403 static void q800_machine_class_init(ObjectClass
*oc
, void *data
)
405 MachineClass
*mc
= MACHINE_CLASS(oc
);
406 mc
->desc
= "Macintosh Quadra 800";
407 mc
->init
= q800_init
;
408 mc
->default_cpu_type
= M68K_CPU_TYPE_NAME("m68040");
411 mc
->block_default_type
= IF_SCSI
;
414 static const TypeInfo q800_machine_typeinfo
= {
415 .name
= MACHINE_TYPE_NAME("q800"),
416 .parent
= TYPE_MACHINE
,
417 .class_init
= q800_machine_class_init
,
420 static void q800_machine_register_types(void)
422 type_register_static(&q800_machine_typeinfo
);
425 type_init(q800_machine_register_types
)