hw/ppc/spapr_pci_vfio.c

   1 /*
   2  * QEMU sPAPR PCI host for VFIO
   3  *
   4  * Copyright (c) 2011-2014 Alexey Kardashevskiy, IBM Corporation.
   5  *
   6  *  This program is free software; you can redistribute it and/or modify
   7  *  it under the terms of the GNU General Public License as published by
   8  *  the Free Software Foundation; either version 2 of the License,
   9  *  or (at your option) any later version.
  10  *
  11  *  This program is distributed in the hope that it will be useful,
  12  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  *  GNU General Public License for more details.
  15  *
  16  *  You should have received a copy of the GNU General Public License
  17  *  along with this program; if not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #include "hw/ppc/spapr.h"
  21 #include "hw/pci-host/spapr.h"
  22 #include "linux/vfio.h"
  23 #include "hw/vfio/vfio.h"
  24
  25 static Property spapr_phb_vfio_properties[] = {
  26     DEFINE_PROP_INT32("iommu", sPAPRPHBVFIOState, iommugroupid, -1),
  27     DEFINE_PROP_END_OF_LIST(),
  28 };
  29
  30 static void spapr_phb_vfio_finish_realize(sPAPRPHBState *sphb, Error **errp)
  31 {
  32     sPAPRPHBVFIOState *svphb = SPAPR_PCI_VFIO_HOST_BRIDGE(sphb);
  33     struct vfio_iommu_spapr_tce_info info = { .argsz = sizeof(info) };
  34     int ret;
  35     sPAPRTCETable *tcet;
  36     uint32_t liobn = svphb->phb.dma_liobn;
  37
  38     if (svphb->iommugroupid == -1) {
  39         error_setg(errp, "Wrong IOMMU group ID %d", svphb->iommugroupid);
  40         return;
  41     }
  42
  43     ret = vfio_container_ioctl(&svphb->phb.iommu_as, svphb->iommugroupid,
  44                                VFIO_CHECK_EXTENSION,
  45                                (void *) VFIO_SPAPR_TCE_IOMMU);
  46     if (ret != 1) {
  47         error_setg_errno(errp, -ret,
  48                          "spapr-vfio: SPAPR extension is not supported");
  49         return;
  50     }
  51
  52     ret = vfio_container_ioctl(&svphb->phb.iommu_as, svphb->iommugroupid,
  53                                VFIO_IOMMU_SPAPR_TCE_GET_INFO, &info);
  54     if (ret) {
  55         error_setg_errno(errp, -ret,
  56                          "spapr-vfio: get info from container failed");
  57         return;
  58     }
  59
  60     tcet = spapr_tce_new_table(DEVICE(sphb), liobn, info.dma32_window_start,
  61                                SPAPR_TCE_PAGE_SHIFT,
  62                                info.dma32_window_size >> SPAPR_TCE_PAGE_SHIFT,
  63                                true);
  64     if (!tcet) {
  65         error_setg(errp, "spapr-vfio: failed to create VFIO TCE table");
  66         return;
  67     }
  68
  69     /* Register default 32bit DMA window */
  70     memory_region_add_subregion(&sphb->iommu_root, tcet->bus_offset,
  71                                 spapr_tce_get_iommu(tcet));
  72 }
  73
  74 static void spapr_phb_vfio_reset(DeviceState *qdev)
  75 {
  76     /* Do nothing */
  77 }
  78
  79 static int spapr_phb_vfio_eeh_set_option(sPAPRPHBState *sphb,
  80                                          unsigned int addr, int option)
  81 {
  82     sPAPRPHBVFIOState *svphb = SPAPR_PCI_VFIO_HOST_BRIDGE(sphb);
  83     struct vfio_eeh_pe_op op = { .argsz = sizeof(op) };
  84     int ret;
  85
  86     switch (option) {
  87     case RTAS_EEH_DISABLE:
  88         op.op = VFIO_EEH_PE_DISABLE;
  89         break;
  90     case RTAS_EEH_ENABLE: {
  91         PCIHostState *phb;
  92         PCIDevice *pdev;
  93
  94         /*
  95          * The EEH functionality is enabled on basis of PCI device,
  96          * instead of PE. We need check the validity of the PCI
  97          * device address.
  98          */
  99         phb = PCI_HOST_BRIDGE(sphb);
 100         pdev = pci_find_device(phb->bus,
 101                                (addr >> 16) & 0xFF, (addr >> 8) & 0xFF);
 102         if (!pdev) {
 103             return RTAS_OUT_PARAM_ERROR;
 104         }
 105
 106         op.op = VFIO_EEH_PE_ENABLE;
 107         break;
 108     }
 109     case RTAS_EEH_THAW_IO:
 110         op.op = VFIO_EEH_PE_UNFREEZE_IO;
 111         break;
 112     case RTAS_EEH_THAW_DMA:
 113         op.op = VFIO_EEH_PE_UNFREEZE_DMA;
 114         break;
 115     default:
 116         return RTAS_OUT_PARAM_ERROR;
 117     }
 118
 119     ret = vfio_container_ioctl(&svphb->phb.iommu_as, svphb->iommugroupid,
 120                                VFIO_EEH_PE_OP, &op);
 121     if (ret < 0) {
 122         return RTAS_OUT_HW_ERROR;
 123     }
 124
 125     return RTAS_OUT_SUCCESS;
 126 }
 127
 128 static int spapr_phb_vfio_eeh_get_state(sPAPRPHBState *sphb, int *state)
 129 {
 130     sPAPRPHBVFIOState *svphb = SPAPR_PCI_VFIO_HOST_BRIDGE(sphb);
 131     struct vfio_eeh_pe_op op = { .argsz = sizeof(op) };
 132     int ret;
 133
 134     op.op = VFIO_EEH_PE_GET_STATE;
 135     ret = vfio_container_ioctl(&svphb->phb.iommu_as, svphb->iommugroupid,
 136                                VFIO_EEH_PE_OP, &op);
 137     if (ret < 0) {
 138         return RTAS_OUT_PARAM_ERROR;
 139     }
 140
 141     *state = ret;
 142     return RTAS_OUT_SUCCESS;
 143 }
 144
 145 static int spapr_phb_vfio_eeh_reset(sPAPRPHBState *sphb, int option)
 146 {
 147     sPAPRPHBVFIOState *svphb = SPAPR_PCI_VFIO_HOST_BRIDGE(sphb);
 148     struct vfio_eeh_pe_op op = { .argsz = sizeof(op) };
 149     int ret;
 150
 151     switch (option) {
 152     case RTAS_SLOT_RESET_DEACTIVATE:
 153         op.op = VFIO_EEH_PE_RESET_DEACTIVATE;
 154         break;
 155     case RTAS_SLOT_RESET_HOT:
 156         op.op = VFIO_EEH_PE_RESET_HOT;
 157         break;
 158     case RTAS_SLOT_RESET_FUNDAMENTAL:
 159         op.op = VFIO_EEH_PE_RESET_FUNDAMENTAL;
 160         break;
 161     default:
 162         return RTAS_OUT_PARAM_ERROR;
 163     }
 164
 165     ret = vfio_container_ioctl(&svphb->phb.iommu_as, svphb->iommugroupid,
 166                                VFIO_EEH_PE_OP, &op);
 167     if (ret < 0) {
 168         return RTAS_OUT_HW_ERROR;
 169     }
 170
 171     return RTAS_OUT_SUCCESS;
 172 }
 173
 174 static int spapr_phb_vfio_eeh_configure(sPAPRPHBState *sphb)
 175 {
 176     sPAPRPHBVFIOState *svphb = SPAPR_PCI_VFIO_HOST_BRIDGE(sphb);
 177     struct vfio_eeh_pe_op op = { .argsz = sizeof(op) };
 178     int ret;
 179
 180     op.op = VFIO_EEH_PE_CONFIGURE;
 181     ret = vfio_container_ioctl(&svphb->phb.iommu_as, svphb->iommugroupid,
 182                                VFIO_EEH_PE_OP, &op);
 183     if (ret < 0) {
 184         return RTAS_OUT_PARAM_ERROR;
 185     }
 186
 187     return RTAS_OUT_SUCCESS;
 188 }
 189
 190 static void spapr_phb_vfio_class_init(ObjectClass *klass, void *data)
 191 {
 192     DeviceClass *dc = DEVICE_CLASS(klass);
 193     sPAPRPHBClass *spc = SPAPR_PCI_HOST_BRIDGE_CLASS(klass);
 194
 195     dc->props = spapr_phb_vfio_properties;
 196     dc->reset = spapr_phb_vfio_reset;
 197     spc->finish_realize = spapr_phb_vfio_finish_realize;
 198     spc->eeh_set_option = spapr_phb_vfio_eeh_set_option;
 199     spc->eeh_get_state = spapr_phb_vfio_eeh_get_state;
 200     spc->eeh_reset = spapr_phb_vfio_eeh_reset;
 201     spc->eeh_configure = spapr_phb_vfio_eeh_configure;
 202 }
 203
 204 static const TypeInfo spapr_phb_vfio_info = {
 205     .name          = TYPE_SPAPR_PCI_VFIO_HOST_BRIDGE,
 206     .parent        = TYPE_SPAPR_PCI_HOST_BRIDGE,
 207     .instance_size = sizeof(sPAPRPHBVFIOState),
 208     .class_init    = spapr_phb_vfio_class_init,
 209     .class_size    = sizeof(sPAPRPHBClass),
 210 };
 211
 212 static void spapr_pci_vfio_register_types(void)
 213 {
 214     type_register_static(&spapr_phb_vfio_info);
 215 }
 216
 217 type_init(spapr_pci_vfio_register_types)