ahci: correct types in NCQTransferState
[qemu/ar7.git] / hw / arm / omap_sx1.c
blob4b0f7f9c42606c50cf49cb0e66108cca810f27b4
1 /* omap_sx1.c Support for the Siemens SX1 smartphone emulation.
3 * Copyright (C) 2008
4 * Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
5 * Copyright (C) 2007 Vladimir Ananiev <vovan888@gmail.com>
7 * based on PalmOne's (TM) PDAs support (palm.c)
8 */
11 * PalmOne's (TM) PDAs.
13 * Copyright (C) 2006-2007 Andrzej Zaborowski <balrog@zabor.org>
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License as
17 * published by the Free Software Foundation; either version 2 of
18 * the License, or (at your option) any later version.
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
25 * You should have received a copy of the GNU General Public License along
26 * with this program; if not, see <http://www.gnu.org/licenses/>.
28 #include "hw/hw.h"
29 #include "ui/console.h"
30 #include "hw/arm/omap.h"
31 #include "hw/boards.h"
32 #include "hw/arm/arm.h"
33 #include "hw/block/flash.h"
34 #include "sysemu/block-backend.h"
35 #include "sysemu/qtest.h"
36 #include "exec/address-spaces.h"
38 /*****************************************************************************/
39 /* Siemens SX1 Cellphone V1 */
40 /* - ARM OMAP310 processor
41 * - SRAM 192 kB
42 * - SDRAM 32 MB at 0x10000000
43 * - Boot flash 16 MB at 0x00000000
44 * - Application flash 8 MB at 0x04000000
45 * - 3 serial ports
46 * - 1 SecureDigital
47 * - 1 LCD display
48 * - 1 RTC
51 /*****************************************************************************/
52 /* Siemens SX1 Cellphone V2 */
53 /* - ARM OMAP310 processor
54 * - SRAM 192 kB
55 * - SDRAM 32 MB at 0x10000000
56 * - Boot flash 32 MB at 0x00000000
57 * - 3 serial ports
58 * - 1 SecureDigital
59 * - 1 LCD display
60 * - 1 RTC
63 static uint64_t static_read(void *opaque, hwaddr offset,
64 unsigned size)
66 uint32_t *val = (uint32_t *) opaque;
67 uint32_t mask = (4 / size) - 1;
69 return *val >> ((offset & mask) << 3);
72 static void static_write(void *opaque, hwaddr offset,
73 uint64_t value, unsigned size)
75 #ifdef SPY
76 printf("%s: value %" PRIx64 " %u bytes written at 0x%x\n",
77 __func__, value, size, (int)offset);
78 #endif
81 static const MemoryRegionOps static_ops = {
82 .read = static_read,
83 .write = static_write,
84 .endianness = DEVICE_NATIVE_ENDIAN,
87 #define sdram_size 0x02000000
88 #define sector_size (128 * 1024)
89 #define flash0_size (16 * 1024 * 1024)
90 #define flash1_size ( 8 * 1024 * 1024)
91 #define flash2_size (32 * 1024 * 1024)
92 #define total_ram_v1 (sdram_size + flash0_size + flash1_size + OMAP15XX_SRAM_SIZE)
93 #define total_ram_v2 (sdram_size + flash2_size + OMAP15XX_SRAM_SIZE)
95 static struct arm_boot_info sx1_binfo = {
96 .loader_start = OMAP_EMIFF_BASE,
97 .ram_size = sdram_size,
98 .board_id = 0x265,
101 static void sx1_init(MachineState *machine, const int version)
103 struct omap_mpu_state_s *mpu;
104 MemoryRegion *address_space = get_system_memory();
105 MemoryRegion *flash = g_new(MemoryRegion, 1);
106 MemoryRegion *cs = g_new(MemoryRegion, 4);
107 static uint32_t cs0val = 0x00213090;
108 static uint32_t cs1val = 0x00215070;
109 static uint32_t cs2val = 0x00001139;
110 static uint32_t cs3val = 0x00001139;
111 DriveInfo *dinfo;
112 int fl_idx;
113 uint32_t flash_size = flash0_size;
114 int be;
116 if (version == 2) {
117 flash_size = flash2_size;
120 mpu = omap310_mpu_init(address_space, sx1_binfo.ram_size,
121 machine->cpu_model);
123 /* External Flash (EMIFS) */
124 memory_region_init_ram(flash, NULL, "omap_sx1.flash0-0", flash_size,
125 &error_abort);
126 vmstate_register_ram_global(flash);
127 memory_region_set_readonly(flash, true);
128 memory_region_add_subregion(address_space, OMAP_CS0_BASE, flash);
130 memory_region_init_io(&cs[0], NULL, &static_ops, &cs0val,
131 "sx1.cs0", OMAP_CS0_SIZE - flash_size);
132 memory_region_add_subregion(address_space,
133 OMAP_CS0_BASE + flash_size, &cs[0]);
136 memory_region_init_io(&cs[2], NULL, &static_ops, &cs2val,
137 "sx1.cs2", OMAP_CS2_SIZE);
138 memory_region_add_subregion(address_space,
139 OMAP_CS2_BASE, &cs[2]);
141 memory_region_init_io(&cs[3], NULL, &static_ops, &cs3val,
142 "sx1.cs3", OMAP_CS3_SIZE);
143 memory_region_add_subregion(address_space,
144 OMAP_CS2_BASE, &cs[3]);
146 fl_idx = 0;
147 #ifdef TARGET_WORDS_BIGENDIAN
148 be = 1;
149 #else
150 be = 0;
151 #endif
153 if ((dinfo = drive_get(IF_PFLASH, 0, fl_idx)) != NULL) {
154 if (!pflash_cfi01_register(OMAP_CS0_BASE, NULL,
155 "omap_sx1.flash0-1", flash_size,
156 blk_by_legacy_dinfo(dinfo),
157 sector_size, flash_size / sector_size,
158 4, 0, 0, 0, 0, be)) {
159 fprintf(stderr, "qemu: Error registering flash memory %d.\n",
160 fl_idx);
162 fl_idx++;
165 if ((version == 1) &&
166 (dinfo = drive_get(IF_PFLASH, 0, fl_idx)) != NULL) {
167 MemoryRegion *flash_1 = g_new(MemoryRegion, 1);
168 memory_region_init_ram(flash_1, NULL, "omap_sx1.flash1-0", flash1_size,
169 &error_abort);
170 vmstate_register_ram_global(flash_1);
171 memory_region_set_readonly(flash_1, true);
172 memory_region_add_subregion(address_space, OMAP_CS1_BASE, flash_1);
174 memory_region_init_io(&cs[1], NULL, &static_ops, &cs1val,
175 "sx1.cs1", OMAP_CS1_SIZE - flash1_size);
176 memory_region_add_subregion(address_space,
177 OMAP_CS1_BASE + flash1_size, &cs[1]);
179 if (!pflash_cfi01_register(OMAP_CS1_BASE, NULL,
180 "omap_sx1.flash1-1", flash1_size,
181 blk_by_legacy_dinfo(dinfo),
182 sector_size, flash1_size / sector_size,
183 4, 0, 0, 0, 0, be)) {
184 fprintf(stderr, "qemu: Error registering flash memory %d.\n",
185 fl_idx);
187 fl_idx++;
188 } else {
189 memory_region_init_io(&cs[1], NULL, &static_ops, &cs1val,
190 "sx1.cs1", OMAP_CS1_SIZE);
191 memory_region_add_subregion(address_space,
192 OMAP_CS1_BASE, &cs[1]);
195 if (!machine->kernel_filename && !fl_idx && !qtest_enabled()) {
196 fprintf(stderr, "Kernel or Flash image must be specified\n");
197 exit(1);
200 /* Load the kernel. */
201 sx1_binfo.kernel_filename = machine->kernel_filename;
202 sx1_binfo.kernel_cmdline = machine->kernel_cmdline;
203 sx1_binfo.initrd_filename = machine->initrd_filename;
204 arm_load_kernel(mpu->cpu, &sx1_binfo);
206 /* TODO: fix next line */
207 //~ qemu_console_resize(ds, 640, 480);
210 static void sx1_init_v1(MachineState *machine)
212 sx1_init(machine, 1);
215 static void sx1_init_v2(MachineState *machine)
217 sx1_init(machine, 2);
220 static QEMUMachine sx1_machine_v2 = {
221 .name = "sx1",
222 .desc = "Siemens SX1 (OMAP310) V2",
223 .init = sx1_init_v2,
226 static QEMUMachine sx1_machine_v1 = {
227 .name = "sx1-v1",
228 .desc = "Siemens SX1 (OMAP310) V1",
229 .init = sx1_init_v1,
232 static void sx1_machine_init(void)
234 qemu_register_machine(&sx1_machine_v2);
235 qemu_register_machine(&sx1_machine_v1);
238 machine_init(sx1_machine_init);