ehci: Use uframe precision for interrupt threshold checking (v2)
[qemu/ar7.git] / hw / mips.h
blob291e85f6b92442102acd92d1b654e1fca5ce43a8
1 #ifndef HW_MIPS_H
2 #define HW_MIPS_H
3 /* Definitions for mips board emulation. */
5 #include "exec/memory.h"
7 /* gt64xxx.c */
8 PCIBus *gt64120_register(qemu_irq *pic);
10 /* bonito.c */
11 PCIBus *bonito_init(qemu_irq *pic);
13 /* rc4030.c */
14 typedef struct rc4030DMAState *rc4030_dma;
15 void rc4030_dma_memory_rw(void *opaque, hwaddr addr, uint8_t *buf, int len, int is_write);
16 void rc4030_dma_read(void *dma, uint8_t *buf, int len);
17 void rc4030_dma_write(void *dma, uint8_t *buf, int len);
19 void *rc4030_init(qemu_irq timer, qemu_irq jazz_bus,
20 qemu_irq **irqs, rc4030_dma **dmas,
21 MemoryRegion *sysmem);
23 /* dp8393x.c */
24 void dp83932_init(NICInfo *nd, hwaddr base, int it_shift,
25 MemoryRegion *address_space,
26 qemu_irq irq, void* mem_opaque,
27 void (*memory_rw)(void *opaque, hwaddr addr, uint8_t *buf, int len, int is_write));
29 #endif