include/hw/ppc/pnv_lpc.h

   1 /*
   2  * QEMU PowerPC PowerNV LPC controller
   3  *
   4  * Copyright (c) 2016, IBM Corporation.
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  18  */
  19 #ifndef _PPC_PNV_LPC_H
  20 #define _PPC_PNV_LPC_H
  21
  22 #define TYPE_PNV_LPC "pnv-lpc"
  23 #define PNV_LPC(obj) \
  24      OBJECT_CHECK(PnvLpcController, (obj), TYPE_PNV_LPC)
  25
  26 typedef struct PnvLpcController {
  27     DeviceState parent;
  28
  29     uint64_t eccb_stat_reg;
  30     uint32_t eccb_data_reg;
  31
  32     /* OPB bus */
  33     MemoryRegion opb_mr;
  34     AddressSpace opb_as;
  35
  36     /* ISA IO and Memory space */
  37     MemoryRegion isa_io;
  38     MemoryRegion isa_mem;
  39
  40     /* Windows from OPB to ISA (aliases) */
  41     MemoryRegion opb_isa_io;
  42     MemoryRegion opb_isa_mem;
  43     MemoryRegion opb_isa_fw;
  44
  45     /* Registers */
  46     MemoryRegion lpc_hc_regs;
  47     MemoryRegion opb_master_regs;
  48
  49     /* OPB Master LS registers */
  50     uint32_t opb_irq_stat;
  51     uint32_t opb_irq_mask;
  52     uint32_t opb_irq_pol;
  53     uint32_t opb_irq_input;
  54
  55     /* LPC HC registers */
  56     uint32_t lpc_hc_fw_seg_idsel;
  57     uint32_t lpc_hc_fw_rd_acc_size;
  58     uint32_t lpc_hc_irqser_ctrl;
  59     uint32_t lpc_hc_irqmask;
  60     uint32_t lpc_hc_irqstat;
  61     uint32_t lpc_hc_error_addr;
  62
  63     /* XSCOM registers */
  64     MemoryRegion xscom_regs;
  65 } PnvLpcController;
  66
  67 #endif /* _PPC_PNV_LPC_H */