2 * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
4 * Copyright (c) 2004-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
6 * Copyright (c) 2010 David Gibson, IBM Corporation.
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
27 #include "qemu/osdep.h"
28 #include "qapi/error.h"
29 #include "sysemu/sysemu.h"
30 #include "sysemu/numa.h"
33 #include "hw/fw-path-provider.h"
36 #include "sysemu/device_tree.h"
37 #include "sysemu/block-backend.h"
38 #include "sysemu/cpus.h"
39 #include "sysemu/kvm.h"
40 #include "sysemu/device_tree.h"
42 #include "migration/migration.h"
43 #include "mmu-hash64.h"
46 #include "hw/boards.h"
47 #include "hw/ppc/ppc.h"
48 #include "hw/loader.h"
50 #include "hw/ppc/spapr.h"
51 #include "hw/ppc/spapr_vio.h"
52 #include "hw/pci-host/spapr.h"
53 #include "hw/ppc/xics.h"
54 #include "hw/pci/msi.h"
56 #include "hw/pci/pci.h"
57 #include "hw/scsi/scsi.h"
58 #include "hw/virtio/virtio-scsi.h"
60 #include "exec/address-spaces.h"
62 #include "qemu/config-file.h"
63 #include "qemu/error-report.h"
67 #include "hw/compat.h"
68 #include "qemu/cutils.h"
69 #include "hw/ppc/spapr_cpu_core.h"
70 #include "qmp-commands.h"
74 /* SLOF memory layout:
76 * SLOF raw image loaded at 0, copies its romfs right below the flat
77 * device-tree, then position SLOF itself 31M below that
79 * So we set FW_OVERHEAD to 40MB which should account for all of that
82 * We load our kernel at 4M, leaving space for SLOF initial image
84 #define FDT_MAX_SIZE 0x100000
85 #define RTAS_MAX_SIZE 0x10000
86 #define RTAS_MAX_ADDR 0x80000000 /* RTAS must stay below that */
87 #define FW_MAX_SIZE 0x400000
88 #define FW_FILE_NAME "slof.bin"
89 #define FW_OVERHEAD 0x2800000
90 #define KERNEL_LOAD_ADDR FW_MAX_SIZE
92 #define MIN_RMA_SLOF 128UL
94 #define PHANDLE_XICP 0x00001111
96 #define HTAB_SIZE(spapr) (1ULL << ((spapr)->htab_shift))
98 static XICSState
*try_create_xics(const char *type
, int nr_servers
,
99 int nr_irqs
, Error
**errp
)
104 dev
= qdev_create(NULL
, type
);
105 qdev_prop_set_uint32(dev
, "nr_servers", nr_servers
);
106 qdev_prop_set_uint32(dev
, "nr_irqs", nr_irqs
);
107 object_property_set_bool(OBJECT(dev
), true, "realized", &err
);
109 error_propagate(errp
, err
);
110 object_unparent(OBJECT(dev
));
113 return XICS_COMMON(dev
);
116 static XICSState
*xics_system_init(MachineState
*machine
,
117 int nr_servers
, int nr_irqs
, Error
**errp
)
119 XICSState
*icp
= NULL
;
124 if (machine_kernel_irqchip_allowed(machine
)) {
125 icp
= try_create_xics(TYPE_KVM_XICS
, nr_servers
, nr_irqs
, &err
);
127 if (machine_kernel_irqchip_required(machine
) && !icp
) {
128 error_reportf_err(err
,
129 "kernel_irqchip requested but unavailable: ");
136 icp
= try_create_xics(TYPE_XICS
, nr_servers
, nr_irqs
, errp
);
142 static int spapr_fixup_cpu_smt_dt(void *fdt
, int offset
, PowerPCCPU
*cpu
,
146 uint32_t servers_prop
[smt_threads
];
147 uint32_t gservers_prop
[smt_threads
* 2];
148 int index
= ppc_get_vcpu_dt_id(cpu
);
150 if (cpu
->cpu_version
) {
151 ret
= fdt_setprop_cell(fdt
, offset
, "cpu-version", cpu
->cpu_version
);
157 /* Build interrupt servers and gservers properties */
158 for (i
= 0; i
< smt_threads
; i
++) {
159 servers_prop
[i
] = cpu_to_be32(index
+ i
);
160 /* Hack, direct the group queues back to cpu 0 */
161 gservers_prop
[i
*2] = cpu_to_be32(index
+ i
);
162 gservers_prop
[i
*2 + 1] = 0;
164 ret
= fdt_setprop(fdt
, offset
, "ibm,ppc-interrupt-server#s",
165 servers_prop
, sizeof(servers_prop
));
169 ret
= fdt_setprop(fdt
, offset
, "ibm,ppc-interrupt-gserver#s",
170 gservers_prop
, sizeof(gservers_prop
));
175 static int spapr_fixup_cpu_numa_dt(void *fdt
, int offset
, CPUState
*cs
)
178 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
179 int index
= ppc_get_vcpu_dt_id(cpu
);
180 uint32_t associativity
[] = {cpu_to_be32(0x5),
184 cpu_to_be32(cs
->numa_node
),
187 /* Advertise NUMA via ibm,associativity */
188 if (nb_numa_nodes
> 1) {
189 ret
= fdt_setprop(fdt
, offset
, "ibm,associativity", associativity
,
190 sizeof(associativity
));
196 static int spapr_fixup_cpu_dt(void *fdt
, sPAPRMachineState
*spapr
)
198 int ret
= 0, offset
, cpus_offset
;
201 int smt
= kvmppc_smt_threads();
202 uint32_t pft_size_prop
[] = {0, cpu_to_be32(spapr
->htab_shift
)};
205 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
206 DeviceClass
*dc
= DEVICE_GET_CLASS(cs
);
207 int index
= ppc_get_vcpu_dt_id(cpu
);
209 if ((index
% smt
) != 0) {
213 snprintf(cpu_model
, 32, "%s@%x", dc
->fw_name
, index
);
215 cpus_offset
= fdt_path_offset(fdt
, "/cpus");
216 if (cpus_offset
< 0) {
217 cpus_offset
= fdt_add_subnode(fdt
, fdt_path_offset(fdt
, "/"),
219 if (cpus_offset
< 0) {
223 offset
= fdt_subnode_offset(fdt
, cpus_offset
, cpu_model
);
225 offset
= fdt_add_subnode(fdt
, cpus_offset
, cpu_model
);
231 ret
= fdt_setprop(fdt
, offset
, "ibm,pft-size",
232 pft_size_prop
, sizeof(pft_size_prop
));
237 ret
= spapr_fixup_cpu_numa_dt(fdt
, offset
, cs
);
242 ret
= spapr_fixup_cpu_smt_dt(fdt
, offset
, cpu
,
243 ppc_get_compat_smt_threads(cpu
));
252 static size_t create_page_sizes_prop(CPUPPCState
*env
, uint32_t *prop
,
255 size_t maxcells
= maxsize
/ sizeof(uint32_t);
259 for (i
= 0; i
< PPC_PAGE_SIZES_MAX_SZ
; i
++) {
260 struct ppc_one_seg_page_size
*sps
= &env
->sps
.sps
[i
];
262 if (!sps
->page_shift
) {
265 for (count
= 0; count
< PPC_PAGE_SIZES_MAX_SZ
; count
++) {
266 if (sps
->enc
[count
].page_shift
== 0) {
270 if ((p
- prop
) >= (maxcells
- 3 - count
* 2)) {
273 *(p
++) = cpu_to_be32(sps
->page_shift
);
274 *(p
++) = cpu_to_be32(sps
->slb_enc
);
275 *(p
++) = cpu_to_be32(count
);
276 for (j
= 0; j
< count
; j
++) {
277 *(p
++) = cpu_to_be32(sps
->enc
[j
].page_shift
);
278 *(p
++) = cpu_to_be32(sps
->enc
[j
].pte_enc
);
282 return (p
- prop
) * sizeof(uint32_t);
285 static hwaddr
spapr_node0_size(void)
287 MachineState
*machine
= MACHINE(qdev_get_machine());
291 for (i
= 0; i
< nb_numa_nodes
; ++i
) {
292 if (numa_info
[i
].node_mem
) {
293 return MIN(pow2floor(numa_info
[i
].node_mem
),
298 return machine
->ram_size
;
305 fprintf(stderr, "qemu: error creating device tree: %s: %s\n", \
306 #exp, fdt_strerror(ret)); \
311 static void add_str(GString
*s
, const gchar
*s1
)
313 g_string_append_len(s
, s1
, strlen(s1
) + 1);
316 static void *spapr_create_fdt_skel(hwaddr initrd_base
,
320 const char *kernel_cmdline
,
324 uint32_t start_prop
= cpu_to_be32(initrd_base
);
325 uint32_t end_prop
= cpu_to_be32(initrd_base
+ initrd_size
);
326 GString
*hypertas
= g_string_sized_new(256);
327 GString
*qemu_hypertas
= g_string_sized_new(256);
328 uint32_t refpoints
[] = {cpu_to_be32(0x4), cpu_to_be32(0x4)};
329 uint32_t interrupt_server_ranges_prop
[] = {0, cpu_to_be32(max_cpus
)};
330 unsigned char vec5
[] = {0x0, 0x0, 0x0, 0x0, 0x0, 0x80};
333 add_str(hypertas
, "hcall-pft");
334 add_str(hypertas
, "hcall-term");
335 add_str(hypertas
, "hcall-dabr");
336 add_str(hypertas
, "hcall-interrupt");
337 add_str(hypertas
, "hcall-tce");
338 add_str(hypertas
, "hcall-vio");
339 add_str(hypertas
, "hcall-splpar");
340 add_str(hypertas
, "hcall-bulk");
341 add_str(hypertas
, "hcall-set-mode");
342 add_str(qemu_hypertas
, "hcall-memop1");
344 fdt
= g_malloc0(FDT_MAX_SIZE
);
345 _FDT((fdt_create(fdt
, FDT_MAX_SIZE
)));
348 _FDT((fdt_add_reservemap_entry(fdt
, KERNEL_LOAD_ADDR
, kernel_size
)));
351 _FDT((fdt_add_reservemap_entry(fdt
, initrd_base
, initrd_size
)));
353 _FDT((fdt_finish_reservemap(fdt
)));
356 _FDT((fdt_begin_node(fdt
, "")));
357 _FDT((fdt_property_string(fdt
, "device_type", "chrp")));
358 _FDT((fdt_property_string(fdt
, "model", "IBM pSeries (emulated by qemu)")));
359 _FDT((fdt_property_string(fdt
, "compatible", "qemu,pseries")));
362 * Add info to guest to indentify which host is it being run on
363 * and what is the uuid of the guest
365 if (kvmppc_get_host_model(&buf
)) {
366 _FDT((fdt_property_string(fdt
, "host-model", buf
)));
369 if (kvmppc_get_host_serial(&buf
)) {
370 _FDT((fdt_property_string(fdt
, "host-serial", buf
)));
374 buf
= g_strdup_printf(UUID_FMT
, qemu_uuid
[0], qemu_uuid
[1],
375 qemu_uuid
[2], qemu_uuid
[3], qemu_uuid
[4],
376 qemu_uuid
[5], qemu_uuid
[6], qemu_uuid
[7],
377 qemu_uuid
[8], qemu_uuid
[9], qemu_uuid
[10],
378 qemu_uuid
[11], qemu_uuid
[12], qemu_uuid
[13],
379 qemu_uuid
[14], qemu_uuid
[15]);
381 _FDT((fdt_property_string(fdt
, "vm,uuid", buf
)));
383 _FDT((fdt_property_string(fdt
, "system-id", buf
)));
387 if (qemu_get_vm_name()) {
388 _FDT((fdt_property_string(fdt
, "ibm,partition-name",
389 qemu_get_vm_name())));
392 _FDT((fdt_property_cell(fdt
, "#address-cells", 0x2)));
393 _FDT((fdt_property_cell(fdt
, "#size-cells", 0x2)));
396 _FDT((fdt_begin_node(fdt
, "chosen")));
398 /* Set Form1_affinity */
399 _FDT((fdt_property(fdt
, "ibm,architecture-vec-5", vec5
, sizeof(vec5
))));
401 _FDT((fdt_property_string(fdt
, "bootargs", kernel_cmdline
)));
402 _FDT((fdt_property(fdt
, "linux,initrd-start",
403 &start_prop
, sizeof(start_prop
))));
404 _FDT((fdt_property(fdt
, "linux,initrd-end",
405 &end_prop
, sizeof(end_prop
))));
407 uint64_t kprop
[2] = { cpu_to_be64(KERNEL_LOAD_ADDR
),
408 cpu_to_be64(kernel_size
) };
410 _FDT((fdt_property(fdt
, "qemu,boot-kernel", &kprop
, sizeof(kprop
))));
412 _FDT((fdt_property(fdt
, "qemu,boot-kernel-le", NULL
, 0)));
416 _FDT((fdt_property_cell(fdt
, "qemu,boot-menu", boot_menu
)));
418 _FDT((fdt_property_cell(fdt
, "qemu,graphic-width", graphic_width
)));
419 _FDT((fdt_property_cell(fdt
, "qemu,graphic-height", graphic_height
)));
420 _FDT((fdt_property_cell(fdt
, "qemu,graphic-depth", graphic_depth
)));
422 _FDT((fdt_end_node(fdt
)));
425 _FDT((fdt_begin_node(fdt
, "rtas")));
427 if (!kvm_enabled() || kvmppc_spapr_use_multitce()) {
428 add_str(hypertas
, "hcall-multi-tce");
430 _FDT((fdt_property(fdt
, "ibm,hypertas-functions", hypertas
->str
,
432 g_string_free(hypertas
, TRUE
);
433 _FDT((fdt_property(fdt
, "qemu,hypertas-functions", qemu_hypertas
->str
,
434 qemu_hypertas
->len
)));
435 g_string_free(qemu_hypertas
, TRUE
);
437 _FDT((fdt_property(fdt
, "ibm,associativity-reference-points",
438 refpoints
, sizeof(refpoints
))));
440 _FDT((fdt_property_cell(fdt
, "rtas-error-log-max", RTAS_ERROR_LOG_MAX
)));
441 _FDT((fdt_property_cell(fdt
, "rtas-event-scan-rate",
442 RTAS_EVENT_SCAN_RATE
)));
445 _FDT((fdt_property(fdt
, "ibm,change-msix-capable", NULL
, 0)));
449 * According to PAPR, rtas ibm,os-term does not guarantee a return
450 * back to the guest cpu.
452 * While an additional ibm,extended-os-term property indicates that
453 * rtas call return will always occur. Set this property.
455 _FDT((fdt_property(fdt
, "ibm,extended-os-term", NULL
, 0)));
457 _FDT((fdt_end_node(fdt
)));
459 /* interrupt controller */
460 _FDT((fdt_begin_node(fdt
, "interrupt-controller")));
462 _FDT((fdt_property_string(fdt
, "device_type",
463 "PowerPC-External-Interrupt-Presentation")));
464 _FDT((fdt_property_string(fdt
, "compatible", "IBM,ppc-xicp")));
465 _FDT((fdt_property(fdt
, "interrupt-controller", NULL
, 0)));
466 _FDT((fdt_property(fdt
, "ibm,interrupt-server-ranges",
467 interrupt_server_ranges_prop
,
468 sizeof(interrupt_server_ranges_prop
))));
469 _FDT((fdt_property_cell(fdt
, "#interrupt-cells", 2)));
470 _FDT((fdt_property_cell(fdt
, "linux,phandle", PHANDLE_XICP
)));
471 _FDT((fdt_property_cell(fdt
, "phandle", PHANDLE_XICP
)));
473 _FDT((fdt_end_node(fdt
)));
476 _FDT((fdt_begin_node(fdt
, "vdevice")));
478 _FDT((fdt_property_string(fdt
, "device_type", "vdevice")));
479 _FDT((fdt_property_string(fdt
, "compatible", "IBM,vdevice")));
480 _FDT((fdt_property_cell(fdt
, "#address-cells", 0x1)));
481 _FDT((fdt_property_cell(fdt
, "#size-cells", 0x0)));
482 _FDT((fdt_property_cell(fdt
, "#interrupt-cells", 0x2)));
483 _FDT((fdt_property(fdt
, "interrupt-controller", NULL
, 0)));
485 _FDT((fdt_end_node(fdt
)));
488 spapr_events_fdt_skel(fdt
, epow_irq
);
490 /* /hypervisor node */
492 uint8_t hypercall
[16];
494 /* indicate KVM hypercall interface */
495 _FDT((fdt_begin_node(fdt
, "hypervisor")));
496 _FDT((fdt_property_string(fdt
, "compatible", "linux,kvm")));
497 if (kvmppc_has_cap_fixup_hcalls()) {
499 * Older KVM versions with older guest kernels were broken with the
500 * magic page, don't allow the guest to map it.
502 if (!kvmppc_get_hypercall(first_cpu
->env_ptr
, hypercall
,
503 sizeof(hypercall
))) {
504 _FDT((fdt_property(fdt
, "hcall-instructions", hypercall
,
505 sizeof(hypercall
))));
508 _FDT((fdt_end_node(fdt
)));
511 _FDT((fdt_end_node(fdt
))); /* close root node */
512 _FDT((fdt_finish(fdt
)));
517 static int spapr_populate_memory_node(void *fdt
, int nodeid
, hwaddr start
,
520 uint32_t associativity
[] = {
521 cpu_to_be32(0x4), /* length */
522 cpu_to_be32(0x0), cpu_to_be32(0x0),
523 cpu_to_be32(0x0), cpu_to_be32(nodeid
)
526 uint64_t mem_reg_property
[2];
529 mem_reg_property
[0] = cpu_to_be64(start
);
530 mem_reg_property
[1] = cpu_to_be64(size
);
532 sprintf(mem_name
, "memory@" TARGET_FMT_lx
, start
);
533 off
= fdt_add_subnode(fdt
, 0, mem_name
);
535 _FDT((fdt_setprop_string(fdt
, off
, "device_type", "memory")));
536 _FDT((fdt_setprop(fdt
, off
, "reg", mem_reg_property
,
537 sizeof(mem_reg_property
))));
538 _FDT((fdt_setprop(fdt
, off
, "ibm,associativity", associativity
,
539 sizeof(associativity
))));
543 static int spapr_populate_memory(sPAPRMachineState
*spapr
, void *fdt
)
545 MachineState
*machine
= MACHINE(spapr
);
546 hwaddr mem_start
, node_size
;
547 int i
, nb_nodes
= nb_numa_nodes
;
548 NodeInfo
*nodes
= numa_info
;
551 /* No NUMA nodes, assume there is just one node with whole RAM */
552 if (!nb_numa_nodes
) {
554 ramnode
.node_mem
= machine
->ram_size
;
558 for (i
= 0, mem_start
= 0; i
< nb_nodes
; ++i
) {
559 if (!nodes
[i
].node_mem
) {
562 if (mem_start
>= machine
->ram_size
) {
565 node_size
= nodes
[i
].node_mem
;
566 if (node_size
> machine
->ram_size
- mem_start
) {
567 node_size
= machine
->ram_size
- mem_start
;
571 /* ppc_spapr_init() checks for rma_size <= node0_size already */
572 spapr_populate_memory_node(fdt
, i
, 0, spapr
->rma_size
);
573 mem_start
+= spapr
->rma_size
;
574 node_size
-= spapr
->rma_size
;
576 for ( ; node_size
; ) {
577 hwaddr sizetmp
= pow2floor(node_size
);
579 /* mem_start != 0 here */
580 if (ctzl(mem_start
) < ctzl(sizetmp
)) {
581 sizetmp
= 1ULL << ctzl(mem_start
);
584 spapr_populate_memory_node(fdt
, i
, mem_start
, sizetmp
);
585 node_size
-= sizetmp
;
586 mem_start
+= sizetmp
;
593 static void spapr_populate_cpu_dt(CPUState
*cs
, void *fdt
, int offset
,
594 sPAPRMachineState
*spapr
)
596 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
597 CPUPPCState
*env
= &cpu
->env
;
598 PowerPCCPUClass
*pcc
= POWERPC_CPU_GET_CLASS(cs
);
599 int index
= ppc_get_vcpu_dt_id(cpu
);
600 uint32_t segs
[] = {cpu_to_be32(28), cpu_to_be32(40),
601 0xffffffff, 0xffffffff};
602 uint32_t tbfreq
= kvm_enabled() ? kvmppc_get_tbfreq()
603 : SPAPR_TIMEBASE_FREQ
;
604 uint32_t cpufreq
= kvm_enabled() ? kvmppc_get_clockfreq() : 1000000000;
605 uint32_t page_sizes_prop
[64];
606 size_t page_sizes_prop_size
;
607 uint32_t vcpus_per_socket
= smp_threads
* smp_cores
;
608 uint32_t pft_size_prop
[] = {0, cpu_to_be32(spapr
->htab_shift
)};
609 sPAPRDRConnector
*drc
;
610 sPAPRDRConnectorClass
*drck
;
613 drc
= spapr_dr_connector_by_id(SPAPR_DR_CONNECTOR_TYPE_CPU
, index
);
615 drck
= SPAPR_DR_CONNECTOR_GET_CLASS(drc
);
616 drc_index
= drck
->get_index(drc
);
617 _FDT((fdt_setprop_cell(fdt
, offset
, "ibm,my-drc-index", drc_index
)));
620 /* Note: we keep CI large pages off for now because a 64K capable guest
621 * provisioned with large pages might otherwise try to map a qemu
622 * framebuffer (or other kind of memory mapped PCI BAR) using 64K pages
623 * even if that qemu runs on a 4k host.
625 * We can later add this bit back when we are confident this is not
626 * an issue (!HV KVM or 64K host)
628 uint8_t pa_features_206
[] = { 6, 0,
629 0xf6, 0x1f, 0xc7, 0x00, 0x80, 0xc0 };
630 uint8_t pa_features_207
[] = { 24, 0,
631 0xf6, 0x1f, 0xc7, 0xc0, 0x80, 0xf0,
632 0x80, 0x00, 0x00, 0x00, 0x00, 0x00,
633 0x00, 0x00, 0x00, 0x00, 0x80, 0x00,
634 0x80, 0x00, 0x80, 0x00, 0x80, 0x00 };
635 uint8_t *pa_features
;
638 _FDT((fdt_setprop_cell(fdt
, offset
, "reg", index
)));
639 _FDT((fdt_setprop_string(fdt
, offset
, "device_type", "cpu")));
641 _FDT((fdt_setprop_cell(fdt
, offset
, "cpu-version", env
->spr
[SPR_PVR
])));
642 _FDT((fdt_setprop_cell(fdt
, offset
, "d-cache-block-size",
643 env
->dcache_line_size
)));
644 _FDT((fdt_setprop_cell(fdt
, offset
, "d-cache-line-size",
645 env
->dcache_line_size
)));
646 _FDT((fdt_setprop_cell(fdt
, offset
, "i-cache-block-size",
647 env
->icache_line_size
)));
648 _FDT((fdt_setprop_cell(fdt
, offset
, "i-cache-line-size",
649 env
->icache_line_size
)));
651 if (pcc
->l1_dcache_size
) {
652 _FDT((fdt_setprop_cell(fdt
, offset
, "d-cache-size",
653 pcc
->l1_dcache_size
)));
655 fprintf(stderr
, "Warning: Unknown L1 dcache size for cpu\n");
657 if (pcc
->l1_icache_size
) {
658 _FDT((fdt_setprop_cell(fdt
, offset
, "i-cache-size",
659 pcc
->l1_icache_size
)));
661 fprintf(stderr
, "Warning: Unknown L1 icache size for cpu\n");
664 _FDT((fdt_setprop_cell(fdt
, offset
, "timebase-frequency", tbfreq
)));
665 _FDT((fdt_setprop_cell(fdt
, offset
, "clock-frequency", cpufreq
)));
666 _FDT((fdt_setprop_cell(fdt
, offset
, "slb-size", env
->slb_nr
)));
667 _FDT((fdt_setprop_cell(fdt
, offset
, "ibm,slb-size", env
->slb_nr
)));
668 _FDT((fdt_setprop_string(fdt
, offset
, "status", "okay")));
669 _FDT((fdt_setprop(fdt
, offset
, "64-bit", NULL
, 0)));
671 if (env
->spr_cb
[SPR_PURR
].oea_read
) {
672 _FDT((fdt_setprop(fdt
, offset
, "ibm,purr", NULL
, 0)));
675 if (env
->mmu_model
& POWERPC_MMU_1TSEG
) {
676 _FDT((fdt_setprop(fdt
, offset
, "ibm,processor-segment-sizes",
677 segs
, sizeof(segs
))));
680 /* Advertise VMX/VSX (vector extensions) if available
681 * 0 / no property == no vector extensions
682 * 1 == VMX / Altivec available
683 * 2 == VSX available */
684 if (env
->insns_flags
& PPC_ALTIVEC
) {
685 uint32_t vmx
= (env
->insns_flags2
& PPC2_VSX
) ? 2 : 1;
687 _FDT((fdt_setprop_cell(fdt
, offset
, "ibm,vmx", vmx
)));
690 /* Advertise DFP (Decimal Floating Point) if available
691 * 0 / no property == no DFP
692 * 1 == DFP available */
693 if (env
->insns_flags2
& PPC2_DFP
) {
694 _FDT((fdt_setprop_cell(fdt
, offset
, "ibm,dfp", 1)));
697 page_sizes_prop_size
= create_page_sizes_prop(env
, page_sizes_prop
,
698 sizeof(page_sizes_prop
));
699 if (page_sizes_prop_size
) {
700 _FDT((fdt_setprop(fdt
, offset
, "ibm,segment-page-sizes",
701 page_sizes_prop
, page_sizes_prop_size
)));
704 /* Do the ibm,pa-features property, adjust it for ci-large-pages */
705 if (env
->mmu_model
== POWERPC_MMU_2_06
) {
706 pa_features
= pa_features_206
;
707 pa_size
= sizeof(pa_features_206
);
708 } else /* env->mmu_model == POWERPC_MMU_2_07 */ {
709 pa_features
= pa_features_207
;
710 pa_size
= sizeof(pa_features_207
);
712 if (env
->ci_large_pages
) {
713 pa_features
[3] |= 0x20;
715 _FDT((fdt_setprop(fdt
, offset
, "ibm,pa-features", pa_features
, pa_size
)));
717 _FDT((fdt_setprop_cell(fdt
, offset
, "ibm,chip-id",
718 cs
->cpu_index
/ vcpus_per_socket
)));
720 _FDT((fdt_setprop(fdt
, offset
, "ibm,pft-size",
721 pft_size_prop
, sizeof(pft_size_prop
))));
723 _FDT(spapr_fixup_cpu_numa_dt(fdt
, offset
, cs
));
725 _FDT(spapr_fixup_cpu_smt_dt(fdt
, offset
, cpu
,
726 ppc_get_compat_smt_threads(cpu
)));
729 static void spapr_populate_cpus_dt_node(void *fdt
, sPAPRMachineState
*spapr
)
734 int smt
= kvmppc_smt_threads();
736 cpus_offset
= fdt_add_subnode(fdt
, 0, "cpus");
738 _FDT((fdt_setprop_cell(fdt
, cpus_offset
, "#address-cells", 0x1)));
739 _FDT((fdt_setprop_cell(fdt
, cpus_offset
, "#size-cells", 0x0)));
742 * We walk the CPUs in reverse order to ensure that CPU DT nodes
743 * created by fdt_add_subnode() end up in the right order in FDT
744 * for the guest kernel the enumerate the CPUs correctly.
746 CPU_FOREACH_REVERSE(cs
) {
747 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
748 int index
= ppc_get_vcpu_dt_id(cpu
);
749 DeviceClass
*dc
= DEVICE_GET_CLASS(cs
);
752 if ((index
% smt
) != 0) {
756 nodename
= g_strdup_printf("%s@%x", dc
->fw_name
, index
);
757 offset
= fdt_add_subnode(fdt
, cpus_offset
, nodename
);
760 spapr_populate_cpu_dt(cs
, fdt
, offset
, spapr
);
766 * Adds ibm,dynamic-reconfiguration-memory node.
767 * Refer to docs/specs/ppc-spapr-hotplug.txt for the documentation
768 * of this device tree node.
770 static int spapr_populate_drconf_memory(sPAPRMachineState
*spapr
, void *fdt
)
772 MachineState
*machine
= MACHINE(spapr
);
774 uint64_t lmb_size
= SPAPR_MEMORY_BLOCK_SIZE
;
775 uint32_t prop_lmb_size
[] = {0, cpu_to_be32(lmb_size
)};
776 uint32_t hotplug_lmb_start
= spapr
->hotplug_memory
.base
/ lmb_size
;
777 uint32_t nr_lmbs
= (spapr
->hotplug_memory
.base
+
778 memory_region_size(&spapr
->hotplug_memory
.mr
)) /
780 uint32_t *int_buf
, *cur_index
, buf_len
;
781 int nr_nodes
= nb_numa_nodes
? nb_numa_nodes
: 1;
784 * Don't create the node if there is no hotpluggable memory
786 if (machine
->ram_size
== machine
->maxram_size
) {
791 * Allocate enough buffer size to fit in ibm,dynamic-memory
792 * or ibm,associativity-lookup-arrays
794 buf_len
= MAX(nr_lmbs
* SPAPR_DR_LMB_LIST_ENTRY_SIZE
+ 1, nr_nodes
* 4 + 2)
796 cur_index
= int_buf
= g_malloc0(buf_len
);
798 offset
= fdt_add_subnode(fdt
, 0, "ibm,dynamic-reconfiguration-memory");
800 ret
= fdt_setprop(fdt
, offset
, "ibm,lmb-size", prop_lmb_size
,
801 sizeof(prop_lmb_size
));
806 ret
= fdt_setprop_cell(fdt
, offset
, "ibm,memory-flags-mask", 0xff);
811 ret
= fdt_setprop_cell(fdt
, offset
, "ibm,memory-preservation-time", 0x0);
816 /* ibm,dynamic-memory */
817 int_buf
[0] = cpu_to_be32(nr_lmbs
);
819 for (i
= 0; i
< nr_lmbs
; i
++) {
820 uint64_t addr
= i
* lmb_size
;
821 uint32_t *dynamic_memory
= cur_index
;
823 if (i
>= hotplug_lmb_start
) {
824 sPAPRDRConnector
*drc
;
825 sPAPRDRConnectorClass
*drck
;
827 drc
= spapr_dr_connector_by_id(SPAPR_DR_CONNECTOR_TYPE_LMB
, i
);
829 drck
= SPAPR_DR_CONNECTOR_GET_CLASS(drc
);
831 dynamic_memory
[0] = cpu_to_be32(addr
>> 32);
832 dynamic_memory
[1] = cpu_to_be32(addr
& 0xffffffff);
833 dynamic_memory
[2] = cpu_to_be32(drck
->get_index(drc
));
834 dynamic_memory
[3] = cpu_to_be32(0); /* reserved */
835 dynamic_memory
[4] = cpu_to_be32(numa_get_node(addr
, NULL
));
836 if (memory_region_present(get_system_memory(), addr
)) {
837 dynamic_memory
[5] = cpu_to_be32(SPAPR_LMB_FLAGS_ASSIGNED
);
839 dynamic_memory
[5] = cpu_to_be32(0);
843 * LMB information for RMA, boot time RAM and gap b/n RAM and
844 * hotplug memory region -- all these are marked as reserved
845 * and as having no valid DRC.
847 dynamic_memory
[0] = cpu_to_be32(addr
>> 32);
848 dynamic_memory
[1] = cpu_to_be32(addr
& 0xffffffff);
849 dynamic_memory
[2] = cpu_to_be32(0);
850 dynamic_memory
[3] = cpu_to_be32(0); /* reserved */
851 dynamic_memory
[4] = cpu_to_be32(-1);
852 dynamic_memory
[5] = cpu_to_be32(SPAPR_LMB_FLAGS_RESERVED
|
853 SPAPR_LMB_FLAGS_DRC_INVALID
);
856 cur_index
+= SPAPR_DR_LMB_LIST_ENTRY_SIZE
;
858 ret
= fdt_setprop(fdt
, offset
, "ibm,dynamic-memory", int_buf
, buf_len
);
863 /* ibm,associativity-lookup-arrays */
865 int_buf
[0] = cpu_to_be32(nr_nodes
);
866 int_buf
[1] = cpu_to_be32(4); /* Number of entries per associativity list */
868 for (i
= 0; i
< nr_nodes
; i
++) {
869 uint32_t associativity
[] = {
875 memcpy(cur_index
, associativity
, sizeof(associativity
));
878 ret
= fdt_setprop(fdt
, offset
, "ibm,associativity-lookup-arrays", int_buf
,
879 (cur_index
- int_buf
) * sizeof(uint32_t));
885 int spapr_h_cas_compose_response(sPAPRMachineState
*spapr
,
886 target_ulong addr
, target_ulong size
,
887 bool cpu_update
, bool memory_update
)
889 void *fdt
, *fdt_skel
;
890 sPAPRDeviceTreeUpdateHeader hdr
= { .version_id
= 1 };
891 sPAPRMachineClass
*smc
= SPAPR_MACHINE_GET_CLASS(qdev_get_machine());
895 /* Create sceleton */
896 fdt_skel
= g_malloc0(size
);
897 _FDT((fdt_create(fdt_skel
, size
)));
898 _FDT((fdt_begin_node(fdt_skel
, "")));
899 _FDT((fdt_end_node(fdt_skel
)));
900 _FDT((fdt_finish(fdt_skel
)));
901 fdt
= g_malloc0(size
);
902 _FDT((fdt_open_into(fdt_skel
, fdt
, size
)));
905 /* Fixup cpu nodes */
907 _FDT((spapr_fixup_cpu_dt(fdt
, spapr
)));
910 /* Generate ibm,dynamic-reconfiguration-memory node if required */
911 if (memory_update
&& smc
->dr_lmb_enabled
) {
912 _FDT((spapr_populate_drconf_memory(spapr
, fdt
)));
915 /* Pack resulting tree */
916 _FDT((fdt_pack(fdt
)));
918 if (fdt_totalsize(fdt
) + sizeof(hdr
) > size
) {
919 trace_spapr_cas_failed(size
);
923 cpu_physical_memory_write(addr
, &hdr
, sizeof(hdr
));
924 cpu_physical_memory_write(addr
+ sizeof(hdr
), fdt
, fdt_totalsize(fdt
));
925 trace_spapr_cas_continue(fdt_totalsize(fdt
) + sizeof(hdr
));
931 static void spapr_finalize_fdt(sPAPRMachineState
*spapr
,
936 MachineState
*machine
= MACHINE(qdev_get_machine());
937 sPAPRMachineClass
*smc
= SPAPR_MACHINE_GET_CLASS(machine
);
938 const char *boot_device
= machine
->boot_order
;
945 fdt
= g_malloc(FDT_MAX_SIZE
);
947 /* open out the base tree into a temp buffer for the final tweaks */
948 _FDT((fdt_open_into(spapr
->fdt_skel
, fdt
, FDT_MAX_SIZE
)));
950 ret
= spapr_populate_memory(spapr
, fdt
);
952 fprintf(stderr
, "couldn't setup memory nodes in fdt\n");
956 ret
= spapr_populate_vdevice(spapr
->vio_bus
, fdt
);
958 fprintf(stderr
, "couldn't setup vio devices in fdt\n");
962 if (object_resolve_path_type("", TYPE_SPAPR_RNG
, NULL
)) {
963 ret
= spapr_rng_populate_dt(fdt
);
965 fprintf(stderr
, "could not set up rng device in the fdt\n");
970 QLIST_FOREACH(phb
, &spapr
->phbs
, list
) {
971 ret
= spapr_populate_pci_dt(phb
, PHANDLE_XICP
, fdt
);
973 error_report("couldn't setup PCI devices in fdt");
979 ret
= spapr_rtas_device_tree_setup(fdt
, rtas_addr
, rtas_size
);
981 fprintf(stderr
, "Couldn't set up RTAS device tree properties\n");
985 spapr_populate_cpus_dt_node(fdt
, spapr
);
987 bootlist
= get_boot_devices_list(&cb
, true);
988 if (cb
&& bootlist
) {
989 int offset
= fdt_path_offset(fdt
, "/chosen");
993 for (i
= 0; i
< cb
; i
++) {
994 if (bootlist
[i
] == '\n') {
999 ret
= fdt_setprop_string(fdt
, offset
, "qemu,boot-list", bootlist
);
1002 if (boot_device
&& strlen(boot_device
)) {
1003 int offset
= fdt_path_offset(fdt
, "/chosen");
1008 fdt_setprop_string(fdt
, offset
, "qemu,boot-device", boot_device
);
1011 if (!spapr
->has_graphics
) {
1012 spapr_populate_chosen_stdout(fdt
, spapr
->vio_bus
);
1015 if (smc
->dr_lmb_enabled
) {
1016 _FDT(spapr_drc_populate_dt(fdt
, 0, NULL
, SPAPR_DR_CONNECTOR_TYPE_LMB
));
1019 if (smc
->dr_cpu_enabled
) {
1020 int offset
= fdt_path_offset(fdt
, "/cpus");
1021 ret
= spapr_drc_populate_dt(fdt
, offset
, NULL
,
1022 SPAPR_DR_CONNECTOR_TYPE_CPU
);
1024 error_report("Couldn't set up CPU DR device tree properties");
1029 _FDT((fdt_pack(fdt
)));
1031 if (fdt_totalsize(fdt
) > FDT_MAX_SIZE
) {
1032 error_report("FDT too big ! 0x%x bytes (max is 0x%x)",
1033 fdt_totalsize(fdt
), FDT_MAX_SIZE
);
1037 qemu_fdt_dumpdtb(fdt
, fdt_totalsize(fdt
));
1038 cpu_physical_memory_write(fdt_addr
, fdt
, fdt_totalsize(fdt
));
1044 static uint64_t translate_kernel_address(void *opaque
, uint64_t addr
)
1046 return (addr
& 0x0fffffff) + KERNEL_LOAD_ADDR
;
1049 static void emulate_spapr_hypercall(PowerPCCPU
*cpu
)
1051 CPUPPCState
*env
= &cpu
->env
;
1054 hcall_dprintf("Hypercall made with MSR[PR]=1\n");
1055 env
->gpr
[3] = H_PRIVILEGE
;
1057 env
->gpr
[3] = spapr_hypercall(cpu
, env
->gpr
[3], &env
->gpr
[4]);
1061 #define HPTE(_table, _i) (void *)(((uint64_t *)(_table)) + ((_i) * 2))
1062 #define HPTE_VALID(_hpte) (tswap64(*((uint64_t *)(_hpte))) & HPTE64_V_VALID)
1063 #define HPTE_DIRTY(_hpte) (tswap64(*((uint64_t *)(_hpte))) & HPTE64_V_HPTE_DIRTY)
1064 #define CLEAN_HPTE(_hpte) ((*(uint64_t *)(_hpte)) &= tswap64(~HPTE64_V_HPTE_DIRTY))
1065 #define DIRTY_HPTE(_hpte) ((*(uint64_t *)(_hpte)) |= tswap64(HPTE64_V_HPTE_DIRTY))
1068 * Get the fd to access the kernel htab, re-opening it if necessary
1070 static int get_htab_fd(sPAPRMachineState
*spapr
)
1072 if (spapr
->htab_fd
>= 0) {
1073 return spapr
->htab_fd
;
1076 spapr
->htab_fd
= kvmppc_get_htab_fd(false);
1077 if (spapr
->htab_fd
< 0) {
1078 error_report("Unable to open fd for reading hash table from KVM: %s",
1082 return spapr
->htab_fd
;
1085 static void close_htab_fd(sPAPRMachineState
*spapr
)
1087 if (spapr
->htab_fd
>= 0) {
1088 close(spapr
->htab_fd
);
1090 spapr
->htab_fd
= -1;
1093 static int spapr_hpt_shift_for_ramsize(uint64_t ramsize
)
1097 /* We aim for a hash table of size 1/128 the size of RAM (rounded
1098 * up). The PAPR recommendation is actually 1/64 of RAM size, but
1099 * that's much more than is needed for Linux guests */
1100 shift
= ctz64(pow2ceil(ramsize
)) - 7;
1101 shift
= MAX(shift
, 18); /* Minimum architected size */
1102 shift
= MIN(shift
, 46); /* Maximum architected size */
1106 static void spapr_reallocate_hpt(sPAPRMachineState
*spapr
, int shift
,
1111 /* Clean up any HPT info from a previous boot */
1112 g_free(spapr
->htab
);
1114 spapr
->htab_shift
= 0;
1115 close_htab_fd(spapr
);
1117 rc
= kvmppc_reset_htab(shift
);
1119 /* kernel-side HPT needed, but couldn't allocate one */
1120 error_setg_errno(errp
, errno
,
1121 "Failed to allocate KVM HPT of order %d (try smaller maxmem?)",
1123 /* This is almost certainly fatal, but if the caller really
1124 * wants to carry on with shift == 0, it's welcome to try */
1125 } else if (rc
> 0) {
1126 /* kernel-side HPT allocated */
1129 "Requested order %d HPT, but kernel allocated order %ld (try smaller maxmem?)",
1133 spapr
->htab_shift
= shift
;
1136 /* kernel-side HPT not needed, allocate in userspace instead */
1137 size_t size
= 1ULL << shift
;
1140 spapr
->htab
= qemu_memalign(size
, size
);
1142 error_setg_errno(errp
, errno
,
1143 "Could not allocate HPT of order %d", shift
);
1147 memset(spapr
->htab
, 0, size
);
1148 spapr
->htab_shift
= shift
;
1150 for (i
= 0; i
< size
/ HASH_PTE_SIZE_64
; i
++) {
1151 DIRTY_HPTE(HPTE(spapr
->htab
, i
));
1156 static int find_unknown_sysbus_device(SysBusDevice
*sbdev
, void *opaque
)
1158 bool matched
= false;
1160 if (object_dynamic_cast(OBJECT(sbdev
), TYPE_SPAPR_PCI_HOST_BRIDGE
)) {
1165 error_report("Device %s is not supported by this machine yet.",
1166 qdev_fw_name(DEVICE(sbdev
)));
1173 static void ppc_spapr_reset(void)
1175 MachineState
*machine
= MACHINE(qdev_get_machine());
1176 sPAPRMachineState
*spapr
= SPAPR_MACHINE(machine
);
1177 PowerPCCPU
*first_ppc_cpu
;
1178 uint32_t rtas_limit
;
1180 /* Check for unknown sysbus devices */
1181 foreach_dynamic_sysbus_device(find_unknown_sysbus_device
, NULL
);
1183 /* Allocate and/or reset the hash page table */
1184 spapr_reallocate_hpt(spapr
,
1185 spapr_hpt_shift_for_ramsize(machine
->maxram_size
),
1188 /* Update the RMA size if necessary */
1189 if (spapr
->vrma_adjust
) {
1190 spapr
->rma_size
= kvmppc_rma_size(spapr_node0_size(),
1194 qemu_devices_reset();
1197 * We place the device tree and RTAS just below either the top of the RMA,
1198 * or just below 2GB, whichever is lowere, so that it can be
1199 * processed with 32-bit real mode code if necessary
1201 rtas_limit
= MIN(spapr
->rma_size
, RTAS_MAX_ADDR
);
1202 spapr
->rtas_addr
= rtas_limit
- RTAS_MAX_SIZE
;
1203 spapr
->fdt_addr
= spapr
->rtas_addr
- FDT_MAX_SIZE
;
1206 spapr_finalize_fdt(spapr
, spapr
->fdt_addr
, spapr
->rtas_addr
,
1209 /* Copy RTAS over */
1210 cpu_physical_memory_write(spapr
->rtas_addr
, spapr
->rtas_blob
,
1213 /* Set up the entry state */
1214 first_ppc_cpu
= POWERPC_CPU(first_cpu
);
1215 first_ppc_cpu
->env
.gpr
[3] = spapr
->fdt_addr
;
1216 first_ppc_cpu
->env
.gpr
[5] = 0;
1217 first_cpu
->halted
= 0;
1218 first_ppc_cpu
->env
.nip
= SPAPR_ENTRY_POINT
;
1222 static void spapr_create_nvram(sPAPRMachineState
*spapr
)
1224 DeviceState
*dev
= qdev_create(&spapr
->vio_bus
->bus
, "spapr-nvram");
1225 DriveInfo
*dinfo
= drive_get(IF_PFLASH
, 0, 0);
1228 qdev_prop_set_drive(dev
, "drive", blk_by_legacy_dinfo(dinfo
),
1232 qdev_init_nofail(dev
);
1234 spapr
->nvram
= (struct sPAPRNVRAM
*)dev
;
1237 static void spapr_rtc_create(sPAPRMachineState
*spapr
)
1239 DeviceState
*dev
= qdev_create(NULL
, TYPE_SPAPR_RTC
);
1241 qdev_init_nofail(dev
);
1244 object_property_add_alias(qdev_get_machine(), "rtc-time",
1245 OBJECT(spapr
->rtc
), "date", NULL
);
1248 /* Returns whether we want to use VGA or not */
1249 static bool spapr_vga_init(PCIBus
*pci_bus
, Error
**errp
)
1251 switch (vga_interface_type
) {
1258 return pci_vga_init(pci_bus
) != NULL
;
1261 "Unsupported VGA mode, only -vga std or -vga virtio is supported");
1266 static int spapr_post_load(void *opaque
, int version_id
)
1268 sPAPRMachineState
*spapr
= (sPAPRMachineState
*)opaque
;
1271 /* In earlier versions, there was no separate qdev for the PAPR
1272 * RTC, so the RTC offset was stored directly in sPAPREnvironment.
1273 * So when migrating from those versions, poke the incoming offset
1274 * value into the RTC device */
1275 if (version_id
< 3) {
1276 err
= spapr_rtc_import_offset(spapr
->rtc
, spapr
->rtc_offset
);
1282 static bool version_before_3(void *opaque
, int version_id
)
1284 return version_id
< 3;
1287 static const VMStateDescription vmstate_spapr
= {
1290 .minimum_version_id
= 1,
1291 .post_load
= spapr_post_load
,
1292 .fields
= (VMStateField
[]) {
1293 /* used to be @next_irq */
1294 VMSTATE_UNUSED_BUFFER(version_before_3
, 0, 4),
1297 VMSTATE_UINT64_TEST(rtc_offset
, sPAPRMachineState
, version_before_3
),
1299 VMSTATE_PPC_TIMEBASE_V(tb
, sPAPRMachineState
, 2),
1300 VMSTATE_END_OF_LIST()
1304 static int htab_save_setup(QEMUFile
*f
, void *opaque
)
1306 sPAPRMachineState
*spapr
= opaque
;
1308 /* "Iteration" header */
1309 qemu_put_be32(f
, spapr
->htab_shift
);
1312 spapr
->htab_save_index
= 0;
1313 spapr
->htab_first_pass
= true;
1315 assert(kvm_enabled());
1322 static void htab_save_first_pass(QEMUFile
*f
, sPAPRMachineState
*spapr
,
1325 bool has_timeout
= max_ns
!= -1;
1326 int htabslots
= HTAB_SIZE(spapr
) / HASH_PTE_SIZE_64
;
1327 int index
= spapr
->htab_save_index
;
1328 int64_t starttime
= qemu_clock_get_ns(QEMU_CLOCK_REALTIME
);
1330 assert(spapr
->htab_first_pass
);
1335 /* Consume invalid HPTEs */
1336 while ((index
< htabslots
)
1337 && !HPTE_VALID(HPTE(spapr
->htab
, index
))) {
1339 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
1342 /* Consume valid HPTEs */
1344 while ((index
< htabslots
) && (index
- chunkstart
< USHRT_MAX
)
1345 && HPTE_VALID(HPTE(spapr
->htab
, index
))) {
1347 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
1350 if (index
> chunkstart
) {
1351 int n_valid
= index
- chunkstart
;
1353 qemu_put_be32(f
, chunkstart
);
1354 qemu_put_be16(f
, n_valid
);
1355 qemu_put_be16(f
, 0);
1356 qemu_put_buffer(f
, HPTE(spapr
->htab
, chunkstart
),
1357 HASH_PTE_SIZE_64
* n_valid
);
1360 (qemu_clock_get_ns(QEMU_CLOCK_REALTIME
) - starttime
) > max_ns
) {
1364 } while ((index
< htabslots
) && !qemu_file_rate_limit(f
));
1366 if (index
>= htabslots
) {
1367 assert(index
== htabslots
);
1369 spapr
->htab_first_pass
= false;
1371 spapr
->htab_save_index
= index
;
1374 static int htab_save_later_pass(QEMUFile
*f
, sPAPRMachineState
*spapr
,
1377 bool final
= max_ns
< 0;
1378 int htabslots
= HTAB_SIZE(spapr
) / HASH_PTE_SIZE_64
;
1379 int examined
= 0, sent
= 0;
1380 int index
= spapr
->htab_save_index
;
1381 int64_t starttime
= qemu_clock_get_ns(QEMU_CLOCK_REALTIME
);
1383 assert(!spapr
->htab_first_pass
);
1386 int chunkstart
, invalidstart
;
1388 /* Consume non-dirty HPTEs */
1389 while ((index
< htabslots
)
1390 && !HPTE_DIRTY(HPTE(spapr
->htab
, index
))) {
1396 /* Consume valid dirty HPTEs */
1397 while ((index
< htabslots
) && (index
- chunkstart
< USHRT_MAX
)
1398 && HPTE_DIRTY(HPTE(spapr
->htab
, index
))
1399 && HPTE_VALID(HPTE(spapr
->htab
, index
))) {
1400 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
1405 invalidstart
= index
;
1406 /* Consume invalid dirty HPTEs */
1407 while ((index
< htabslots
) && (index
- invalidstart
< USHRT_MAX
)
1408 && HPTE_DIRTY(HPTE(spapr
->htab
, index
))
1409 && !HPTE_VALID(HPTE(spapr
->htab
, index
))) {
1410 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
1415 if (index
> chunkstart
) {
1416 int n_valid
= invalidstart
- chunkstart
;
1417 int n_invalid
= index
- invalidstart
;
1419 qemu_put_be32(f
, chunkstart
);
1420 qemu_put_be16(f
, n_valid
);
1421 qemu_put_be16(f
, n_invalid
);
1422 qemu_put_buffer(f
, HPTE(spapr
->htab
, chunkstart
),
1423 HASH_PTE_SIZE_64
* n_valid
);
1424 sent
+= index
- chunkstart
;
1426 if (!final
&& (qemu_clock_get_ns(QEMU_CLOCK_REALTIME
) - starttime
) > max_ns
) {
1431 if (examined
>= htabslots
) {
1435 if (index
>= htabslots
) {
1436 assert(index
== htabslots
);
1439 } while ((examined
< htabslots
) && (!qemu_file_rate_limit(f
) || final
));
1441 if (index
>= htabslots
) {
1442 assert(index
== htabslots
);
1446 spapr
->htab_save_index
= index
;
1448 return (examined
>= htabslots
) && (sent
== 0) ? 1 : 0;
1451 #define MAX_ITERATION_NS 5000000 /* 5 ms */
1452 #define MAX_KVM_BUF_SIZE 2048
1454 static int htab_save_iterate(QEMUFile
*f
, void *opaque
)
1456 sPAPRMachineState
*spapr
= opaque
;
1460 /* Iteration header */
1461 qemu_put_be32(f
, 0);
1464 assert(kvm_enabled());
1466 fd
= get_htab_fd(spapr
);
1471 rc
= kvmppc_save_htab(f
, fd
, MAX_KVM_BUF_SIZE
, MAX_ITERATION_NS
);
1475 } else if (spapr
->htab_first_pass
) {
1476 htab_save_first_pass(f
, spapr
, MAX_ITERATION_NS
);
1478 rc
= htab_save_later_pass(f
, spapr
, MAX_ITERATION_NS
);
1482 qemu_put_be32(f
, 0);
1483 qemu_put_be16(f
, 0);
1484 qemu_put_be16(f
, 0);
1489 static int htab_save_complete(QEMUFile
*f
, void *opaque
)
1491 sPAPRMachineState
*spapr
= opaque
;
1494 /* Iteration header */
1495 qemu_put_be32(f
, 0);
1500 assert(kvm_enabled());
1502 fd
= get_htab_fd(spapr
);
1507 rc
= kvmppc_save_htab(f
, fd
, MAX_KVM_BUF_SIZE
, -1);
1511 close_htab_fd(spapr
);
1513 if (spapr
->htab_first_pass
) {
1514 htab_save_first_pass(f
, spapr
, -1);
1516 htab_save_later_pass(f
, spapr
, -1);
1520 qemu_put_be32(f
, 0);
1521 qemu_put_be16(f
, 0);
1522 qemu_put_be16(f
, 0);
1527 static int htab_load(QEMUFile
*f
, void *opaque
, int version_id
)
1529 sPAPRMachineState
*spapr
= opaque
;
1530 uint32_t section_hdr
;
1533 if (version_id
< 1 || version_id
> 1) {
1534 error_report("htab_load() bad version");
1538 section_hdr
= qemu_get_be32(f
);
1541 Error
*local_err
= NULL
;
1543 /* First section gives the htab size */
1544 spapr_reallocate_hpt(spapr
, section_hdr
, &local_err
);
1546 error_report_err(local_err
);
1553 assert(kvm_enabled());
1555 fd
= kvmppc_get_htab_fd(true);
1557 error_report("Unable to open fd to restore KVM hash table: %s",
1564 uint16_t n_valid
, n_invalid
;
1566 index
= qemu_get_be32(f
);
1567 n_valid
= qemu_get_be16(f
);
1568 n_invalid
= qemu_get_be16(f
);
1570 if ((index
== 0) && (n_valid
== 0) && (n_invalid
== 0)) {
1575 if ((index
+ n_valid
+ n_invalid
) >
1576 (HTAB_SIZE(spapr
) / HASH_PTE_SIZE_64
)) {
1577 /* Bad index in stream */
1579 "htab_load() bad index %d (%hd+%hd entries) in htab stream (htab_shift=%d)",
1580 index
, n_valid
, n_invalid
, spapr
->htab_shift
);
1586 qemu_get_buffer(f
, HPTE(spapr
->htab
, index
),
1587 HASH_PTE_SIZE_64
* n_valid
);
1590 memset(HPTE(spapr
->htab
, index
+ n_valid
), 0,
1591 HASH_PTE_SIZE_64
* n_invalid
);
1598 rc
= kvmppc_load_htab_chunk(f
, fd
, index
, n_valid
, n_invalid
);
1613 static SaveVMHandlers savevm_htab_handlers
= {
1614 .save_live_setup
= htab_save_setup
,
1615 .save_live_iterate
= htab_save_iterate
,
1616 .save_live_complete_precopy
= htab_save_complete
,
1617 .load_state
= htab_load
,
1620 static void spapr_boot_set(void *opaque
, const char *boot_device
,
1623 MachineState
*machine
= MACHINE(qdev_get_machine());
1624 machine
->boot_order
= g_strdup(boot_device
);
1628 * Reset routine for LMB DR devices.
1630 * Unlike PCI DR devices, LMB DR devices explicitly register this reset
1631 * routine. Reset for PCI DR devices will be handled by PHB reset routine
1632 * when it walks all its children devices. LMB devices reset occurs
1633 * as part of spapr_ppc_reset().
1635 static void spapr_drc_reset(void *opaque
)
1637 sPAPRDRConnector
*drc
= opaque
;
1638 DeviceState
*d
= DEVICE(drc
);
1645 static void spapr_create_lmb_dr_connectors(sPAPRMachineState
*spapr
)
1647 MachineState
*machine
= MACHINE(spapr
);
1648 uint64_t lmb_size
= SPAPR_MEMORY_BLOCK_SIZE
;
1649 uint32_t nr_lmbs
= (machine
->maxram_size
- machine
->ram_size
)/lmb_size
;
1652 for (i
= 0; i
< nr_lmbs
; i
++) {
1653 sPAPRDRConnector
*drc
;
1656 addr
= i
* lmb_size
+ spapr
->hotplug_memory
.base
;
1657 drc
= spapr_dr_connector_new(OBJECT(spapr
), SPAPR_DR_CONNECTOR_TYPE_LMB
,
1659 qemu_register_reset(spapr_drc_reset
, drc
);
1664 * If RAM size, maxmem size and individual node mem sizes aren't aligned
1665 * to SPAPR_MEMORY_BLOCK_SIZE(256MB), then refuse to start the guest
1666 * since we can't support such unaligned sizes with DRCONF_MEMORY.
1668 static void spapr_validate_node_memory(MachineState
*machine
, Error
**errp
)
1672 if (machine
->ram_size
% SPAPR_MEMORY_BLOCK_SIZE
) {
1673 error_setg(errp
, "Memory size 0x" RAM_ADDR_FMT
1674 " is not aligned to %llu MiB",
1676 SPAPR_MEMORY_BLOCK_SIZE
/ M_BYTE
);
1680 if (machine
->maxram_size
% SPAPR_MEMORY_BLOCK_SIZE
) {
1681 error_setg(errp
, "Maximum memory size 0x" RAM_ADDR_FMT
1682 " is not aligned to %llu MiB",
1684 SPAPR_MEMORY_BLOCK_SIZE
/ M_BYTE
);
1688 for (i
= 0; i
< nb_numa_nodes
; i
++) {
1689 if (numa_info
[i
].node_mem
% SPAPR_MEMORY_BLOCK_SIZE
) {
1691 "Node %d memory size 0x%" PRIx64
1692 " is not aligned to %llu MiB",
1693 i
, numa_info
[i
].node_mem
,
1694 SPAPR_MEMORY_BLOCK_SIZE
/ M_BYTE
);
1700 /* pSeries LPAR / sPAPR hardware init */
1701 static void ppc_spapr_init(MachineState
*machine
)
1703 sPAPRMachineState
*spapr
= SPAPR_MACHINE(machine
);
1704 sPAPRMachineClass
*smc
= SPAPR_MACHINE_GET_CLASS(machine
);
1705 const char *kernel_filename
= machine
->kernel_filename
;
1706 const char *kernel_cmdline
= machine
->kernel_cmdline
;
1707 const char *initrd_filename
= machine
->initrd_filename
;
1710 MemoryRegion
*sysmem
= get_system_memory();
1711 MemoryRegion
*ram
= g_new(MemoryRegion
, 1);
1712 MemoryRegion
*rma_region
;
1714 hwaddr rma_alloc_size
;
1715 hwaddr node0_size
= spapr_node0_size();
1716 uint32_t initrd_base
= 0;
1717 long kernel_size
= 0, initrd_size
= 0;
1718 long load_limit
, fw_size
;
1719 bool kernel_le
= false;
1721 int smt
= kvmppc_smt_threads();
1722 int spapr_cores
= smp_cpus
/ smp_threads
;
1723 int spapr_max_cores
= max_cpus
/ smp_threads
;
1725 if (smc
->dr_cpu_enabled
) {
1726 if (smp_cpus
% smp_threads
) {
1727 error_report("smp_cpus (%u) must be multiple of threads (%u)",
1728 smp_cpus
, smp_threads
);
1731 if (max_cpus
% smp_threads
) {
1732 error_report("max_cpus (%u) must be multiple of threads (%u)",
1733 max_cpus
, smp_threads
);
1738 msi_nonbroken
= true;
1740 QLIST_INIT(&spapr
->phbs
);
1742 cpu_ppc_hypercall
= emulate_spapr_hypercall
;
1744 /* Allocate RMA if necessary */
1745 rma_alloc_size
= kvmppc_alloc_rma(&rma
);
1747 if (rma_alloc_size
== -1) {
1748 error_report("Unable to create RMA");
1752 if (rma_alloc_size
&& (rma_alloc_size
< node0_size
)) {
1753 spapr
->rma_size
= rma_alloc_size
;
1755 spapr
->rma_size
= node0_size
;
1757 /* With KVM, we don't actually know whether KVM supports an
1758 * unbounded RMA (PR KVM) or is limited by the hash table size
1759 * (HV KVM using VRMA), so we always assume the latter
1761 * In that case, we also limit the initial allocations for RTAS
1762 * etc... to 256M since we have no way to know what the VRMA size
1763 * is going to be as it depends on the size of the hash table
1764 * isn't determined yet.
1766 if (kvm_enabled()) {
1767 spapr
->vrma_adjust
= 1;
1768 spapr
->rma_size
= MIN(spapr
->rma_size
, 0x10000000);
1772 if (spapr
->rma_size
> node0_size
) {
1773 error_report("Numa node 0 has to span the RMA (%#08"HWADDR_PRIx
")",
1778 /* Setup a load limit for the ramdisk leaving room for SLOF and FDT */
1779 load_limit
= MIN(spapr
->rma_size
, RTAS_MAX_ADDR
) - FW_OVERHEAD
;
1781 /* Set up Interrupt Controller before we create the VCPUs */
1782 spapr
->icp
= xics_system_init(machine
,
1783 DIV_ROUND_UP(max_cpus
* smt
, smp_threads
),
1784 XICS_IRQS
, &error_fatal
);
1786 if (smc
->dr_lmb_enabled
) {
1787 spapr_validate_node_memory(machine
, &error_fatal
);
1791 if (machine
->cpu_model
== NULL
) {
1792 machine
->cpu_model
= kvm_enabled() ? "host" : "POWER7";
1795 if (smc
->dr_cpu_enabled
) {
1796 char *type
= spapr_get_cpu_core_type(machine
->cpu_model
);
1798 spapr
->cores
= g_new0(Object
*, spapr_max_cores
);
1799 for (i
= 0; i
< spapr_max_cores
; i
++) {
1800 int core_dt_id
= i
* smt
;
1801 sPAPRDRConnector
*drc
=
1802 spapr_dr_connector_new(OBJECT(spapr
),
1803 SPAPR_DR_CONNECTOR_TYPE_CPU
, core_dt_id
);
1805 qemu_register_reset(spapr_drc_reset
, drc
);
1807 if (i
< spapr_cores
) {
1808 char *type
= spapr_get_cpu_core_type(machine
->cpu_model
);
1811 if (!object_class_by_name(type
)) {
1812 error_report("Unable to find sPAPR CPU Core definition");
1816 core
= object_new(type
);
1817 object_property_set_int(core
, smp_threads
, "nr-threads",
1819 object_property_set_int(core
, core_dt_id
, CPU_CORE_PROP_CORE_ID
,
1821 object_property_set_bool(core
, true, "realized", &error_fatal
);
1826 for (i
= 0; i
< smp_cpus
; i
++) {
1827 PowerPCCPU
*cpu
= cpu_ppc_init(machine
->cpu_model
);
1829 error_report("Unable to find PowerPC CPU definition");
1832 spapr_cpu_init(spapr
, cpu
, &error_fatal
);
1836 if (kvm_enabled()) {
1837 /* Enable H_LOGICAL_CI_* so SLOF can talk to in-kernel devices */
1838 kvmppc_enable_logical_ci_hcalls();
1839 kvmppc_enable_set_mode_hcall();
1843 memory_region_allocate_system_memory(ram
, NULL
, "ppc_spapr.ram",
1845 memory_region_add_subregion(sysmem
, 0, ram
);
1847 if (rma_alloc_size
&& rma
) {
1848 rma_region
= g_new(MemoryRegion
, 1);
1849 memory_region_init_ram_ptr(rma_region
, NULL
, "ppc_spapr.rma",
1850 rma_alloc_size
, rma
);
1851 vmstate_register_ram_global(rma_region
);
1852 memory_region_add_subregion(sysmem
, 0, rma_region
);
1855 /* initialize hotplug memory address space */
1856 if (machine
->ram_size
< machine
->maxram_size
) {
1857 ram_addr_t hotplug_mem_size
= machine
->maxram_size
- machine
->ram_size
;
1859 * Limit the number of hotpluggable memory slots to half the number
1860 * slots that KVM supports, leaving the other half for PCI and other
1861 * devices. However ensure that number of slots doesn't drop below 32.
1863 int max_memslots
= kvm_enabled() ? kvm_get_max_memslots() / 2 :
1864 SPAPR_MAX_RAM_SLOTS
;
1866 if (max_memslots
< SPAPR_MAX_RAM_SLOTS
) {
1867 max_memslots
= SPAPR_MAX_RAM_SLOTS
;
1869 if (machine
->ram_slots
> max_memslots
) {
1870 error_report("Specified number of memory slots %"
1871 PRIu64
" exceeds max supported %d",
1872 machine
->ram_slots
, max_memslots
);
1876 spapr
->hotplug_memory
.base
= ROUND_UP(machine
->ram_size
,
1877 SPAPR_HOTPLUG_MEM_ALIGN
);
1878 memory_region_init(&spapr
->hotplug_memory
.mr
, OBJECT(spapr
),
1879 "hotplug-memory", hotplug_mem_size
);
1880 memory_region_add_subregion(sysmem
, spapr
->hotplug_memory
.base
,
1881 &spapr
->hotplug_memory
.mr
);
1884 if (smc
->dr_lmb_enabled
) {
1885 spapr_create_lmb_dr_connectors(spapr
);
1888 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, "spapr-rtas.bin");
1890 error_report("Could not find LPAR rtas '%s'", "spapr-rtas.bin");
1893 spapr
->rtas_size
= get_image_size(filename
);
1894 if (spapr
->rtas_size
< 0) {
1895 error_report("Could not get size of LPAR rtas '%s'", filename
);
1898 spapr
->rtas_blob
= g_malloc(spapr
->rtas_size
);
1899 if (load_image_size(filename
, spapr
->rtas_blob
, spapr
->rtas_size
) < 0) {
1900 error_report("Could not load LPAR rtas '%s'", filename
);
1903 if (spapr
->rtas_size
> RTAS_MAX_SIZE
) {
1904 error_report("RTAS too big ! 0x%zx bytes (max is 0x%x)",
1905 (size_t)spapr
->rtas_size
, RTAS_MAX_SIZE
);
1910 /* Set up EPOW events infrastructure */
1911 spapr_events_init(spapr
);
1913 /* Set up the RTC RTAS interfaces */
1914 spapr_rtc_create(spapr
);
1916 /* Set up VIO bus */
1917 spapr
->vio_bus
= spapr_vio_bus_init();
1919 for (i
= 0; i
< MAX_SERIAL_PORTS
; i
++) {
1920 if (serial_hds
[i
]) {
1921 spapr_vty_create(spapr
->vio_bus
, serial_hds
[i
]);
1925 /* We always have at least the nvram device on VIO */
1926 spapr_create_nvram(spapr
);
1929 spapr_pci_rtas_init();
1931 phb
= spapr_create_phb(spapr
, 0);
1933 for (i
= 0; i
< nb_nics
; i
++) {
1934 NICInfo
*nd
= &nd_table
[i
];
1937 nd
->model
= g_strdup("ibmveth");
1940 if (strcmp(nd
->model
, "ibmveth") == 0) {
1941 spapr_vlan_create(spapr
->vio_bus
, nd
);
1943 pci_nic_init_nofail(&nd_table
[i
], phb
->bus
, nd
->model
, NULL
);
1947 for (i
= 0; i
<= drive_get_max_bus(IF_SCSI
); i
++) {
1948 spapr_vscsi_create(spapr
->vio_bus
);
1952 if (spapr_vga_init(phb
->bus
, &error_fatal
)) {
1953 spapr
->has_graphics
= true;
1954 machine
->usb
|= defaults_enabled() && !machine
->usb_disabled
;
1958 if (smc
->use_ohci_by_default
) {
1959 pci_create_simple(phb
->bus
, -1, "pci-ohci");
1961 pci_create_simple(phb
->bus
, -1, "nec-usb-xhci");
1964 if (spapr
->has_graphics
) {
1965 USBBus
*usb_bus
= usb_bus_find(-1);
1967 usb_create_simple(usb_bus
, "usb-kbd");
1968 usb_create_simple(usb_bus
, "usb-mouse");
1972 if (spapr
->rma_size
< (MIN_RMA_SLOF
<< 20)) {
1974 "pSeries SLOF firmware requires >= %ldM guest RMA (Real Mode Area memory)",
1979 if (kernel_filename
) {
1980 uint64_t lowaddr
= 0;
1982 kernel_size
= load_elf(kernel_filename
, translate_kernel_address
, NULL
,
1983 NULL
, &lowaddr
, NULL
, 1, PPC_ELF_MACHINE
,
1985 if (kernel_size
== ELF_LOAD_WRONG_ENDIAN
) {
1986 kernel_size
= load_elf(kernel_filename
,
1987 translate_kernel_address
, NULL
,
1988 NULL
, &lowaddr
, NULL
, 0, PPC_ELF_MACHINE
,
1990 kernel_le
= kernel_size
> 0;
1992 if (kernel_size
< 0) {
1993 error_report("error loading %s: %s",
1994 kernel_filename
, load_elf_strerror(kernel_size
));
1999 if (initrd_filename
) {
2000 /* Try to locate the initrd in the gap between the kernel
2001 * and the firmware. Add a bit of space just in case
2003 initrd_base
= (KERNEL_LOAD_ADDR
+ kernel_size
+ 0x1ffff) & ~0xffff;
2004 initrd_size
= load_image_targphys(initrd_filename
, initrd_base
,
2005 load_limit
- initrd_base
);
2006 if (initrd_size
< 0) {
2007 error_report("could not load initial ram disk '%s'",
2017 if (bios_name
== NULL
) {
2018 bios_name
= FW_FILE_NAME
;
2020 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, bios_name
);
2022 error_report("Could not find LPAR firmware '%s'", bios_name
);
2025 fw_size
= load_image_targphys(filename
, 0, FW_MAX_SIZE
);
2027 error_report("Could not load LPAR firmware '%s'", filename
);
2032 /* FIXME: Should register things through the MachineState's qdev
2033 * interface, this is a legacy from the sPAPREnvironment structure
2034 * which predated MachineState but had a similar function */
2035 vmstate_register(NULL
, 0, &vmstate_spapr
, spapr
);
2036 register_savevm_live(NULL
, "spapr/htab", -1, 1,
2037 &savevm_htab_handlers
, spapr
);
2039 /* Prepare the device tree */
2040 spapr
->fdt_skel
= spapr_create_fdt_skel(initrd_base
, initrd_size
,
2041 kernel_size
, kernel_le
,
2043 spapr
->check_exception_irq
);
2044 assert(spapr
->fdt_skel
!= NULL
);
2047 QTAILQ_INIT(&spapr
->ccs_list
);
2048 qemu_register_reset(spapr_ccs_reset_hook
, spapr
);
2050 qemu_register_boot_set(spapr_boot_set
, spapr
);
2053 static int spapr_kvm_type(const char *vm_type
)
2059 if (!strcmp(vm_type
, "HV")) {
2063 if (!strcmp(vm_type
, "PR")) {
2067 error_report("Unknown kvm-type specified '%s'", vm_type
);
2072 * Implementation of an interface to adjust firmware path
2073 * for the bootindex property handling.
2075 static char *spapr_get_fw_dev_path(FWPathProvider
*p
, BusState
*bus
,
2078 #define CAST(type, obj, name) \
2079 ((type *)object_dynamic_cast(OBJECT(obj), (name)))
2080 SCSIDevice
*d
= CAST(SCSIDevice
, dev
, TYPE_SCSI_DEVICE
);
2081 sPAPRPHBState
*phb
= CAST(sPAPRPHBState
, dev
, TYPE_SPAPR_PCI_HOST_BRIDGE
);
2084 void *spapr
= CAST(void, bus
->parent
, "spapr-vscsi");
2085 VirtIOSCSI
*virtio
= CAST(VirtIOSCSI
, bus
->parent
, TYPE_VIRTIO_SCSI
);
2086 USBDevice
*usb
= CAST(USBDevice
, bus
->parent
, TYPE_USB_DEVICE
);
2090 * Replace "channel@0/disk@0,0" with "disk@8000000000000000":
2091 * We use SRP luns of the form 8000 | (bus << 8) | (id << 5) | lun
2092 * in the top 16 bits of the 64-bit LUN
2094 unsigned id
= 0x8000 | (d
->id
<< 8) | d
->lun
;
2095 return g_strdup_printf("%s@%"PRIX64
, qdev_fw_name(dev
),
2096 (uint64_t)id
<< 48);
2097 } else if (virtio
) {
2099 * We use SRP luns of the form 01000000 | (target << 8) | lun
2100 * in the top 32 bits of the 64-bit LUN
2101 * Note: the quote above is from SLOF and it is wrong,
2102 * the actual binding is:
2103 * swap 0100 or 10 << or 20 << ( target lun-id -- srplun )
2105 unsigned id
= 0x1000000 | (d
->id
<< 16) | d
->lun
;
2106 return g_strdup_printf("%s@%"PRIX64
, qdev_fw_name(dev
),
2107 (uint64_t)id
<< 32);
2110 * We use SRP luns of the form 01000000 | (usb-port << 16) | lun
2111 * in the top 32 bits of the 64-bit LUN
2113 unsigned usb_port
= atoi(usb
->port
->path
);
2114 unsigned id
= 0x1000000 | (usb_port
<< 16) | d
->lun
;
2115 return g_strdup_printf("%s@%"PRIX64
, qdev_fw_name(dev
),
2116 (uint64_t)id
<< 32);
2121 /* Replace "pci" with "pci@800000020000000" */
2122 return g_strdup_printf("pci@%"PRIX64
, phb
->buid
);
2128 static char *spapr_get_kvm_type(Object
*obj
, Error
**errp
)
2130 sPAPRMachineState
*spapr
= SPAPR_MACHINE(obj
);
2132 return g_strdup(spapr
->kvm_type
);
2135 static void spapr_set_kvm_type(Object
*obj
, const char *value
, Error
**errp
)
2137 sPAPRMachineState
*spapr
= SPAPR_MACHINE(obj
);
2139 g_free(spapr
->kvm_type
);
2140 spapr
->kvm_type
= g_strdup(value
);
2143 static void spapr_machine_initfn(Object
*obj
)
2145 sPAPRMachineState
*spapr
= SPAPR_MACHINE(obj
);
2147 spapr
->htab_fd
= -1;
2148 object_property_add_str(obj
, "kvm-type",
2149 spapr_get_kvm_type
, spapr_set_kvm_type
, NULL
);
2150 object_property_set_description(obj
, "kvm-type",
2151 "Specifies the KVM virtualization mode (HV, PR)",
2155 static void spapr_machine_finalizefn(Object
*obj
)
2157 sPAPRMachineState
*spapr
= SPAPR_MACHINE(obj
);
2159 g_free(spapr
->kvm_type
);
2162 static void ppc_cpu_do_nmi_on_cpu(void *arg
)
2166 cpu_synchronize_state(cs
);
2167 ppc_cpu_do_system_reset(cs
);
2170 static void spapr_nmi(NMIState
*n
, int cpu_index
, Error
**errp
)
2175 async_run_on_cpu(cs
, ppc_cpu_do_nmi_on_cpu
, cs
);
2179 static void spapr_add_lmbs(DeviceState
*dev
, uint64_t addr
, uint64_t size
,
2180 uint32_t node
, Error
**errp
)
2182 sPAPRDRConnector
*drc
;
2183 sPAPRDRConnectorClass
*drck
;
2184 uint32_t nr_lmbs
= size
/SPAPR_MEMORY_BLOCK_SIZE
;
2185 int i
, fdt_offset
, fdt_size
;
2188 for (i
= 0; i
< nr_lmbs
; i
++) {
2189 drc
= spapr_dr_connector_by_id(SPAPR_DR_CONNECTOR_TYPE_LMB
,
2190 addr
/SPAPR_MEMORY_BLOCK_SIZE
);
2193 fdt
= create_device_tree(&fdt_size
);
2194 fdt_offset
= spapr_populate_memory_node(fdt
, node
, addr
,
2195 SPAPR_MEMORY_BLOCK_SIZE
);
2197 drck
= SPAPR_DR_CONNECTOR_GET_CLASS(drc
);
2198 drck
->attach(drc
, dev
, fdt
, fdt_offset
, !dev
->hotplugged
, errp
);
2199 addr
+= SPAPR_MEMORY_BLOCK_SIZE
;
2201 /* send hotplug notification to the
2202 * guest only in case of hotplugged memory
2204 if (dev
->hotplugged
) {
2205 spapr_hotplug_req_add_by_count(SPAPR_DR_CONNECTOR_TYPE_LMB
, nr_lmbs
);
2209 static void spapr_memory_plug(HotplugHandler
*hotplug_dev
, DeviceState
*dev
,
2210 uint32_t node
, Error
**errp
)
2212 Error
*local_err
= NULL
;
2213 sPAPRMachineState
*ms
= SPAPR_MACHINE(hotplug_dev
);
2214 PCDIMMDevice
*dimm
= PC_DIMM(dev
);
2215 PCDIMMDeviceClass
*ddc
= PC_DIMM_GET_CLASS(dimm
);
2216 MemoryRegion
*mr
= ddc
->get_memory_region(dimm
);
2217 uint64_t align
= memory_region_get_alignment(mr
);
2218 uint64_t size
= memory_region_size(mr
);
2221 if (size
% SPAPR_MEMORY_BLOCK_SIZE
) {
2222 error_setg(&local_err
, "Hotplugged memory size must be a multiple of "
2223 "%lld MB", SPAPR_MEMORY_BLOCK_SIZE
/M_BYTE
);
2227 pc_dimm_memory_plug(dev
, &ms
->hotplug_memory
, mr
, align
, &local_err
);
2232 addr
= object_property_get_int(OBJECT(dimm
), PC_DIMM_ADDR_PROP
, &local_err
);
2234 pc_dimm_memory_unplug(dev
, &ms
->hotplug_memory
, mr
);
2238 spapr_add_lmbs(dev
, addr
, size
, node
, &error_abort
);
2241 error_propagate(errp
, local_err
);
2244 void *spapr_populate_hotplug_cpu_dt(CPUState
*cs
, int *fdt_offset
,
2245 sPAPRMachineState
*spapr
)
2247 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
2248 DeviceClass
*dc
= DEVICE_GET_CLASS(cs
);
2249 int id
= ppc_get_vcpu_dt_id(cpu
);
2251 int offset
, fdt_size
;
2254 fdt
= create_device_tree(&fdt_size
);
2255 nodename
= g_strdup_printf("%s@%x", dc
->fw_name
, id
);
2256 offset
= fdt_add_subnode(fdt
, 0, nodename
);
2258 spapr_populate_cpu_dt(cs
, fdt
, offset
, spapr
);
2261 *fdt_offset
= offset
;
2265 static void spapr_machine_device_plug(HotplugHandler
*hotplug_dev
,
2266 DeviceState
*dev
, Error
**errp
)
2268 sPAPRMachineClass
*smc
= SPAPR_MACHINE_GET_CLASS(qdev_get_machine());
2270 if (object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
)) {
2273 if (!smc
->dr_lmb_enabled
) {
2274 error_setg(errp
, "Memory hotplug not supported for this machine");
2277 node
= object_property_get_int(OBJECT(dev
), PC_DIMM_NODE_PROP
, errp
);
2281 if (node
< 0 || node
>= MAX_NODES
) {
2282 error_setg(errp
, "Invaild node %d", node
);
2287 * Currently PowerPC kernel doesn't allow hot-adding memory to
2288 * memory-less node, but instead will silently add the memory
2289 * to the first node that has some memory. This causes two
2290 * unexpected behaviours for the user.
2292 * - Memory gets hotplugged to a different node than what the user
2294 * - Since pc-dimm subsystem in QEMU still thinks that memory belongs
2295 * to memory-less node, a reboot will set things accordingly
2296 * and the previously hotplugged memory now ends in the right node.
2297 * This appears as if some memory moved from one node to another.
2299 * So until kernel starts supporting memory hotplug to memory-less
2300 * nodes, just prevent such attempts upfront in QEMU.
2302 if (nb_numa_nodes
&& !numa_info
[node
].node_mem
) {
2303 error_setg(errp
, "Can't hotplug memory to memory-less node %d",
2308 spapr_memory_plug(hotplug_dev
, dev
, node
, errp
);
2309 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_SPAPR_CPU_CORE
)) {
2310 spapr_core_plug(hotplug_dev
, dev
, errp
);
2314 static void spapr_machine_device_unplug(HotplugHandler
*hotplug_dev
,
2315 DeviceState
*dev
, Error
**errp
)
2317 sPAPRMachineClass
*smc
= SPAPR_MACHINE_GET_CLASS(qdev_get_machine());
2319 if (object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
)) {
2320 error_setg(errp
, "Memory hot unplug not supported by sPAPR");
2321 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_SPAPR_CPU_CORE
)) {
2322 if (!smc
->dr_cpu_enabled
) {
2323 error_setg(errp
, "CPU hot unplug not supported on this machine");
2326 spapr_core_unplug(hotplug_dev
, dev
, errp
);
2330 static void spapr_machine_device_pre_plug(HotplugHandler
*hotplug_dev
,
2331 DeviceState
*dev
, Error
**errp
)
2333 if (object_dynamic_cast(OBJECT(dev
), TYPE_SPAPR_CPU_CORE
)) {
2334 spapr_core_pre_plug(hotplug_dev
, dev
, errp
);
2338 static HotplugHandler
*spapr_get_hotpug_handler(MachineState
*machine
,
2341 if (object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
) ||
2342 object_dynamic_cast(OBJECT(dev
), TYPE_SPAPR_CPU_CORE
)) {
2343 return HOTPLUG_HANDLER(machine
);
2348 static unsigned spapr_cpu_index_to_socket_id(unsigned cpu_index
)
2350 /* Allocate to NUMA nodes on a "socket" basis (not that concept of
2351 * socket means much for the paravirtualized PAPR platform) */
2352 return cpu_index
/ smp_threads
/ smp_cores
;
2355 static HotpluggableCPUList
*spapr_query_hotpluggable_cpus(MachineState
*machine
)
2358 HotpluggableCPUList
*head
= NULL
;
2359 sPAPRMachineState
*spapr
= SPAPR_MACHINE(machine
);
2360 int spapr_max_cores
= max_cpus
/ smp_threads
;
2361 int smt
= kvmppc_smt_threads();
2363 for (i
= 0; i
< spapr_max_cores
; i
++) {
2364 HotpluggableCPUList
*list_item
= g_new0(typeof(*list_item
), 1);
2365 HotpluggableCPU
*cpu_item
= g_new0(typeof(*cpu_item
), 1);
2366 CpuInstanceProperties
*cpu_props
= g_new0(typeof(*cpu_props
), 1);
2368 cpu_item
->type
= spapr_get_cpu_core_type(machine
->cpu_model
);
2369 cpu_item
->vcpus_count
= smp_threads
;
2370 cpu_props
->has_core
= true;
2371 cpu_props
->core
= i
* smt
;
2372 /* TODO: add 'has_node/node' here to describe
2373 to which node core belongs */
2375 cpu_item
->props
= cpu_props
;
2376 if (spapr
->cores
[i
]) {
2377 cpu_item
->has_qom_path
= true;
2378 cpu_item
->qom_path
= object_get_canonical_path(spapr
->cores
[i
]);
2380 list_item
->value
= cpu_item
;
2381 list_item
->next
= head
;
2387 static void spapr_machine_class_init(ObjectClass
*oc
, void *data
)
2389 MachineClass
*mc
= MACHINE_CLASS(oc
);
2390 sPAPRMachineClass
*smc
= SPAPR_MACHINE_CLASS(oc
);
2391 FWPathProviderClass
*fwc
= FW_PATH_PROVIDER_CLASS(oc
);
2392 NMIClass
*nc
= NMI_CLASS(oc
);
2393 HotplugHandlerClass
*hc
= HOTPLUG_HANDLER_CLASS(oc
);
2395 mc
->desc
= "pSeries Logical Partition (PAPR compliant)";
2398 * We set up the default / latest behaviour here. The class_init
2399 * functions for the specific versioned machine types can override
2400 * these details for backwards compatibility
2402 mc
->init
= ppc_spapr_init
;
2403 mc
->reset
= ppc_spapr_reset
;
2404 mc
->block_default_type
= IF_SCSI
;
2405 mc
->max_cpus
= MAX_CPUMASK_BITS
;
2406 mc
->no_parallel
= 1;
2407 mc
->default_boot_order
= "";
2408 mc
->default_ram_size
= 512 * M_BYTE
;
2409 mc
->kvm_type
= spapr_kvm_type
;
2410 mc
->has_dynamic_sysbus
= true;
2411 mc
->pci_allow_0_address
= true;
2412 mc
->get_hotplug_handler
= spapr_get_hotpug_handler
;
2413 hc
->pre_plug
= spapr_machine_device_pre_plug
;
2414 hc
->plug
= spapr_machine_device_plug
;
2415 hc
->unplug
= spapr_machine_device_unplug
;
2416 mc
->cpu_index_to_socket_id
= spapr_cpu_index_to_socket_id
;
2417 mc
->query_hotpluggable_cpus
= spapr_query_hotpluggable_cpus
;
2419 smc
->dr_lmb_enabled
= true;
2420 smc
->dr_cpu_enabled
= true;
2421 fwc
->get_dev_path
= spapr_get_fw_dev_path
;
2422 nc
->nmi_monitor_handler
= spapr_nmi
;
2425 static const TypeInfo spapr_machine_info
= {
2426 .name
= TYPE_SPAPR_MACHINE
,
2427 .parent
= TYPE_MACHINE
,
2429 .instance_size
= sizeof(sPAPRMachineState
),
2430 .instance_init
= spapr_machine_initfn
,
2431 .instance_finalize
= spapr_machine_finalizefn
,
2432 .class_size
= sizeof(sPAPRMachineClass
),
2433 .class_init
= spapr_machine_class_init
,
2434 .interfaces
= (InterfaceInfo
[]) {
2435 { TYPE_FW_PATH_PROVIDER
},
2437 { TYPE_HOTPLUG_HANDLER
},
2442 #define DEFINE_SPAPR_MACHINE(suffix, verstr, latest) \
2443 static void spapr_machine_##suffix##_class_init(ObjectClass *oc, \
2446 MachineClass *mc = MACHINE_CLASS(oc); \
2447 spapr_machine_##suffix##_class_options(mc); \
2449 mc->alias = "pseries"; \
2450 mc->is_default = 1; \
2453 static void spapr_machine_##suffix##_instance_init(Object *obj) \
2455 MachineState *machine = MACHINE(obj); \
2456 spapr_machine_##suffix##_instance_options(machine); \
2458 static const TypeInfo spapr_machine_##suffix##_info = { \
2459 .name = MACHINE_TYPE_NAME("pseries-" verstr), \
2460 .parent = TYPE_SPAPR_MACHINE, \
2461 .class_init = spapr_machine_##suffix##_class_init, \
2462 .instance_init = spapr_machine_##suffix##_instance_init, \
2464 static void spapr_machine_register_##suffix(void) \
2466 type_register(&spapr_machine_##suffix##_info); \
2468 type_init(spapr_machine_register_##suffix)
2473 static void spapr_machine_2_7_instance_options(MachineState
*machine
)
2477 static void spapr_machine_2_7_class_options(MachineClass
*mc
)
2479 /* Defaults for the latest behaviour inherited from the base class */
2482 DEFINE_SPAPR_MACHINE(2_7
, "2.7", true);
2487 #define SPAPR_COMPAT_2_6 \
2490 static void spapr_machine_2_6_instance_options(MachineState
*machine
)
2494 static void spapr_machine_2_6_class_options(MachineClass
*mc
)
2496 sPAPRMachineClass
*smc
= SPAPR_MACHINE_CLASS(mc
);
2498 spapr_machine_2_7_class_options(mc
);
2499 smc
->dr_cpu_enabled
= false;
2500 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_6
);
2503 DEFINE_SPAPR_MACHINE(2_6
, "2.6", false);
2508 #define SPAPR_COMPAT_2_5 \
2511 .driver = "spapr-vlan", \
2512 .property = "use-rx-buffer-pools", \
2516 static void spapr_machine_2_5_instance_options(MachineState
*machine
)
2520 static void spapr_machine_2_5_class_options(MachineClass
*mc
)
2522 sPAPRMachineClass
*smc
= SPAPR_MACHINE_CLASS(mc
);
2524 spapr_machine_2_6_class_options(mc
);
2525 smc
->use_ohci_by_default
= true;
2526 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_5
);
2529 DEFINE_SPAPR_MACHINE(2_5
, "2.5", false);
2534 #define SPAPR_COMPAT_2_4 \
2537 static void spapr_machine_2_4_instance_options(MachineState
*machine
)
2539 spapr_machine_2_5_instance_options(machine
);
2542 static void spapr_machine_2_4_class_options(MachineClass
*mc
)
2544 sPAPRMachineClass
*smc
= SPAPR_MACHINE_CLASS(mc
);
2546 spapr_machine_2_5_class_options(mc
);
2547 smc
->dr_lmb_enabled
= false;
2548 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_4
);
2551 DEFINE_SPAPR_MACHINE(2_4
, "2.4", false);
2556 #define SPAPR_COMPAT_2_3 \
2559 .driver = "spapr-pci-host-bridge",\
2560 .property = "dynamic-reconfiguration",\
2564 static void spapr_machine_2_3_instance_options(MachineState
*machine
)
2566 spapr_machine_2_4_instance_options(machine
);
2567 savevm_skip_section_footers();
2568 global_state_set_optional();
2569 savevm_skip_configuration();
2572 static void spapr_machine_2_3_class_options(MachineClass
*mc
)
2574 spapr_machine_2_4_class_options(mc
);
2575 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_3
);
2577 DEFINE_SPAPR_MACHINE(2_3
, "2.3", false);
2583 #define SPAPR_COMPAT_2_2 \
2586 .driver = TYPE_SPAPR_PCI_HOST_BRIDGE,\
2587 .property = "mem_win_size",\
2588 .value = "0x20000000",\
2591 static void spapr_machine_2_2_instance_options(MachineState
*machine
)
2593 spapr_machine_2_3_instance_options(machine
);
2594 machine
->suppress_vmdesc
= true;
2597 static void spapr_machine_2_2_class_options(MachineClass
*mc
)
2599 spapr_machine_2_3_class_options(mc
);
2600 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_2
);
2602 DEFINE_SPAPR_MACHINE(2_2
, "2.2", false);
2607 #define SPAPR_COMPAT_2_1 \
2610 static void spapr_machine_2_1_instance_options(MachineState
*machine
)
2612 spapr_machine_2_2_instance_options(machine
);
2615 static void spapr_machine_2_1_class_options(MachineClass
*mc
)
2617 spapr_machine_2_2_class_options(mc
);
2618 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_1
);
2620 DEFINE_SPAPR_MACHINE(2_1
, "2.1", false);
2622 static void spapr_machine_register_types(void)
2624 type_register_static(&spapr_machine_info
);
2627 type_init(spapr_machine_register_types
)