docs/devel/testing.rst: add missing newlines after code block
[qemu/ar7.git] / include / hw / ssi / pl022.h
bloba080519366d3006f95afc6ceb01ea7522dfef579
1 /*
2 * ARM PrimeCell PL022 Synchronous Serial Port
4 * Copyright (c) 2007 CodeSourcery.
5 * Written by Paul Brook
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 or
9 * (at your option) any later version.
12 /* This is a model of the Arm PrimeCell PL022 synchronous serial port.
13 * The PL022 TRM is:
14 * http://infocenter.arm.com/help/topic/com.arm.doc.ddi0194h/DDI0194H_ssp_pl022_trm.pdf
16 * QEMU interface:
17 * + sysbus IRQ: SSPINTR combined interrupt line
18 * + sysbus MMIO region 0: MemoryRegion for the device's registers
21 #ifndef HW_SSI_PL022_H
22 #define HW_SSI_PL022_H
24 #include "hw/sysbus.h"
26 #define TYPE_PL022 "pl022"
27 #define PL022(obj) OBJECT_CHECK(PL022State, (obj), TYPE_PL022)
29 typedef struct PL022State {
30 SysBusDevice parent_obj;
32 MemoryRegion iomem;
33 uint32_t cr0;
34 uint32_t cr1;
35 uint32_t bitmask;
36 uint32_t sr;
37 uint32_t cpsr;
38 uint32_t is;
39 uint32_t im;
40 /* The FIFO head points to the next empty entry. */
41 int tx_fifo_head;
42 int rx_fifo_head;
43 int tx_fifo_len;
44 int rx_fifo_len;
45 uint16_t tx_fifo[8];
46 uint16_t rx_fifo[8];
47 qemu_irq irq;
48 SSIBus *ssi;
49 } PL022State;
51 #endif