include/hw/ppc/pnv_lpc.h

   1 /*
   2  * QEMU PowerPC PowerNV LPC controller
   3  *
   4  * Copyright (c) 2016, IBM Corporation.
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2.1 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #ifndef PPC_PNV_LPC_H
  21 #define PPC_PNV_LPC_H
  22
  23 #include "hw/ppc/pnv_psi.h"
  24 #include "qom/object.h"
  25
  26 #define TYPE_PNV_LPC "pnv-lpc"
  27 typedef struct PnvLpcClass PnvLpcClass;
  28 typedef struct PnvLpcController PnvLpcController;
  29 DECLARE_OBJ_CHECKERS(PnvLpcController, PnvLpcClass,
  30                      PNV_LPC, TYPE_PNV_LPC)
  31 #define TYPE_PNV8_LPC TYPE_PNV_LPC "-POWER8"
  32 DECLARE_INSTANCE_CHECKER(PnvLpcController, PNV8_LPC,
  33                          TYPE_PNV8_LPC)
  34
  35 #define TYPE_PNV9_LPC TYPE_PNV_LPC "-POWER9"
  36 DECLARE_INSTANCE_CHECKER(PnvLpcController, PNV9_LPC,
  37                          TYPE_PNV9_LPC)
  38
  39 #define TYPE_PNV10_LPC TYPE_PNV_LPC "-POWER10"
  40 DECLARE_INSTANCE_CHECKER(PnvLpcController, PNV10_LPC,
  41                          TYPE_PNV10_LPC)
  42
  43 struct PnvLpcController {
  44     DeviceState parent;
  45
  46     uint64_t eccb_stat_reg;
  47     uint32_t eccb_data_reg;
  48
  49     /* OPB bus */
  50     MemoryRegion opb_mr;
  51     AddressSpace opb_as;
  52
  53     /* ISA IO and Memory space */
  54     MemoryRegion isa_io;
  55     MemoryRegion isa_mem;
  56     MemoryRegion isa_fw;
  57
  58     /* Windows from OPB to ISA (aliases) */
  59     MemoryRegion opb_isa_io;
  60     MemoryRegion opb_isa_mem;
  61     MemoryRegion opb_isa_fw;
  62
  63     /* Registers */
  64     MemoryRegion lpc_hc_regs;
  65     MemoryRegion opb_master_regs;
  66
  67     /* OPB Master LS registers */
  68     uint32_t opb_irq_route0;
  69     uint32_t opb_irq_route1;
  70     uint32_t opb_irq_stat;
  71     uint32_t opb_irq_mask;
  72     uint32_t opb_irq_pol;
  73     uint32_t opb_irq_input;
  74
  75     /* LPC HC registers */
  76     uint32_t lpc_hc_fw_seg_idsel;
  77     uint32_t lpc_hc_fw_rd_acc_size;
  78     uint32_t lpc_hc_irqser_ctrl;
  79     uint32_t lpc_hc_irqmask;
  80     uint32_t lpc_hc_irqstat;
  81     uint32_t lpc_hc_error_addr;
  82
  83     /* XSCOM registers */
  84     MemoryRegion xscom_regs;
  85
  86     /* PSI to generate interrupts */
  87     PnvPsi *psi;
  88 };
  89
  90
  91 struct PnvLpcClass {
  92     DeviceClass parent_class;
  93
  94     int psi_irq;
  95
  96     DeviceRealize parent_realize;
  97 };
  98
  99 /*
 100  * Old compilers error on typdef forward declarations. Keep them happy.
 101  */
 102 struct PnvChip;
 103
 104 ISABus *pnv_lpc_isa_create(PnvLpcController *lpc, bool use_cpld, Error **errp);
 105 int pnv_dt_lpc(struct PnvChip *chip, void *fdt, int root_offset,
 106                uint64_t lpcm_addr, uint64_t lpcm_size);
 107
 108 #endif /* PPC_PNV_LPC_H */