qapi/qom: QAPIfy object-add
[qemu/ar7.git] / target / arm / kvm.c
blobd8381ba224544f190029ba8eb36c4a7a2a950056
1 /*
2 * ARM implementation of KVM hooks
4 * Copyright Christoffer Dall 2009-2010
6 * This work is licensed under the terms of the GNU GPL, version 2 or later.
7 * See the COPYING file in the top-level directory.
9 */
11 #include "qemu/osdep.h"
12 #include <sys/ioctl.h>
14 #include <linux/kvm.h>
16 #include "qemu-common.h"
17 #include "qemu/timer.h"
18 #include "qemu/error-report.h"
19 #include "qemu/main-loop.h"
20 #include "qom/object.h"
21 #include "qapi/error.h"
22 #include "sysemu/sysemu.h"
23 #include "sysemu/kvm.h"
24 #include "sysemu/kvm_int.h"
25 #include "kvm_arm.h"
26 #include "cpu.h"
27 #include "trace.h"
28 #include "internals.h"
29 #include "hw/pci/pci.h"
30 #include "exec/memattrs.h"
31 #include "exec/address-spaces.h"
32 #include "hw/boards.h"
33 #include "hw/irq.h"
34 #include "qemu/log.h"
36 const KVMCapabilityInfo kvm_arch_required_capabilities[] = {
37 KVM_CAP_LAST_INFO
40 static bool cap_has_mp_state;
41 static bool cap_has_inject_serror_esr;
42 static bool cap_has_inject_ext_dabt;
44 static ARMHostCPUFeatures arm_host_cpu_features;
46 int kvm_arm_vcpu_init(CPUState *cs)
48 ARMCPU *cpu = ARM_CPU(cs);
49 struct kvm_vcpu_init init;
51 init.target = cpu->kvm_target;
52 memcpy(init.features, cpu->kvm_init_features, sizeof(init.features));
54 return kvm_vcpu_ioctl(cs, KVM_ARM_VCPU_INIT, &init);
57 int kvm_arm_vcpu_finalize(CPUState *cs, int feature)
59 return kvm_vcpu_ioctl(cs, KVM_ARM_VCPU_FINALIZE, &feature);
62 void kvm_arm_init_serror_injection(CPUState *cs)
64 cap_has_inject_serror_esr = kvm_check_extension(cs->kvm_state,
65 KVM_CAP_ARM_INJECT_SERROR_ESR);
68 bool kvm_arm_create_scratch_host_vcpu(const uint32_t *cpus_to_try,
69 int *fdarray,
70 struct kvm_vcpu_init *init)
72 int ret = 0, kvmfd = -1, vmfd = -1, cpufd = -1;
74 kvmfd = qemu_open_old("/dev/kvm", O_RDWR);
75 if (kvmfd < 0) {
76 goto err;
78 vmfd = ioctl(kvmfd, KVM_CREATE_VM, 0);
79 if (vmfd < 0) {
80 goto err;
82 cpufd = ioctl(vmfd, KVM_CREATE_VCPU, 0);
83 if (cpufd < 0) {
84 goto err;
87 if (!init) {
88 /* Caller doesn't want the VCPU to be initialized, so skip it */
89 goto finish;
92 if (init->target == -1) {
93 struct kvm_vcpu_init preferred;
95 ret = ioctl(vmfd, KVM_ARM_PREFERRED_TARGET, &preferred);
96 if (!ret) {
97 init->target = preferred.target;
100 if (ret >= 0) {
101 ret = ioctl(cpufd, KVM_ARM_VCPU_INIT, init);
102 if (ret < 0) {
103 goto err;
105 } else if (cpus_to_try) {
106 /* Old kernel which doesn't know about the
107 * PREFERRED_TARGET ioctl: we know it will only support
108 * creating one kind of guest CPU which is its preferred
109 * CPU type.
111 struct kvm_vcpu_init try;
113 while (*cpus_to_try != QEMU_KVM_ARM_TARGET_NONE) {
114 try.target = *cpus_to_try++;
115 memcpy(try.features, init->features, sizeof(init->features));
116 ret = ioctl(cpufd, KVM_ARM_VCPU_INIT, &try);
117 if (ret >= 0) {
118 break;
121 if (ret < 0) {
122 goto err;
124 init->target = try.target;
125 } else {
126 /* Treat a NULL cpus_to_try argument the same as an empty
127 * list, which means we will fail the call since this must
128 * be an old kernel which doesn't support PREFERRED_TARGET.
130 goto err;
133 finish:
134 fdarray[0] = kvmfd;
135 fdarray[1] = vmfd;
136 fdarray[2] = cpufd;
138 return true;
140 err:
141 if (cpufd >= 0) {
142 close(cpufd);
144 if (vmfd >= 0) {
145 close(vmfd);
147 if (kvmfd >= 0) {
148 close(kvmfd);
151 return false;
154 void kvm_arm_destroy_scratch_host_vcpu(int *fdarray)
156 int i;
158 for (i = 2; i >= 0; i--) {
159 close(fdarray[i]);
163 void kvm_arm_set_cpu_features_from_host(ARMCPU *cpu)
165 CPUARMState *env = &cpu->env;
167 if (!arm_host_cpu_features.dtb_compatible) {
168 if (!kvm_enabled() ||
169 !kvm_arm_get_host_cpu_features(&arm_host_cpu_features)) {
170 /* We can't report this error yet, so flag that we need to
171 * in arm_cpu_realizefn().
173 cpu->kvm_target = QEMU_KVM_ARM_TARGET_NONE;
174 cpu->host_cpu_probe_failed = true;
175 return;
179 cpu->kvm_target = arm_host_cpu_features.target;
180 cpu->dtb_compatible = arm_host_cpu_features.dtb_compatible;
181 cpu->isar = arm_host_cpu_features.isar;
182 env->features = arm_host_cpu_features.features;
185 static bool kvm_no_adjvtime_get(Object *obj, Error **errp)
187 return !ARM_CPU(obj)->kvm_adjvtime;
190 static void kvm_no_adjvtime_set(Object *obj, bool value, Error **errp)
192 ARM_CPU(obj)->kvm_adjvtime = !value;
195 static bool kvm_steal_time_get(Object *obj, Error **errp)
197 return ARM_CPU(obj)->kvm_steal_time != ON_OFF_AUTO_OFF;
200 static void kvm_steal_time_set(Object *obj, bool value, Error **errp)
202 ARM_CPU(obj)->kvm_steal_time = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
205 /* KVM VCPU properties should be prefixed with "kvm-". */
206 void kvm_arm_add_vcpu_properties(Object *obj)
208 ARMCPU *cpu = ARM_CPU(obj);
209 CPUARMState *env = &cpu->env;
211 if (arm_feature(env, ARM_FEATURE_GENERIC_TIMER)) {
212 cpu->kvm_adjvtime = true;
213 object_property_add_bool(obj, "kvm-no-adjvtime", kvm_no_adjvtime_get,
214 kvm_no_adjvtime_set);
215 object_property_set_description(obj, "kvm-no-adjvtime",
216 "Set on to disable the adjustment of "
217 "the virtual counter. VM stopped time "
218 "will be counted.");
221 cpu->kvm_steal_time = ON_OFF_AUTO_AUTO;
222 object_property_add_bool(obj, "kvm-steal-time", kvm_steal_time_get,
223 kvm_steal_time_set);
224 object_property_set_description(obj, "kvm-steal-time",
225 "Set off to disable KVM steal time.");
228 bool kvm_arm_pmu_supported(void)
230 return kvm_check_extension(kvm_state, KVM_CAP_ARM_PMU_V3);
233 int kvm_arm_get_max_vm_ipa_size(MachineState *ms, bool *fixed_ipa)
235 KVMState *s = KVM_STATE(ms->accelerator);
236 int ret;
238 ret = kvm_check_extension(s, KVM_CAP_ARM_VM_IPA_SIZE);
239 *fixed_ipa = ret <= 0;
241 return ret > 0 ? ret : 40;
244 int kvm_arch_init(MachineState *ms, KVMState *s)
246 int ret = 0;
247 /* For ARM interrupt delivery is always asynchronous,
248 * whether we are using an in-kernel VGIC or not.
250 kvm_async_interrupts_allowed = true;
253 * PSCI wakes up secondary cores, so we always need to
254 * have vCPUs waiting in kernel space
256 kvm_halt_in_kernel_allowed = true;
258 cap_has_mp_state = kvm_check_extension(s, KVM_CAP_MP_STATE);
260 if (ms->smp.cpus > 256 &&
261 !kvm_check_extension(s, KVM_CAP_ARM_IRQ_LINE_LAYOUT_2)) {
262 error_report("Using more than 256 vcpus requires a host kernel "
263 "with KVM_CAP_ARM_IRQ_LINE_LAYOUT_2");
264 ret = -EINVAL;
267 if (kvm_check_extension(s, KVM_CAP_ARM_NISV_TO_USER)) {
268 if (kvm_vm_enable_cap(s, KVM_CAP_ARM_NISV_TO_USER, 0)) {
269 error_report("Failed to enable KVM_CAP_ARM_NISV_TO_USER cap");
270 } else {
271 /* Set status for supporting the external dabt injection */
272 cap_has_inject_ext_dabt = kvm_check_extension(s,
273 KVM_CAP_ARM_INJECT_EXT_DABT);
277 return ret;
280 unsigned long kvm_arch_vcpu_id(CPUState *cpu)
282 return cpu->cpu_index;
285 /* We track all the KVM devices which need their memory addresses
286 * passing to the kernel in a list of these structures.
287 * When board init is complete we run through the list and
288 * tell the kernel the base addresses of the memory regions.
289 * We use a MemoryListener to track mapping and unmapping of
290 * the regions during board creation, so the board models don't
291 * need to do anything special for the KVM case.
293 * Sometimes the address must be OR'ed with some other fields
294 * (for example for KVM_VGIC_V3_ADDR_TYPE_REDIST_REGION).
295 * @kda_addr_ormask aims at storing the value of those fields.
297 typedef struct KVMDevice {
298 struct kvm_arm_device_addr kda;
299 struct kvm_device_attr kdattr;
300 uint64_t kda_addr_ormask;
301 MemoryRegion *mr;
302 QSLIST_ENTRY(KVMDevice) entries;
303 int dev_fd;
304 } KVMDevice;
306 static QSLIST_HEAD(, KVMDevice) kvm_devices_head;
308 static void kvm_arm_devlistener_add(MemoryListener *listener,
309 MemoryRegionSection *section)
311 KVMDevice *kd;
313 QSLIST_FOREACH(kd, &kvm_devices_head, entries) {
314 if (section->mr == kd->mr) {
315 kd->kda.addr = section->offset_within_address_space;
320 static void kvm_arm_devlistener_del(MemoryListener *listener,
321 MemoryRegionSection *section)
323 KVMDevice *kd;
325 QSLIST_FOREACH(kd, &kvm_devices_head, entries) {
326 if (section->mr == kd->mr) {
327 kd->kda.addr = -1;
332 static MemoryListener devlistener = {
333 .region_add = kvm_arm_devlistener_add,
334 .region_del = kvm_arm_devlistener_del,
337 static void kvm_arm_set_device_addr(KVMDevice *kd)
339 struct kvm_device_attr *attr = &kd->kdattr;
340 int ret;
342 /* If the device control API is available and we have a device fd on the
343 * KVMDevice struct, let's use the newer API
345 if (kd->dev_fd >= 0) {
346 uint64_t addr = kd->kda.addr;
348 addr |= kd->kda_addr_ormask;
349 attr->addr = (uintptr_t)&addr;
350 ret = kvm_device_ioctl(kd->dev_fd, KVM_SET_DEVICE_ATTR, attr);
351 } else {
352 ret = kvm_vm_ioctl(kvm_state, KVM_ARM_SET_DEVICE_ADDR, &kd->kda);
355 if (ret < 0) {
356 fprintf(stderr, "Failed to set device address: %s\n",
357 strerror(-ret));
358 abort();
362 static void kvm_arm_machine_init_done(Notifier *notifier, void *data)
364 KVMDevice *kd, *tkd;
366 QSLIST_FOREACH_SAFE(kd, &kvm_devices_head, entries, tkd) {
367 if (kd->kda.addr != -1) {
368 kvm_arm_set_device_addr(kd);
370 memory_region_unref(kd->mr);
371 QSLIST_REMOVE_HEAD(&kvm_devices_head, entries);
372 g_free(kd);
374 memory_listener_unregister(&devlistener);
377 static Notifier notify = {
378 .notify = kvm_arm_machine_init_done,
381 void kvm_arm_register_device(MemoryRegion *mr, uint64_t devid, uint64_t group,
382 uint64_t attr, int dev_fd, uint64_t addr_ormask)
384 KVMDevice *kd;
386 if (!kvm_irqchip_in_kernel()) {
387 return;
390 if (QSLIST_EMPTY(&kvm_devices_head)) {
391 memory_listener_register(&devlistener, &address_space_memory);
392 qemu_add_machine_init_done_notifier(&notify);
394 kd = g_new0(KVMDevice, 1);
395 kd->mr = mr;
396 kd->kda.id = devid;
397 kd->kda.addr = -1;
398 kd->kdattr.flags = 0;
399 kd->kdattr.group = group;
400 kd->kdattr.attr = attr;
401 kd->dev_fd = dev_fd;
402 kd->kda_addr_ormask = addr_ormask;
403 QSLIST_INSERT_HEAD(&kvm_devices_head, kd, entries);
404 memory_region_ref(kd->mr);
407 static int compare_u64(const void *a, const void *b)
409 if (*(uint64_t *)a > *(uint64_t *)b) {
410 return 1;
412 if (*(uint64_t *)a < *(uint64_t *)b) {
413 return -1;
415 return 0;
419 * cpreg_values are sorted in ascending order by KVM register ID
420 * (see kvm_arm_init_cpreg_list). This allows us to cheaply find
421 * the storage for a KVM register by ID with a binary search.
423 static uint64_t *kvm_arm_get_cpreg_ptr(ARMCPU *cpu, uint64_t regidx)
425 uint64_t *res;
427 res = bsearch(&regidx, cpu->cpreg_indexes, cpu->cpreg_array_len,
428 sizeof(uint64_t), compare_u64);
429 assert(res);
431 return &cpu->cpreg_values[res - cpu->cpreg_indexes];
434 /* Initialize the ARMCPU cpreg list according to the kernel's
435 * definition of what CPU registers it knows about (and throw away
436 * the previous TCG-created cpreg list).
438 int kvm_arm_init_cpreg_list(ARMCPU *cpu)
440 struct kvm_reg_list rl;
441 struct kvm_reg_list *rlp;
442 int i, ret, arraylen;
443 CPUState *cs = CPU(cpu);
445 rl.n = 0;
446 ret = kvm_vcpu_ioctl(cs, KVM_GET_REG_LIST, &rl);
447 if (ret != -E2BIG) {
448 return ret;
450 rlp = g_malloc(sizeof(struct kvm_reg_list) + rl.n * sizeof(uint64_t));
451 rlp->n = rl.n;
452 ret = kvm_vcpu_ioctl(cs, KVM_GET_REG_LIST, rlp);
453 if (ret) {
454 goto out;
456 /* Sort the list we get back from the kernel, since cpreg_tuples
457 * must be in strictly ascending order.
459 qsort(&rlp->reg, rlp->n, sizeof(rlp->reg[0]), compare_u64);
461 for (i = 0, arraylen = 0; i < rlp->n; i++) {
462 if (!kvm_arm_reg_syncs_via_cpreg_list(rlp->reg[i])) {
463 continue;
465 switch (rlp->reg[i] & KVM_REG_SIZE_MASK) {
466 case KVM_REG_SIZE_U32:
467 case KVM_REG_SIZE_U64:
468 break;
469 default:
470 fprintf(stderr, "Can't handle size of register in kernel list\n");
471 ret = -EINVAL;
472 goto out;
475 arraylen++;
478 cpu->cpreg_indexes = g_renew(uint64_t, cpu->cpreg_indexes, arraylen);
479 cpu->cpreg_values = g_renew(uint64_t, cpu->cpreg_values, arraylen);
480 cpu->cpreg_vmstate_indexes = g_renew(uint64_t, cpu->cpreg_vmstate_indexes,
481 arraylen);
482 cpu->cpreg_vmstate_values = g_renew(uint64_t, cpu->cpreg_vmstate_values,
483 arraylen);
484 cpu->cpreg_array_len = arraylen;
485 cpu->cpreg_vmstate_array_len = arraylen;
487 for (i = 0, arraylen = 0; i < rlp->n; i++) {
488 uint64_t regidx = rlp->reg[i];
489 if (!kvm_arm_reg_syncs_via_cpreg_list(regidx)) {
490 continue;
492 cpu->cpreg_indexes[arraylen] = regidx;
493 arraylen++;
495 assert(cpu->cpreg_array_len == arraylen);
497 if (!write_kvmstate_to_list(cpu)) {
498 /* Shouldn't happen unless kernel is inconsistent about
499 * what registers exist.
501 fprintf(stderr, "Initial read of kernel register state failed\n");
502 ret = -EINVAL;
503 goto out;
506 out:
507 g_free(rlp);
508 return ret;
511 bool write_kvmstate_to_list(ARMCPU *cpu)
513 CPUState *cs = CPU(cpu);
514 int i;
515 bool ok = true;
517 for (i = 0; i < cpu->cpreg_array_len; i++) {
518 struct kvm_one_reg r;
519 uint64_t regidx = cpu->cpreg_indexes[i];
520 uint32_t v32;
521 int ret;
523 r.id = regidx;
525 switch (regidx & KVM_REG_SIZE_MASK) {
526 case KVM_REG_SIZE_U32:
527 r.addr = (uintptr_t)&v32;
528 ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r);
529 if (!ret) {
530 cpu->cpreg_values[i] = v32;
532 break;
533 case KVM_REG_SIZE_U64:
534 r.addr = (uintptr_t)(cpu->cpreg_values + i);
535 ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r);
536 break;
537 default:
538 abort();
540 if (ret) {
541 ok = false;
544 return ok;
547 bool write_list_to_kvmstate(ARMCPU *cpu, int level)
549 CPUState *cs = CPU(cpu);
550 int i;
551 bool ok = true;
553 for (i = 0; i < cpu->cpreg_array_len; i++) {
554 struct kvm_one_reg r;
555 uint64_t regidx = cpu->cpreg_indexes[i];
556 uint32_t v32;
557 int ret;
559 if (kvm_arm_cpreg_level(regidx) > level) {
560 continue;
563 r.id = regidx;
564 switch (regidx & KVM_REG_SIZE_MASK) {
565 case KVM_REG_SIZE_U32:
566 v32 = cpu->cpreg_values[i];
567 r.addr = (uintptr_t)&v32;
568 break;
569 case KVM_REG_SIZE_U64:
570 r.addr = (uintptr_t)(cpu->cpreg_values + i);
571 break;
572 default:
573 abort();
575 ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &r);
576 if (ret) {
577 /* We might fail for "unknown register" and also for
578 * "you tried to set a register which is constant with
579 * a different value from what it actually contains".
581 ok = false;
584 return ok;
587 void kvm_arm_cpu_pre_save(ARMCPU *cpu)
589 /* KVM virtual time adjustment */
590 if (cpu->kvm_vtime_dirty) {
591 *kvm_arm_get_cpreg_ptr(cpu, KVM_REG_ARM_TIMER_CNT) = cpu->kvm_vtime;
595 void kvm_arm_cpu_post_load(ARMCPU *cpu)
597 /* KVM virtual time adjustment */
598 if (cpu->kvm_adjvtime) {
599 cpu->kvm_vtime = *kvm_arm_get_cpreg_ptr(cpu, KVM_REG_ARM_TIMER_CNT);
600 cpu->kvm_vtime_dirty = true;
604 void kvm_arm_reset_vcpu(ARMCPU *cpu)
606 int ret;
608 /* Re-init VCPU so that all registers are set to
609 * their respective reset values.
611 ret = kvm_arm_vcpu_init(CPU(cpu));
612 if (ret < 0) {
613 fprintf(stderr, "kvm_arm_vcpu_init failed: %s\n", strerror(-ret));
614 abort();
616 if (!write_kvmstate_to_list(cpu)) {
617 fprintf(stderr, "write_kvmstate_to_list failed\n");
618 abort();
621 * Sync the reset values also into the CPUState. This is necessary
622 * because the next thing we do will be a kvm_arch_put_registers()
623 * which will update the list values from the CPUState before copying
624 * the list values back to KVM. It's OK to ignore failure returns here
625 * for the same reason we do so in kvm_arch_get_registers().
627 write_list_to_cpustate(cpu);
631 * Update KVM's MP_STATE based on what QEMU thinks it is
633 int kvm_arm_sync_mpstate_to_kvm(ARMCPU *cpu)
635 if (cap_has_mp_state) {
636 struct kvm_mp_state mp_state = {
637 .mp_state = (cpu->power_state == PSCI_OFF) ?
638 KVM_MP_STATE_STOPPED : KVM_MP_STATE_RUNNABLE
640 int ret = kvm_vcpu_ioctl(CPU(cpu), KVM_SET_MP_STATE, &mp_state);
641 if (ret) {
642 fprintf(stderr, "%s: failed to set MP_STATE %d/%s\n",
643 __func__, ret, strerror(-ret));
644 return -1;
648 return 0;
652 * Sync the KVM MP_STATE into QEMU
654 int kvm_arm_sync_mpstate_to_qemu(ARMCPU *cpu)
656 if (cap_has_mp_state) {
657 struct kvm_mp_state mp_state;
658 int ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_MP_STATE, &mp_state);
659 if (ret) {
660 fprintf(stderr, "%s: failed to get MP_STATE %d/%s\n",
661 __func__, ret, strerror(-ret));
662 abort();
664 cpu->power_state = (mp_state.mp_state == KVM_MP_STATE_STOPPED) ?
665 PSCI_OFF : PSCI_ON;
668 return 0;
671 void kvm_arm_get_virtual_time(CPUState *cs)
673 ARMCPU *cpu = ARM_CPU(cs);
674 struct kvm_one_reg reg = {
675 .id = KVM_REG_ARM_TIMER_CNT,
676 .addr = (uintptr_t)&cpu->kvm_vtime,
678 int ret;
680 if (cpu->kvm_vtime_dirty) {
681 return;
684 ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &reg);
685 if (ret) {
686 error_report("Failed to get KVM_REG_ARM_TIMER_CNT");
687 abort();
690 cpu->kvm_vtime_dirty = true;
693 void kvm_arm_put_virtual_time(CPUState *cs)
695 ARMCPU *cpu = ARM_CPU(cs);
696 struct kvm_one_reg reg = {
697 .id = KVM_REG_ARM_TIMER_CNT,
698 .addr = (uintptr_t)&cpu->kvm_vtime,
700 int ret;
702 if (!cpu->kvm_vtime_dirty) {
703 return;
706 ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &reg);
707 if (ret) {
708 error_report("Failed to set KVM_REG_ARM_TIMER_CNT");
709 abort();
712 cpu->kvm_vtime_dirty = false;
715 int kvm_put_vcpu_events(ARMCPU *cpu)
717 CPUARMState *env = &cpu->env;
718 struct kvm_vcpu_events events;
719 int ret;
721 if (!kvm_has_vcpu_events()) {
722 return 0;
725 memset(&events, 0, sizeof(events));
726 events.exception.serror_pending = env->serror.pending;
728 /* Inject SError to guest with specified syndrome if host kernel
729 * supports it, otherwise inject SError without syndrome.
731 if (cap_has_inject_serror_esr) {
732 events.exception.serror_has_esr = env->serror.has_esr;
733 events.exception.serror_esr = env->serror.esr;
736 ret = kvm_vcpu_ioctl(CPU(cpu), KVM_SET_VCPU_EVENTS, &events);
737 if (ret) {
738 error_report("failed to put vcpu events");
741 return ret;
744 int kvm_get_vcpu_events(ARMCPU *cpu)
746 CPUARMState *env = &cpu->env;
747 struct kvm_vcpu_events events;
748 int ret;
750 if (!kvm_has_vcpu_events()) {
751 return 0;
754 memset(&events, 0, sizeof(events));
755 ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_VCPU_EVENTS, &events);
756 if (ret) {
757 error_report("failed to get vcpu events");
758 return ret;
761 env->serror.pending = events.exception.serror_pending;
762 env->serror.has_esr = events.exception.serror_has_esr;
763 env->serror.esr = events.exception.serror_esr;
765 return 0;
768 void kvm_arch_pre_run(CPUState *cs, struct kvm_run *run)
770 ARMCPU *cpu = ARM_CPU(cs);
771 CPUARMState *env = &cpu->env;
773 if (unlikely(env->ext_dabt_raised)) {
775 * Verifying that the ext DABT has been properly injected,
776 * otherwise risking indefinitely re-running the faulting instruction
777 * Covering a very narrow case for kernels 5.5..5.5.4
778 * when injected abort was misconfigured to be
779 * an IMPLEMENTATION DEFINED exception (for 32-bit EL1)
781 if (!arm_feature(env, ARM_FEATURE_AARCH64) &&
782 unlikely(!kvm_arm_verify_ext_dabt_pending(cs))) {
784 error_report("Data abort exception with no valid ISS generated by "
785 "guest memory access. KVM unable to emulate faulting "
786 "instruction. Failed to inject an external data abort "
787 "into the guest.");
788 abort();
790 /* Clear the status */
791 env->ext_dabt_raised = 0;
795 MemTxAttrs kvm_arch_post_run(CPUState *cs, struct kvm_run *run)
797 ARMCPU *cpu;
798 uint32_t switched_level;
800 if (kvm_irqchip_in_kernel()) {
802 * We only need to sync timer states with user-space interrupt
803 * controllers, so return early and save cycles if we don't.
805 return MEMTXATTRS_UNSPECIFIED;
808 cpu = ARM_CPU(cs);
810 /* Synchronize our shadowed in-kernel device irq lines with the kvm ones */
811 if (run->s.regs.device_irq_level != cpu->device_irq_level) {
812 switched_level = cpu->device_irq_level ^ run->s.regs.device_irq_level;
814 qemu_mutex_lock_iothread();
816 if (switched_level & KVM_ARM_DEV_EL1_VTIMER) {
817 qemu_set_irq(cpu->gt_timer_outputs[GTIMER_VIRT],
818 !!(run->s.regs.device_irq_level &
819 KVM_ARM_DEV_EL1_VTIMER));
820 switched_level &= ~KVM_ARM_DEV_EL1_VTIMER;
823 if (switched_level & KVM_ARM_DEV_EL1_PTIMER) {
824 qemu_set_irq(cpu->gt_timer_outputs[GTIMER_PHYS],
825 !!(run->s.regs.device_irq_level &
826 KVM_ARM_DEV_EL1_PTIMER));
827 switched_level &= ~KVM_ARM_DEV_EL1_PTIMER;
830 if (switched_level & KVM_ARM_DEV_PMU) {
831 qemu_set_irq(cpu->pmu_interrupt,
832 !!(run->s.regs.device_irq_level & KVM_ARM_DEV_PMU));
833 switched_level &= ~KVM_ARM_DEV_PMU;
836 if (switched_level) {
837 qemu_log_mask(LOG_UNIMP, "%s: unhandled in-kernel device IRQ %x\n",
838 __func__, switched_level);
841 /* We also mark unknown levels as processed to not waste cycles */
842 cpu->device_irq_level = run->s.regs.device_irq_level;
843 qemu_mutex_unlock_iothread();
846 return MEMTXATTRS_UNSPECIFIED;
849 void kvm_arm_vm_state_change(void *opaque, bool running, RunState state)
851 CPUState *cs = opaque;
852 ARMCPU *cpu = ARM_CPU(cs);
854 if (running) {
855 if (cpu->kvm_adjvtime) {
856 kvm_arm_put_virtual_time(cs);
858 } else {
859 if (cpu->kvm_adjvtime) {
860 kvm_arm_get_virtual_time(cs);
866 * kvm_arm_handle_dabt_nisv:
867 * @cs: CPUState
868 * @esr_iss: ISS encoding (limited) for the exception from Data Abort
869 * ISV bit set to '0b0' -> no valid instruction syndrome
870 * @fault_ipa: faulting address for the synchronous data abort
872 * Returns: 0 if the exception has been handled, < 0 otherwise
874 static int kvm_arm_handle_dabt_nisv(CPUState *cs, uint64_t esr_iss,
875 uint64_t fault_ipa)
877 ARMCPU *cpu = ARM_CPU(cs);
878 CPUARMState *env = &cpu->env;
880 * Request KVM to inject the external data abort into the guest
882 if (cap_has_inject_ext_dabt) {
883 struct kvm_vcpu_events events = { };
885 * The external data abort event will be handled immediately by KVM
886 * using the address fault that triggered the exit on given VCPU.
887 * Requesting injection of the external data abort does not rely
888 * on any other VCPU state. Therefore, in this particular case, the VCPU
889 * synchronization can be exceptionally skipped.
891 events.exception.ext_dabt_pending = 1;
892 /* KVM_CAP_ARM_INJECT_EXT_DABT implies KVM_CAP_VCPU_EVENTS */
893 if (!kvm_vcpu_ioctl(cs, KVM_SET_VCPU_EVENTS, &events)) {
894 env->ext_dabt_raised = 1;
895 return 0;
897 } else {
898 error_report("Data abort exception triggered by guest memory access "
899 "at physical address: 0x" TARGET_FMT_lx,
900 (target_ulong)fault_ipa);
901 error_printf("KVM unable to emulate faulting instruction.\n");
903 return -1;
906 int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run)
908 int ret = 0;
910 switch (run->exit_reason) {
911 case KVM_EXIT_DEBUG:
912 if (kvm_arm_handle_debug(cs, &run->debug.arch)) {
913 ret = EXCP_DEBUG;
914 } /* otherwise return to guest */
915 break;
916 case KVM_EXIT_ARM_NISV:
917 /* External DABT with no valid iss to decode */
918 ret = kvm_arm_handle_dabt_nisv(cs, run->arm_nisv.esr_iss,
919 run->arm_nisv.fault_ipa);
920 break;
921 default:
922 qemu_log_mask(LOG_UNIMP, "%s: un-handled exit reason %d\n",
923 __func__, run->exit_reason);
924 break;
926 return ret;
929 bool kvm_arch_stop_on_emulation_error(CPUState *cs)
931 return true;
934 int kvm_arch_process_async_events(CPUState *cs)
936 return 0;
939 void kvm_arch_update_guest_debug(CPUState *cs, struct kvm_guest_debug *dbg)
941 if (kvm_sw_breakpoints_active(cs)) {
942 dbg->control |= KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_SW_BP;
944 if (kvm_arm_hw_debug_active(cs)) {
945 dbg->control |= KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW;
946 kvm_arm_copy_hw_debug_data(&dbg->arch);
950 void kvm_arch_init_irq_routing(KVMState *s)
954 int kvm_arch_irqchip_create(KVMState *s)
956 if (kvm_kernel_irqchip_split()) {
957 perror("-machine kernel_irqchip=split is not supported on ARM.");
958 exit(1);
961 /* If we can create the VGIC using the newer device control API, we
962 * let the device do this when it initializes itself, otherwise we
963 * fall back to the old API */
964 return kvm_check_extension(s, KVM_CAP_DEVICE_CTRL);
967 int kvm_arm_vgic_probe(void)
969 int val = 0;
971 if (kvm_create_device(kvm_state,
972 KVM_DEV_TYPE_ARM_VGIC_V3, true) == 0) {
973 val |= KVM_ARM_VGIC_V3;
975 if (kvm_create_device(kvm_state,
976 KVM_DEV_TYPE_ARM_VGIC_V2, true) == 0) {
977 val |= KVM_ARM_VGIC_V2;
979 return val;
982 int kvm_arm_set_irq(int cpu, int irqtype, int irq, int level)
984 int kvm_irq = (irqtype << KVM_ARM_IRQ_TYPE_SHIFT) | irq;
985 int cpu_idx1 = cpu % 256;
986 int cpu_idx2 = cpu / 256;
988 kvm_irq |= (cpu_idx1 << KVM_ARM_IRQ_VCPU_SHIFT) |
989 (cpu_idx2 << KVM_ARM_IRQ_VCPU2_SHIFT);
991 return kvm_set_irq(kvm_state, kvm_irq, !!level);
994 int kvm_arch_fixup_msi_route(struct kvm_irq_routing_entry *route,
995 uint64_t address, uint32_t data, PCIDevice *dev)
997 AddressSpace *as = pci_device_iommu_address_space(dev);
998 hwaddr xlat, len, doorbell_gpa;
999 MemoryRegionSection mrs;
1000 MemoryRegion *mr;
1001 int ret = 1;
1003 if (as == &address_space_memory) {
1004 return 0;
1007 /* MSI doorbell address is translated by an IOMMU */
1009 rcu_read_lock();
1010 mr = address_space_translate(as, address, &xlat, &len, true,
1011 MEMTXATTRS_UNSPECIFIED);
1012 if (!mr) {
1013 goto unlock;
1015 mrs = memory_region_find(mr, xlat, 1);
1016 if (!mrs.mr) {
1017 goto unlock;
1020 doorbell_gpa = mrs.offset_within_address_space;
1021 memory_region_unref(mrs.mr);
1023 route->u.msi.address_lo = doorbell_gpa;
1024 route->u.msi.address_hi = doorbell_gpa >> 32;
1026 trace_kvm_arm_fixup_msi_route(address, doorbell_gpa);
1028 ret = 0;
1030 unlock:
1031 rcu_read_unlock();
1032 return ret;
1035 int kvm_arch_add_msi_route_post(struct kvm_irq_routing_entry *route,
1036 int vector, PCIDevice *dev)
1038 return 0;
1041 int kvm_arch_release_virq_post(int virq)
1043 return 0;
1046 int kvm_arch_msi_data_to_gsi(uint32_t data)
1048 return (data - 32) & 0xffff;
1051 bool kvm_arch_cpu_check_are_resettable(void)
1053 return true;