tests/microbit-test.c

   1 /*
   2  * QTest testcase for Microbit board using the Nordic Semiconductor nRF51 SoC.
   3  *
   4  * nRF51:
   5  * Reference Manual: http://infocenter.nordicsemi.com/pdf/nRF51_RM_v3.0.pdf
   6  * Product Spec: http://infocenter.nordicsemi.com/pdf/nRF51822_PS_v3.1.pdf
   7  *
   8  * Microbit Board: http://microbit.org/
   9  *
  10  * Copyright 2018 Steffen Görtz <contrib@steffen-goertz.de>
  11  *
  12  * This code is licensed under the GPL version 2 or later.  See
  13  * the COPYING file in the top-level directory.
  14  */
  15
  16
  17 #include "qemu/osdep.h"
  18 #include "exec/hwaddr.h"
  19 #include "libqtest.h"
  20
  21 #include "hw/arm/nrf51.h"
  22 #include "hw/gpio/nrf51_gpio.h"
  23 #include "hw/timer/nrf51_timer.h"
  24
  25 static void test_nrf51_gpio(void)
  26 {
  27     size_t i;
  28     uint32_t actual, expected;
  29
  30     struct {
  31         hwaddr addr;
  32         uint32_t expected;
  33     } const reset_state[] = {
  34         {NRF51_GPIO_REG_OUT, 0x00000000}, {NRF51_GPIO_REG_OUTSET, 0x00000000},
  35         {NRF51_GPIO_REG_OUTCLR, 0x00000000}, {NRF51_GPIO_REG_IN, 0x00000000},
  36         {NRF51_GPIO_REG_DIR, 0x00000000}, {NRF51_GPIO_REG_DIRSET, 0x00000000},
  37         {NRF51_GPIO_REG_DIRCLR, 0x00000000}
  38     };
  39
  40     /* Check reset state */
  41     for (i = 0; i < ARRAY_SIZE(reset_state); i++) {
  42         expected = reset_state[i].expected;
  43         actual = readl(NRF51_GPIO_BASE + reset_state[i].addr);
  44         g_assert_cmpuint(actual, ==, expected);
  45     }
  46
  47     for (i = 0; i < NRF51_GPIO_PINS; i++) {
  48         expected = 0x00000002;
  49         actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START + i * 4);
  50         g_assert_cmpuint(actual, ==, expected);
  51     }
  52
  53     /* Check dir bit consistency between dir and cnf */
  54     /* Check set via DIRSET */
  55     expected = 0x80000001;
  56     writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_DIRSET, expected);
  57     actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR);
  58     g_assert_cmpuint(actual, ==, expected);
  59     actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START) & 0x01;
  60     g_assert_cmpuint(actual, ==, 0x01);
  61     actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_END) & 0x01;
  62     g_assert_cmpuint(actual, ==, 0x01);
  63
  64     /* Check clear via DIRCLR */
  65     writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_DIRCLR, 0x80000001);
  66     actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR);
  67     g_assert_cmpuint(actual, ==, 0x00000000);
  68     actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START) & 0x01;
  69     g_assert_cmpuint(actual, ==, 0x00);
  70     actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_END) & 0x01;
  71     g_assert_cmpuint(actual, ==, 0x00);
  72
  73     /* Check set via DIR */
  74     expected = 0x80000001;
  75     writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR, expected);
  76     actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR);
  77     g_assert_cmpuint(actual, ==, expected);
  78     actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START) & 0x01;
  79     g_assert_cmpuint(actual, ==, 0x01);
  80     actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_END) & 0x01;
  81     g_assert_cmpuint(actual, ==, 0x01);
  82
  83     /* Reset DIR */
  84     writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR, 0x00000000);
  85
  86     /* Check Input propagates */
  87     writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0x00);
  88     qtest_set_irq_in(global_qtest, "/machine/nrf51", "unnamed-gpio-in", 0, 0);
  89     actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01;
  90     g_assert_cmpuint(actual, ==, 0x00);
  91     qtest_set_irq_in(global_qtest, "/machine/nrf51", "unnamed-gpio-in", 0, 1);
  92     actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01;
  93     g_assert_cmpuint(actual, ==, 0x01);
  94     qtest_set_irq_in(global_qtest, "/machine/nrf51", "unnamed-gpio-in", 0, -1);
  95     actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01;
  96     g_assert_cmpuint(actual, ==, 0x01);
  97     writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0x02);
  98
  99     /* Check pull-up working */
 100     qtest_set_irq_in(global_qtest, "/machine/nrf51", "unnamed-gpio-in", 0, 0);
 101     writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b0000);
 102     actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01;
 103     g_assert_cmpuint(actual, ==, 0x00);
 104     writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b1110);
 105     actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01;
 106     g_assert_cmpuint(actual, ==, 0x01);
 107     writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0x02);
 108
 109     /* Check pull-down working */
 110     qtest_set_irq_in(global_qtest, "/machine/nrf51", "unnamed-gpio-in", 0, 1);
 111     writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b0000);
 112     actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01;
 113     g_assert_cmpuint(actual, ==, 0x01);
 114     writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b0110);
 115     actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01;
 116     g_assert_cmpuint(actual, ==, 0x00);
 117     writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0x02);
 118     qtest_set_irq_in(global_qtest, "/machine/nrf51", "unnamed-gpio-in", 0, -1);
 119
 120     /* Check Output propagates */
 121     irq_intercept_out("/machine/nrf51");
 122     writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b0011);
 123     writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTSET, 0x01);
 124     g_assert_true(get_irq(0));
 125     writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTCLR, 0x01);
 126     g_assert_false(get_irq(0));
 127
 128     /* Check self-stimulation */
 129     writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b01);
 130     writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTSET, 0x01);
 131     actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01;
 132     g_assert_cmpuint(actual, ==, 0x01);
 133
 134     writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTCLR, 0x01);
 135     actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01;
 136     g_assert_cmpuint(actual, ==, 0x00);
 137
 138     /*
 139      * Check short-circuit - generates an guest_error which must be checked
 140      * manually as long as qtest can not scan qemu_log messages
 141      */
 142     writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b01);
 143     writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTSET, 0x01);
 144     qtest_set_irq_in(global_qtest, "/machine/nrf51", "unnamed-gpio-in", 0, 0);
 145 }
 146
 147 static void timer_task(hwaddr task)
 148 {
 149     writel(NRF51_TIMER_BASE + task, NRF51_TRIGGER_TASK);
 150 }
 151
 152 static void timer_clear_event(hwaddr event)
 153 {
 154     writel(NRF51_TIMER_BASE + event, NRF51_EVENT_CLEAR);
 155 }
 156
 157 static void timer_set_bitmode(uint8_t mode)
 158 {
 159     writel(NRF51_TIMER_BASE + NRF51_TIMER_REG_BITMODE, mode);
 160 }
 161
 162 static void timer_set_prescaler(uint8_t prescaler)
 163 {
 164     writel(NRF51_TIMER_BASE + NRF51_TIMER_REG_PRESCALER, prescaler);
 165 }
 166
 167 static void timer_set_cc(size_t idx, uint32_t value)
 168 {
 169     writel(NRF51_TIMER_BASE + NRF51_TIMER_REG_CC0 + idx * 4, value);
 170 }
 171
 172 static void timer_assert_events(uint32_t ev0, uint32_t ev1, uint32_t ev2,
 173                                 uint32_t ev3)
 174 {
 175     g_assert(readl(NRF51_TIMER_BASE + NRF51_TIMER_EVENT_COMPARE_0) == ev0);
 176     g_assert(readl(NRF51_TIMER_BASE + NRF51_TIMER_EVENT_COMPARE_1) == ev1);
 177     g_assert(readl(NRF51_TIMER_BASE + NRF51_TIMER_EVENT_COMPARE_2) == ev2);
 178     g_assert(readl(NRF51_TIMER_BASE + NRF51_TIMER_EVENT_COMPARE_3) == ev3);
 179 }
 180
 181 static void test_nrf51_timer(void)
 182 {
 183     uint32_t steps_to_overflow = 408;
 184
 185     /* Compare Match */
 186     timer_task(NRF51_TIMER_TASK_STOP);
 187     timer_task(NRF51_TIMER_TASK_CLEAR);
 188
 189     timer_clear_event(NRF51_TIMER_EVENT_COMPARE_0);
 190     timer_clear_event(NRF51_TIMER_EVENT_COMPARE_1);
 191     timer_clear_event(NRF51_TIMER_EVENT_COMPARE_2);
 192     timer_clear_event(NRF51_TIMER_EVENT_COMPARE_3);
 193
 194     timer_set_bitmode(NRF51_TIMER_WIDTH_16); /* 16 MHz Timer */
 195     timer_set_prescaler(0);
 196     /* Swept over in first step */
 197     timer_set_cc(0, 2);
 198     /* Barely miss on first step */
 199     timer_set_cc(1, 162);
 200     /* Spot on on third step */
 201     timer_set_cc(2, 480);
 202
 203     timer_assert_events(0, 0, 0, 0);
 204
 205     timer_task(NRF51_TIMER_TASK_START);
 206     clock_step(10000);
 207     timer_assert_events(1, 0, 0, 0);
 208
 209     /* Swept over on first overflow */
 210     timer_set_cc(3, 114);
 211
 212     clock_step(10000);
 213     timer_assert_events(1, 1, 0, 0);
 214
 215     clock_step(10000);
 216     timer_assert_events(1, 1, 1, 0);
 217
 218     /* Wrap time until internal counter overflows */
 219     while (steps_to_overflow--) {
 220         timer_assert_events(1, 1, 1, 0);
 221         clock_step(10000);
 222     }
 223
 224     timer_assert_events(1, 1, 1, 1);
 225
 226     timer_clear_event(NRF51_TIMER_EVENT_COMPARE_0);
 227     timer_clear_event(NRF51_TIMER_EVENT_COMPARE_1);
 228     timer_clear_event(NRF51_TIMER_EVENT_COMPARE_2);
 229     timer_clear_event(NRF51_TIMER_EVENT_COMPARE_3);
 230     timer_assert_events(0, 0, 0, 0);
 231
 232     timer_task(NRF51_TIMER_TASK_STOP);
 233
 234     /* Test Proposal: Stop/Shutdown */
 235     /* Test Proposal: Shortcut Compare -> Clear */
 236     /* Test Proposal: Shortcut Compare -> Stop */
 237     /* Test Proposal: Counter Mode */
 238 }
 239
 240 int main(int argc, char **argv)
 241 {
 242     int ret;
 243
 244     g_test_init(&argc, &argv, NULL);
 245
 246     global_qtest = qtest_initf("-machine microbit");
 247
 248     qtest_add_func("/microbit/nrf51/gpio", test_nrf51_gpio);
 249     qtest_add_func("/microbit/nrf51/timer", test_nrf51_timer);
 250
 251     ret = g_test_run();
 252
 253     qtest_quit(global_qtest);
 254     return ret;
 255 }