include/hw/misc/nrf51_rng.h

   1 /*
   2  * nRF51 Random Number Generator
   3  *
   4  * QEMU interface:
   5  * + Property "period_unfiltered_us": Time between two biased values in
   6  *   microseconds.
   7  * + Property "period_filtered_us": Time between two unbiased values in
   8  *   microseconds.
   9  * + sysbus MMIO regions 0: Memory Region with tasks, events and registers
  10  *   to be mapped to the peripherals instance address by the SOC.
  11  * + Named GPIO output "irq": Interrupt line of the peripheral. Must be
  12  *   connected to the associated peripheral interrupt line of the NVIC.
  13  * + Named GPIO output "eep_valrdy": Event set when new random value is ready
  14  *   to be read.
  15  * + Named GPIO input "tep_start": Task that triggers start of continuous
  16  *   generation of random values.
  17  * + Named GPIO input "tep_stop": Task that ends continuous generation of
  18  *   random values.
  19  *
  20  * Accuracy of the peripheral model:
  21  * + Stochastic properties of different configurations of the random source
  22  *   are not modeled.
  23  * + Generation of unfiltered and filtered random values take at least the
  24  *   average generation time stated in the production specification;
  25  *   non-deterministic generation times are not modeled.
  26  *
  27  * Copyright 2018 Steffen Görtz <contrib@steffen-goertz.de>
  28  *
  29  * This code is licensed under the GPL version 2 or later.  See
  30  * the COPYING file in the top-level directory.
  31  *
  32  */
  33
  34 #ifndef NRF51_RNG_H
  35 #define NRF51_RNG_H
  36
  37 #include "hw/sysbus.h"
  38 #include "qemu/timer.h"
  39 #include "qom/object.h"
  40 #define TYPE_NRF51_RNG "nrf51_soc.rng"
  41 OBJECT_DECLARE_SIMPLE_TYPE(NRF51RNGState, NRF51_RNG)
  42
  43 #define NRF51_RNG_SIZE         0x1000
  44
  45 #define NRF51_RNG_TASK_START   0x000
  46 #define NRF51_RNG_TASK_STOP    0x004
  47 #define NRF51_RNG_EVENT_VALRDY 0x100
  48 #define NRF51_RNG_REG_SHORTS   0x200
  49 #define NRF51_RNG_REG_SHORTS_VALRDY_STOP 0
  50 #define NRF51_RNG_REG_INTEN    0x300
  51 #define NRF51_RNG_REG_INTEN_VALRDY 0
  52 #define NRF51_RNG_REG_INTENSET 0x304
  53 #define NRF51_RNG_REG_INTENCLR 0x308
  54 #define NRF51_RNG_REG_CONFIG   0x504
  55 #define NRF51_RNG_REG_CONFIG_DECEN 0
  56 #define NRF51_RNG_REG_VALUE    0x508
  57
  58 struct NRF51RNGState {
  59     SysBusDevice parent_obj;
  60
  61     MemoryRegion mmio;
  62     qemu_irq irq;
  63
  64     /* Event End Points */
  65     qemu_irq eep_valrdy;
  66
  67     QEMUTimer timer;
  68
  69     /* Time between generation of successive unfiltered values in us */
  70     uint16_t period_unfiltered_us;
  71     /* Time between generation of successive filtered values in us */
  72     uint16_t period_filtered_us;
  73
  74     uint8_t value;
  75
  76     uint32_t active;
  77     uint32_t event_valrdy;
  78     uint32_t shortcut_stop_on_valrdy;
  79     uint32_t interrupt_enabled;
  80     uint32_t filter_enabled;
  81
  82 };
  83
  84
  85 #endif /* NRF51_RNG_H */