2 * ARM MPS2 SCC emulation
4 * Copyright (c) 2017 Linaro Limited
5 * Written by Peter Maydell
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 or
9 * (at your option) any later version.
13 * This is a model of the Serial Communication Controller (SCC)
14 * block found in most MPS FPGA images.
17 * + sysbus MMIO region 0: the register bank
18 * + QOM property "scc-cfg4": value of the read-only CFG4 register
19 * + QOM property "scc-aid": value of the read-only SCC_AID register
20 * + QOM property "scc-id": value of the read-only SCC_ID register
21 * + QOM property "scc-cfg0": reset value of the CFG0 register
22 * + QOM property array "oscclk": reset values of the OSCCLK registers
23 * (which are accessed via the SYS_CFG channel provided by this device)
24 * + named GPIO output "remap": this tracks the value of CFG0 register
25 * bit 0. Boards where this bit controls memory remapping should
26 * connect this GPIO line to a function performing that mapping.
27 * Boards where bit 0 has no special function should leave the GPIO
28 * output disconnected.
33 #include "hw/sysbus.h"
34 #include "hw/misc/led.h"
35 #include "qom/object.h"
37 #define TYPE_MPS2_SCC "mps2-scc"
38 OBJECT_DECLARE_SIMPLE_TYPE(MPS2SCC
, MPS2_SCC
)
42 SysBusDevice parent_obj
;
63 uint32_t *oscclk_reset
;