target/riscv: support vector extension csr
[qemu/ar7.git] / accel / tcg / tcg-runtime.c
blob446465a09a46a366e5037a53f2fa3065a241278c
1 /*
2 * Tiny Code Generator for QEMU
4 * Copyright (c) 2008 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
24 #include "qemu/osdep.h"
25 #include "qemu/host-utils.h"
26 #include "cpu.h"
27 #include "exec/helper-proto.h"
28 #include "exec/cpu_ldst.h"
29 #include "exec/exec-all.h"
30 #include "exec/tb-lookup.h"
31 #include "disas/disas.h"
32 #include "exec/log.h"
33 #include "tcg/tcg.h"
35 /* 32-bit helpers */
37 int32_t HELPER(div_i32)(int32_t arg1, int32_t arg2)
39 return arg1 / arg2;
42 int32_t HELPER(rem_i32)(int32_t arg1, int32_t arg2)
44 return arg1 % arg2;
47 uint32_t HELPER(divu_i32)(uint32_t arg1, uint32_t arg2)
49 return arg1 / arg2;
52 uint32_t HELPER(remu_i32)(uint32_t arg1, uint32_t arg2)
54 return arg1 % arg2;
57 /* 64-bit helpers */
59 uint64_t HELPER(shl_i64)(uint64_t arg1, uint64_t arg2)
61 return arg1 << arg2;
64 uint64_t HELPER(shr_i64)(uint64_t arg1, uint64_t arg2)
66 return arg1 >> arg2;
69 int64_t HELPER(sar_i64)(int64_t arg1, int64_t arg2)
71 return arg1 >> arg2;
74 int64_t HELPER(div_i64)(int64_t arg1, int64_t arg2)
76 return arg1 / arg2;
79 int64_t HELPER(rem_i64)(int64_t arg1, int64_t arg2)
81 return arg1 % arg2;
84 uint64_t HELPER(divu_i64)(uint64_t arg1, uint64_t arg2)
86 return arg1 / arg2;
89 uint64_t HELPER(remu_i64)(uint64_t arg1, uint64_t arg2)
91 return arg1 % arg2;
94 uint64_t HELPER(muluh_i64)(uint64_t arg1, uint64_t arg2)
96 uint64_t l, h;
97 mulu64(&l, &h, arg1, arg2);
98 return h;
101 int64_t HELPER(mulsh_i64)(int64_t arg1, int64_t arg2)
103 uint64_t l, h;
104 muls64(&l, &h, arg1, arg2);
105 return h;
108 uint32_t HELPER(clz_i32)(uint32_t arg, uint32_t zero_val)
110 return arg ? clz32(arg) : zero_val;
113 uint32_t HELPER(ctz_i32)(uint32_t arg, uint32_t zero_val)
115 return arg ? ctz32(arg) : zero_val;
118 uint64_t HELPER(clz_i64)(uint64_t arg, uint64_t zero_val)
120 return arg ? clz64(arg) : zero_val;
123 uint64_t HELPER(ctz_i64)(uint64_t arg, uint64_t zero_val)
125 return arg ? ctz64(arg) : zero_val;
128 uint32_t HELPER(clrsb_i32)(uint32_t arg)
130 return clrsb32(arg);
133 uint64_t HELPER(clrsb_i64)(uint64_t arg)
135 return clrsb64(arg);
138 uint32_t HELPER(ctpop_i32)(uint32_t arg)
140 return ctpop32(arg);
143 uint64_t HELPER(ctpop_i64)(uint64_t arg)
145 return ctpop64(arg);
148 void *HELPER(lookup_tb_ptr)(CPUArchState *env)
150 CPUState *cpu = env_cpu(env);
151 TranslationBlock *tb;
152 target_ulong cs_base, pc;
153 uint32_t flags;
155 tb = tb_lookup__cpu_state(cpu, &pc, &cs_base, &flags, curr_cflags());
156 if (tb == NULL) {
157 return tcg_ctx->code_gen_epilogue;
159 qemu_log_mask_and_addr(CPU_LOG_EXEC, pc,
160 "Chain %d: %p ["
161 TARGET_FMT_lx "/" TARGET_FMT_lx "/%#x] %s\n",
162 cpu->cpu_index, tb->tc.ptr, cs_base, pc, flags,
163 lookup_symbol(pc));
164 return tb->tc.ptr;
167 void HELPER(exit_atomic)(CPUArchState *env)
169 cpu_loop_exit_atomic(env_cpu(env), GETPC());