1 /* opcodes/i386-dis.c r1.126 */
2 /* Print i386 instructions for GDB, the GNU debugger.
3 Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
4 2001, 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, see <http://www.gnu.org/licenses/>. */
21 /* 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
23 modified by John Hassey (hassey@dg-rtp.dg.com)
24 x86-64 support added by Jan Hubicka (jh@suse.cz)
25 VIA PadLock support by Michal Ludvig (mludvig@suse.cz). */
27 /* The main tables describing the instructions is essentially a copy
28 of the "Opcode Map" chapter (Appendix A) of the Intel 80386
29 Programmers Manual. Usually, there is a capital letter, followed
30 by a small letter. The capital letter tell the addressing mode,
31 and the small letter tells about the operand size. Refer to
32 the Intel manual for details. */
35 #include "disas/bfd.h"
36 /* include/opcode/i386.h r1.78 */
38 /* opcode/i386.h -- Intel 80386 opcode macros
39 Copyright 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
40 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
41 Free Software Foundation, Inc.
43 This file is part of GAS, the GNU Assembler, and GDB, the GNU Debugger.
45 This program is free software; you can redistribute it and/or modify
46 it under the terms of the GNU General Public License as published by
47 the Free Software Foundation; either version 2 of the License, or
48 (at your option) any later version.
50 This program is distributed in the hope that it will be useful,
51 but WITHOUT ANY WARRANTY; without even the implied warranty of
52 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
53 GNU General Public License for more details.
55 You should have received a copy of the GNU General Public License
56 along with this program; if not, see <http://www.gnu.org/licenses/>. */
58 /* The SystemV/386 SVR3.2 assembler, and probably all AT&T derived
59 ix86 Unix assemblers, generate floating point instructions with
60 reversed source and destination registers in certain cases.
61 Unfortunately, gcc and possibly many other programs use this
62 reversed syntax, so we're stuck with it.
64 eg. `fsub %st(3),%st' results in st = st - st(3) as expected, but
65 `fsub %st,%st(3)' results in st(3) = st - st(3), rather than
66 the expected st(3) = st(3) - st
68 This happens with all the non-commutative arithmetic floating point
69 operations with two register operands, where the source register is
70 %st, and destination register is %st(i).
72 The affected opcode map is dceX, dcfX, deeX, defX. */
74 #ifndef SYSV386_COMPAT
75 /* Set non-zero for broken, compatible instructions. Set to zero for
76 non-broken opcodes at your peril. gcc generates SystemV/386
77 compatible instructions. */
78 #define SYSV386_COMPAT 1
81 /* Set non-zero to cater for old (<= 2.8.1) versions of gcc that could
82 generate nonsense fsubp, fsubrp, fdivp and fdivrp with operands
84 #define OLDGCC_COMPAT SYSV386_COMPAT
87 #define MOV_AX_DISP32 0xa0
88 #define POP_SEG_SHORT 0x07
89 #define JUMP_PC_RELATIVE 0xeb
90 #define INT_OPCODE 0xcd
91 #define INT3_OPCODE 0xcc
92 /* The opcode for the fwait instruction, which disassembler treats as a
93 prefix when it can. */
94 #define FWAIT_OPCODE 0x9b
95 #define ADDR_PREFIX_OPCODE 0x67
96 #define DATA_PREFIX_OPCODE 0x66
97 #define LOCK_PREFIX_OPCODE 0xf0
98 #define CS_PREFIX_OPCODE 0x2e
99 #define DS_PREFIX_OPCODE 0x3e
100 #define ES_PREFIX_OPCODE 0x26
101 #define FS_PREFIX_OPCODE 0x64
102 #define GS_PREFIX_OPCODE 0x65
103 #define SS_PREFIX_OPCODE 0x36
104 #define REPNE_PREFIX_OPCODE 0xf2
105 #define REPE_PREFIX_OPCODE 0xf3
107 #define TWO_BYTE_OPCODE_ESCAPE 0x0f
108 #define NOP_OPCODE (char) 0x90
110 /* register numbers */
111 #define EBP_REG_NUM 5
112 #define ESP_REG_NUM 4
114 /* modrm_byte.regmem for twobyte escape */
115 #define ESCAPE_TO_TWO_BYTE_ADDRESSING ESP_REG_NUM
116 /* index_base_byte.index for no index register addressing */
117 #define NO_INDEX_REGISTER ESP_REG_NUM
118 /* index_base_byte.base for no base register addressing */
119 #define NO_BASE_REGISTER EBP_REG_NUM
120 #define NO_BASE_REGISTER_16 6
122 /* modrm.mode = REGMEM_FIELD_HAS_REG when a register is in there */
123 #define REGMEM_FIELD_HAS_REG 0x3/* always = 0x3 */
124 #define REGMEM_FIELD_HAS_MEM (~REGMEM_FIELD_HAS_REG)
126 /* x86-64 extension prefix. */
127 #define REX_OPCODE 0x40
129 /* Indicates 64 bit operand size. */
131 /* High extension to reg field of modrm byte. */
133 /* High extension to SIB index field. */
135 /* High extension to base field of modrm or SIB, or reg field of opcode. */
138 /* max operands per insn */
139 #define MAX_OPERANDS 4
141 /* max immediates per insn (lcall, ljmp, insertq, extrq) */
142 #define MAX_IMMEDIATE_OPERANDS 2
144 /* max memory refs per insn (string ops) */
145 #define MAX_MEMORY_OPERANDS 2
147 /* max size of insn mnemonics. */
148 #define MAX_MNEM_SIZE 16
150 /* max size of register name in insn mnemonics. */
151 #define MAX_REG_NAME_SIZE 8
153 /* opcodes/i386-dis.c r1.126 */
154 #include "qemu-common.h"
158 static int fetch_data2(struct disassemble_info
*, bfd_byte
*);
159 static int fetch_data(struct disassemble_info
*, bfd_byte
*);
160 static void ckprefix (void);
161 static const char *prefix_name (int, int);
162 static int print_insn (bfd_vma
, disassemble_info
*);
163 static void dofloat (int);
164 static void OP_ST (int, int);
165 static void OP_STi (int, int);
166 static int putop (const char *, int);
167 static void oappend (const char *);
168 static void append_seg (void);
169 static void OP_indirE (int, int);
170 static void print_operand_value (char *buf
, size_t bufsize
, int hex
, bfd_vma disp
);
171 static void print_displacement (char *, bfd_vma
);
172 static void OP_E (int, int);
173 static void OP_G (int, int);
174 static bfd_vma
get64 (void);
175 static bfd_signed_vma
get32 (void);
176 static bfd_signed_vma
get32s (void);
177 static int get16 (void);
178 static void set_op (bfd_vma
, int);
179 static void OP_REG (int, int);
180 static void OP_IMREG (int, int);
181 static void OP_I (int, int);
182 static void OP_I64 (int, int);
183 static void OP_sI (int, int);
184 static void OP_J (int, int);
185 static void OP_SEG (int, int);
186 static void OP_DIR (int, int);
187 static void OP_OFF (int, int);
188 static void OP_OFF64 (int, int);
189 static void ptr_reg (int, int);
190 static void OP_ESreg (int, int);
191 static void OP_DSreg (int, int);
192 static void OP_C (int, int);
193 static void OP_D (int, int);
194 static void OP_T (int, int);
195 static void OP_R (int, int);
196 static void OP_MMX (int, int);
197 static void OP_XMM (int, int);
198 static void OP_EM (int, int);
199 static void OP_EX (int, int);
200 static void OP_EMC (int,int);
201 static void OP_MXC (int,int);
202 static void OP_MS (int, int);
203 static void OP_XS (int, int);
204 static void OP_M (int, int);
205 static void OP_VMX (int, int);
206 static void OP_0fae (int, int);
207 static void OP_0f07 (int, int);
208 static void NOP_Fixup1 (int, int);
209 static void NOP_Fixup2 (int, int);
210 static void OP_3DNowSuffix (int, int);
211 static void OP_SIMD_Suffix (int, int);
212 static void SIMD_Fixup (int, int);
213 static void PNI_Fixup (int, int);
214 static void SVME_Fixup (int, int);
215 static void INVLPG_Fixup (int, int);
216 static void BadOp (void);
217 static void VMX_Fixup (int, int);
218 static void REP_Fixup (int, int);
219 static void CMPXCHG8B_Fixup (int, int);
220 static void XMM_Fixup (int, int);
221 static void CRC32_Fixup (int, int);
224 /* Points to first byte not fetched. */
225 bfd_byte
*max_fetched
;
226 bfd_byte the_buffer
[MAX_MNEM_SIZE
];
239 static enum address_mode address_mode
;
241 /* Flags for the prefixes for the current instruction. See below. */
244 /* REX prefix the current instruction. See below. */
246 /* Bits of REX we've already used. */
248 /* Mark parts used in the REX prefix. When we are testing for
249 empty prefix (for 8bit register REX extension), just mask it
250 out. Otherwise test for REX bit is excuse for existence of REX
251 only in case value is nonzero. */
252 #define USED_REX(value) \
257 rex_used |= (value) | REX_OPCODE; \
260 rex_used |= REX_OPCODE; \
263 /* Flags for prefixes which we somehow handled when printing the
264 current instruction. */
265 static int used_prefixes
;
267 /* Flags stored in PREFIXES. */
268 #define PREFIX_REPZ 1
269 #define PREFIX_REPNZ 2
270 #define PREFIX_LOCK 4
272 #define PREFIX_SS 0x10
273 #define PREFIX_DS 0x20
274 #define PREFIX_ES 0x40
275 #define PREFIX_FS 0x80
276 #define PREFIX_GS 0x100
277 #define PREFIX_DATA 0x200
278 #define PREFIX_ADDR 0x400
279 #define PREFIX_FWAIT 0x800
281 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
282 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
285 fetch_data2(struct disassemble_info
*info
, bfd_byte
*addr
)
288 struct dis_private
*priv
= (struct dis_private
*) info
->private_data
;
289 bfd_vma start
= priv
->insn_start
+ (priv
->max_fetched
- priv
->the_buffer
);
291 if (addr
<= priv
->the_buffer
+ MAX_MNEM_SIZE
)
292 status
= (*info
->read_memory_func
) (start
,
294 addr
- priv
->max_fetched
,
300 /* If we did manage to read at least one byte, then
301 print_insn_i386 will do something sensible. Otherwise, print
302 an error. We do that here because this is where we know
304 if (priv
->max_fetched
== priv
->the_buffer
)
305 (*info
->memory_error_func
) (status
, start
, info
);
306 siglongjmp(priv
->bailout
, 1);
309 priv
->max_fetched
= addr
;
314 fetch_data(struct disassemble_info
*info
, bfd_byte
*addr
)
316 if (addr
<= ((struct dis_private
*) (info
->private_data
))->max_fetched
) {
319 return fetch_data2(info
, addr
);
324 #define XX { NULL, 0 }
326 #define Eb { OP_E, b_mode }
327 #define Ev { OP_E, v_mode }
328 #define Ed { OP_E, d_mode }
329 #define Edq { OP_E, dq_mode }
330 #define Edqw { OP_E, dqw_mode }
331 #define Edqb { OP_E, dqb_mode }
332 #define Edqd { OP_E, dqd_mode }
333 #define indirEv { OP_indirE, stack_v_mode }
334 #define indirEp { OP_indirE, f_mode }
335 #define stackEv { OP_E, stack_v_mode }
336 #define Em { OP_E, m_mode }
337 #define Ew { OP_E, w_mode }
338 #define M { OP_M, 0 } /* lea, lgdt, etc. */
339 #define Ma { OP_M, v_mode }
340 #define Mp { OP_M, f_mode } /* 32 or 48 bit memory operand for LDS, LES etc */
341 #define Mq { OP_M, q_mode }
342 #define Gb { OP_G, b_mode }
343 #define Gv { OP_G, v_mode }
344 #define Gd { OP_G, d_mode }
345 #define Gdq { OP_G, dq_mode }
346 #define Gm { OP_G, m_mode }
347 #define Gw { OP_G, w_mode }
348 #define Rd { OP_R, d_mode }
349 #define Rm { OP_R, m_mode }
350 #define Ib { OP_I, b_mode }
351 #define sIb { OP_sI, b_mode } /* sign extened byte */
352 #define Iv { OP_I, v_mode }
353 #define Iq { OP_I, q_mode }
354 #define Iv64 { OP_I64, v_mode }
355 #define Iw { OP_I, w_mode }
356 #define I1 { OP_I, const_1_mode }
357 #define Jb { OP_J, b_mode }
358 #define Jv { OP_J, v_mode }
359 #define Cm { OP_C, m_mode }
360 #define Dm { OP_D, m_mode }
361 #define Td { OP_T, d_mode }
363 #define RMeAX { OP_REG, eAX_reg }
364 #define RMeBX { OP_REG, eBX_reg }
365 #define RMeCX { OP_REG, eCX_reg }
366 #define RMeDX { OP_REG, eDX_reg }
367 #define RMeSP { OP_REG, eSP_reg }
368 #define RMeBP { OP_REG, eBP_reg }
369 #define RMeSI { OP_REG, eSI_reg }
370 #define RMeDI { OP_REG, eDI_reg }
371 #define RMrAX { OP_REG, rAX_reg }
372 #define RMrBX { OP_REG, rBX_reg }
373 #define RMrCX { OP_REG, rCX_reg }
374 #define RMrDX { OP_REG, rDX_reg }
375 #define RMrSP { OP_REG, rSP_reg }
376 #define RMrBP { OP_REG, rBP_reg }
377 #define RMrSI { OP_REG, rSI_reg }
378 #define RMrDI { OP_REG, rDI_reg }
379 #define RMAL { OP_REG, al_reg }
380 #define RMAL { OP_REG, al_reg }
381 #define RMCL { OP_REG, cl_reg }
382 #define RMDL { OP_REG, dl_reg }
383 #define RMBL { OP_REG, bl_reg }
384 #define RMAH { OP_REG, ah_reg }
385 #define RMCH { OP_REG, ch_reg }
386 #define RMDH { OP_REG, dh_reg }
387 #define RMBH { OP_REG, bh_reg }
388 #define RMAX { OP_REG, ax_reg }
389 #define RMDX { OP_REG, dx_reg }
391 #define eAX { OP_IMREG, eAX_reg }
392 #define eBX { OP_IMREG, eBX_reg }
393 #define eCX { OP_IMREG, eCX_reg }
394 #define eDX { OP_IMREG, eDX_reg }
395 #define eSP { OP_IMREG, eSP_reg }
396 #define eBP { OP_IMREG, eBP_reg }
397 #define eSI { OP_IMREG, eSI_reg }
398 #define eDI { OP_IMREG, eDI_reg }
399 #define AL { OP_IMREG, al_reg }
400 #define CL { OP_IMREG, cl_reg }
401 #define DL { OP_IMREG, dl_reg }
402 #define BL { OP_IMREG, bl_reg }
403 #define AH { OP_IMREG, ah_reg }
404 #define CH { OP_IMREG, ch_reg }
405 #define DH { OP_IMREG, dh_reg }
406 #define BH { OP_IMREG, bh_reg }
407 #define AX { OP_IMREG, ax_reg }
408 #define DX { OP_IMREG, dx_reg }
409 #define zAX { OP_IMREG, z_mode_ax_reg }
410 #define indirDX { OP_IMREG, indir_dx_reg }
412 #define Sw { OP_SEG, w_mode }
413 #define Sv { OP_SEG, v_mode }
414 #define Ap { OP_DIR, 0 }
415 #define Ob { OP_OFF64, b_mode }
416 #define Ov { OP_OFF64, v_mode }
417 #define Xb { OP_DSreg, eSI_reg }
418 #define Xv { OP_DSreg, eSI_reg }
419 #define Xz { OP_DSreg, eSI_reg }
420 #define Yb { OP_ESreg, eDI_reg }
421 #define Yv { OP_ESreg, eDI_reg }
422 #define DSBX { OP_DSreg, eBX_reg }
424 #define es { OP_REG, es_reg }
425 #define ss { OP_REG, ss_reg }
426 #define cs { OP_REG, cs_reg }
427 #define ds { OP_REG, ds_reg }
428 #define fs { OP_REG, fs_reg }
429 #define gs { OP_REG, gs_reg }
431 #define MX { OP_MMX, 0 }
432 #define XM { OP_XMM, 0 }
433 #define EM { OP_EM, v_mode }
434 #define EMd { OP_EM, d_mode }
435 #define EMq { OP_EM, q_mode }
436 #define EXd { OP_EX, d_mode }
437 #define EXq { OP_EX, q_mode }
438 #define EXx { OP_EX, x_mode }
439 #define MS { OP_MS, v_mode }
440 #define XS { OP_XS, v_mode }
441 #define EMC { OP_EMC, v_mode }
442 #define MXC { OP_MXC, 0 }
443 #define VM { OP_VMX, q_mode }
444 #define OPSUF { OP_3DNowSuffix, 0 }
445 #define OPSIMD { OP_SIMD_Suffix, 0 }
446 #define XMM0 { XMM_Fixup, 0 }
448 /* Used handle "rep" prefix for string instructions. */
449 #define Xbr { REP_Fixup, eSI_reg }
450 #define Xvr { REP_Fixup, eSI_reg }
451 #define Ybr { REP_Fixup, eDI_reg }
452 #define Yvr { REP_Fixup, eDI_reg }
453 #define Yzr { REP_Fixup, eDI_reg }
454 #define indirDXr { REP_Fixup, indir_dx_reg }
455 #define ALr { REP_Fixup, al_reg }
456 #define eAXr { REP_Fixup, eAX_reg }
458 #define cond_jump_flag { NULL, cond_jump_mode }
459 #define loop_jcxz_flag { NULL, loop_jcxz_mode }
461 /* bits in sizeflag */
462 #define SUFFIX_ALWAYS 4
466 #define b_mode 1 /* byte operand */
467 #define v_mode 2 /* operand size depends on prefixes */
468 #define w_mode 3 /* word operand */
469 #define d_mode 4 /* double word operand */
470 #define q_mode 5 /* quad word operand */
471 #define t_mode 6 /* ten-byte operand */
472 #define x_mode 7 /* 16-byte XMM operand */
473 #define m_mode 8 /* d_mode in 32bit, q_mode in 64bit mode. */
474 #define cond_jump_mode 9
475 #define loop_jcxz_mode 10
476 #define dq_mode 11 /* operand size depends on REX prefixes. */
477 #define dqw_mode 12 /* registers like dq_mode, memory like w_mode. */
478 #define f_mode 13 /* 4- or 6-byte pointer operand */
479 #define const_1_mode 14
480 #define stack_v_mode 15 /* v_mode for stack-related opcodes. */
481 #define z_mode 16 /* non-quad operand size depends on prefixes */
482 #define o_mode 17 /* 16-byte operand */
483 #define dqb_mode 18 /* registers like dq_mode, memory like b_mode. */
484 #define dqd_mode 19 /* registers like dq_mode, memory like d_mode. */
529 #define z_mode_ax_reg 149
530 #define indir_dx_reg 150
534 #define USE_PREFIX_USER_TABLE 3
535 #define X86_64_SPECIAL 4
536 #define IS_3BYTE_OPCODE 5
538 #define FLOAT NULL, { { NULL, FLOATCODE } }
540 #define GRP1a NULL, { { NULL, USE_GROUPS }, { NULL, 0 } }
541 #define GRP1b NULL, { { NULL, USE_GROUPS }, { NULL, 1 } }
542 #define GRP1S NULL, { { NULL, USE_GROUPS }, { NULL, 2 } }
543 #define GRP1Ss NULL, { { NULL, USE_GROUPS }, { NULL, 3 } }
544 #define GRP2b NULL, { { NULL, USE_GROUPS }, { NULL, 4 } }
545 #define GRP2S NULL, { { NULL, USE_GROUPS }, { NULL, 5 } }
546 #define GRP2b_one NULL, { { NULL, USE_GROUPS }, { NULL, 6 } }
547 #define GRP2S_one NULL, { { NULL, USE_GROUPS }, { NULL, 7 } }
548 #define GRP2b_cl NULL, { { NULL, USE_GROUPS }, { NULL, 8 } }
549 #define GRP2S_cl NULL, { { NULL, USE_GROUPS }, { NULL, 9 } }
550 #define GRP3b NULL, { { NULL, USE_GROUPS }, { NULL, 10 } }
551 #define GRP3S NULL, { { NULL, USE_GROUPS }, { NULL, 11 } }
552 #define GRP4 NULL, { { NULL, USE_GROUPS }, { NULL, 12 } }
553 #define GRP5 NULL, { { NULL, USE_GROUPS }, { NULL, 13 } }
554 #define GRP6 NULL, { { NULL, USE_GROUPS }, { NULL, 14 } }
555 #define GRP7 NULL, { { NULL, USE_GROUPS }, { NULL, 15 } }
556 #define GRP8 NULL, { { NULL, USE_GROUPS }, { NULL, 16 } }
557 #define GRP9 NULL, { { NULL, USE_GROUPS }, { NULL, 17 } }
558 #define GRP11_C6 NULL, { { NULL, USE_GROUPS }, { NULL, 18 } }
559 #define GRP11_C7 NULL, { { NULL, USE_GROUPS }, { NULL, 19 } }
560 #define GRP12 NULL, { { NULL, USE_GROUPS }, { NULL, 20 } }
561 #define GRP13 NULL, { { NULL, USE_GROUPS }, { NULL, 21 } }
562 #define GRP14 NULL, { { NULL, USE_GROUPS }, { NULL, 22 } }
563 #define GRP15 NULL, { { NULL, USE_GROUPS }, { NULL, 23 } }
564 #define GRP16 NULL, { { NULL, USE_GROUPS }, { NULL, 24 } }
565 #define GRPAMD NULL, { { NULL, USE_GROUPS }, { NULL, 25 } }
566 #define GRPPADLCK1 NULL, { { NULL, USE_GROUPS }, { NULL, 26 } }
567 #define GRPPADLCK2 NULL, { { NULL, USE_GROUPS }, { NULL, 27 } }
569 #define PREGRP0 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 0 } }
570 #define PREGRP1 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 1 } }
571 #define PREGRP2 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 2 } }
572 #define PREGRP3 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 3 } }
573 #define PREGRP4 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 4 } }
574 #define PREGRP5 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 5 } }
575 #define PREGRP6 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 6 } }
576 #define PREGRP7 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 7 } }
577 #define PREGRP8 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 8 } }
578 #define PREGRP9 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 9 } }
579 #define PREGRP10 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 10 } }
580 #define PREGRP11 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 11 } }
581 #define PREGRP12 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 12 } }
582 #define PREGRP13 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 13 } }
583 #define PREGRP14 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 14 } }
584 #define PREGRP15 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 15 } }
585 #define PREGRP16 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 16 } }
586 #define PREGRP17 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 17 } }
587 #define PREGRP18 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 18 } }
588 #define PREGRP19 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 19 } }
589 #define PREGRP20 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 20 } }
590 #define PREGRP21 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 21 } }
591 #define PREGRP22 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 22 } }
592 #define PREGRP23 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 23 } }
593 #define PREGRP24 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 24 } }
594 #define PREGRP25 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 25 } }
595 #define PREGRP26 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 26 } }
596 #define PREGRP27 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 27 } }
597 #define PREGRP28 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 28 } }
598 #define PREGRP29 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 29 } }
599 #define PREGRP30 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 30 } }
600 #define PREGRP31 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 31 } }
601 #define PREGRP32 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 32 } }
602 #define PREGRP33 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 33 } }
603 #define PREGRP34 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 34 } }
604 #define PREGRP35 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 35 } }
605 #define PREGRP36 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 36 } }
606 #define PREGRP37 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 37 } }
607 #define PREGRP38 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 38 } }
608 #define PREGRP39 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 39 } }
609 #define PREGRP40 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 40 } }
610 #define PREGRP41 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 41 } }
611 #define PREGRP42 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 42 } }
612 #define PREGRP43 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 43 } }
613 #define PREGRP44 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 44 } }
614 #define PREGRP45 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 45 } }
615 #define PREGRP46 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 46 } }
616 #define PREGRP47 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 47 } }
617 #define PREGRP48 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 48 } }
618 #define PREGRP49 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 49 } }
619 #define PREGRP50 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 50 } }
620 #define PREGRP51 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 51 } }
621 #define PREGRP52 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 52 } }
622 #define PREGRP53 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 53 } }
623 #define PREGRP54 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 54 } }
624 #define PREGRP55 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 55 } }
625 #define PREGRP56 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 56 } }
626 #define PREGRP57 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 57 } }
627 #define PREGRP58 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 58 } }
628 #define PREGRP59 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 59 } }
629 #define PREGRP60 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 60 } }
630 #define PREGRP61 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 61 } }
631 #define PREGRP62 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 62 } }
632 #define PREGRP63 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 63 } }
633 #define PREGRP64 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 64 } }
634 #define PREGRP65 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 65 } }
635 #define PREGRP66 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 66 } }
636 #define PREGRP67 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 67 } }
637 #define PREGRP68 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 68 } }
638 #define PREGRP69 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 69 } }
639 #define PREGRP70 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 70 } }
640 #define PREGRP71 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 71 } }
641 #define PREGRP72 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 72 } }
642 #define PREGRP73 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 73 } }
643 #define PREGRP74 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 74 } }
644 #define PREGRP75 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 75 } }
645 #define PREGRP76 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 76 } }
646 #define PREGRP77 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 77 } }
647 #define PREGRP78 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 78 } }
648 #define PREGRP79 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 79 } }
649 #define PREGRP80 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 80 } }
650 #define PREGRP81 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 81 } }
651 #define PREGRP82 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 82 } }
652 #define PREGRP83 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 83 } }
653 #define PREGRP84 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 84 } }
654 #define PREGRP85 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 85 } }
655 #define PREGRP86 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 86 } }
656 #define PREGRP87 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 87 } }
657 #define PREGRP88 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 88 } }
658 #define PREGRP89 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 89 } }
659 #define PREGRP90 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 90 } }
660 #define PREGRP91 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 91 } }
661 #define PREGRP92 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 92 } }
662 #define PREGRP93 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 93 } }
663 #define PREGRP94 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 94 } }
664 #define PREGRP95 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 95 } }
665 #define PREGRP96 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 96 } }
666 #define PREGRP97 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 97 } }
667 #define PREGRP98 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 98 } }
670 #define X86_64_0 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 0 } }
671 #define X86_64_1 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 1 } }
672 #define X86_64_2 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 2 } }
673 #define X86_64_3 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 3 } }
675 #define THREE_BYTE_0 NULL, { { NULL, IS_3BYTE_OPCODE }, { NULL, 0 } }
676 #define THREE_BYTE_1 NULL, { { NULL, IS_3BYTE_OPCODE }, { NULL, 1 } }
678 typedef void (*op_rtn
) (int bytemode
, int sizeflag
);
689 /* Upper case letters in the instruction names here are macros.
690 'A' => print 'b' if no register operands or suffix_always is true
691 'B' => print 'b' if suffix_always is true
692 'C' => print 's' or 'l' ('w' or 'd' in Intel mode) depending on operand
694 'D' => print 'w' if no register operands or 'w', 'l' or 'q', if
695 . suffix_always is true
696 'E' => print 'e' if 32-bit form of jcxz
697 'F' => print 'w' or 'l' depending on address size prefix (loop insns)
698 'G' => print 'w' or 'l' depending on operand size prefix (i/o insns)
699 'H' => print ",pt" or ",pn" branch hint
700 'I' => honor following macro letter even in Intel mode (implemented only
701 . for some of the macro letters)
703 'K' => print 'd' or 'q' if rex prefix is present.
704 'L' => print 'l' if suffix_always is true
705 'N' => print 'n' if instruction has no wait "prefix"
706 'O' => print 'd' or 'o' (or 'q' in Intel mode)
707 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
708 . or suffix_always is true. print 'q' if rex prefix is present.
709 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always
711 'R' => print 'w', 'l' or 'q' ('d' for 'l' and 'e' in Intel mode)
712 'S' => print 'w', 'l' or 'q' if suffix_always is true
713 'T' => print 'q' in 64bit mode and behave as 'P' otherwise
714 'U' => print 'q' in 64bit mode and behave as 'Q' otherwise
715 'V' => print 'q' in 64bit mode and behave as 'S' otherwise
716 'W' => print 'b', 'w' or 'l' ('d' in Intel mode)
717 'X' => print 's', 'd' depending on data16 prefix (for XMM)
718 'Y' => 'q' if instruction has an REX 64bit overwrite prefix
719 'Z' => print 'q' in 64bit mode and behave as 'L' otherwise
721 Many of the above letters print nothing in Intel mode. See "putop"
724 Braces '{' and '}', and vertical bars '|', indicate alternative
725 mnemonic strings for AT&T, Intel, X86_64 AT&T, and X86_64 Intel
726 modes. In cases where there are only two alternatives, the X86_64
727 instruction is reserved, and "(bad)" is printed.
730 static const struct dis386 dis386
[] = {
732 { "addB", { Eb
, Gb
} },
733 { "addS", { Ev
, Gv
} },
734 { "addB", { Gb
, Eb
} },
735 { "addS", { Gv
, Ev
} },
736 { "addB", { AL
, Ib
} },
737 { "addS", { eAX
, Iv
} },
738 { "push{T|}", { es
} },
739 { "pop{T|}", { es
} },
741 { "orB", { Eb
, Gb
} },
742 { "orS", { Ev
, Gv
} },
743 { "orB", { Gb
, Eb
} },
744 { "orS", { Gv
, Ev
} },
745 { "orB", { AL
, Ib
} },
746 { "orS", { eAX
, Iv
} },
747 { "push{T|}", { cs
} },
748 { "(bad)", { XX
} }, /* 0x0f extended opcode escape */
750 { "adcB", { Eb
, Gb
} },
751 { "adcS", { Ev
, Gv
} },
752 { "adcB", { Gb
, Eb
} },
753 { "adcS", { Gv
, Ev
} },
754 { "adcB", { AL
, Ib
} },
755 { "adcS", { eAX
, Iv
} },
756 { "push{T|}", { ss
} },
757 { "pop{T|}", { ss
} },
759 { "sbbB", { Eb
, Gb
} },
760 { "sbbS", { Ev
, Gv
} },
761 { "sbbB", { Gb
, Eb
} },
762 { "sbbS", { Gv
, Ev
} },
763 { "sbbB", { AL
, Ib
} },
764 { "sbbS", { eAX
, Iv
} },
765 { "push{T|}", { ds
} },
766 { "pop{T|}", { ds
} },
768 { "andB", { Eb
, Gb
} },
769 { "andS", { Ev
, Gv
} },
770 { "andB", { Gb
, Eb
} },
771 { "andS", { Gv
, Ev
} },
772 { "andB", { AL
, Ib
} },
773 { "andS", { eAX
, Iv
} },
774 { "(bad)", { XX
} }, /* SEG ES prefix */
775 { "daa{|}", { XX
} },
777 { "subB", { Eb
, Gb
} },
778 { "subS", { Ev
, Gv
} },
779 { "subB", { Gb
, Eb
} },
780 { "subS", { Gv
, Ev
} },
781 { "subB", { AL
, Ib
} },
782 { "subS", { eAX
, Iv
} },
783 { "(bad)", { XX
} }, /* SEG CS prefix */
784 { "das{|}", { XX
} },
786 { "xorB", { Eb
, Gb
} },
787 { "xorS", { Ev
, Gv
} },
788 { "xorB", { Gb
, Eb
} },
789 { "xorS", { Gv
, Ev
} },
790 { "xorB", { AL
, Ib
} },
791 { "xorS", { eAX
, Iv
} },
792 { "(bad)", { XX
} }, /* SEG SS prefix */
793 { "aaa{|}", { XX
} },
795 { "cmpB", { Eb
, Gb
} },
796 { "cmpS", { Ev
, Gv
} },
797 { "cmpB", { Gb
, Eb
} },
798 { "cmpS", { Gv
, Ev
} },
799 { "cmpB", { AL
, Ib
} },
800 { "cmpS", { eAX
, Iv
} },
801 { "(bad)", { XX
} }, /* SEG DS prefix */
802 { "aas{|}", { XX
} },
804 { "inc{S|}", { RMeAX
} },
805 { "inc{S|}", { RMeCX
} },
806 { "inc{S|}", { RMeDX
} },
807 { "inc{S|}", { RMeBX
} },
808 { "inc{S|}", { RMeSP
} },
809 { "inc{S|}", { RMeBP
} },
810 { "inc{S|}", { RMeSI
} },
811 { "inc{S|}", { RMeDI
} },
813 { "dec{S|}", { RMeAX
} },
814 { "dec{S|}", { RMeCX
} },
815 { "dec{S|}", { RMeDX
} },
816 { "dec{S|}", { RMeBX
} },
817 { "dec{S|}", { RMeSP
} },
818 { "dec{S|}", { RMeBP
} },
819 { "dec{S|}", { RMeSI
} },
820 { "dec{S|}", { RMeDI
} },
822 { "pushV", { RMrAX
} },
823 { "pushV", { RMrCX
} },
824 { "pushV", { RMrDX
} },
825 { "pushV", { RMrBX
} },
826 { "pushV", { RMrSP
} },
827 { "pushV", { RMrBP
} },
828 { "pushV", { RMrSI
} },
829 { "pushV", { RMrDI
} },
831 { "popV", { RMrAX
} },
832 { "popV", { RMrCX
} },
833 { "popV", { RMrDX
} },
834 { "popV", { RMrBX
} },
835 { "popV", { RMrSP
} },
836 { "popV", { RMrBP
} },
837 { "popV", { RMrSI
} },
838 { "popV", { RMrDI
} },
844 { "(bad)", { XX
} }, /* seg fs */
845 { "(bad)", { XX
} }, /* seg gs */
846 { "(bad)", { XX
} }, /* op size prefix */
847 { "(bad)", { XX
} }, /* adr size prefix */
850 { "imulS", { Gv
, Ev
, Iv
} },
851 { "pushT", { sIb
} },
852 { "imulS", { Gv
, Ev
, sIb
} },
853 { "ins{b||b|}", { Ybr
, indirDX
} },
854 { "ins{R||G|}", { Yzr
, indirDX
} },
855 { "outs{b||b|}", { indirDXr
, Xb
} },
856 { "outs{R||G|}", { indirDXr
, Xz
} },
858 { "joH", { Jb
, XX
, cond_jump_flag
} },
859 { "jnoH", { Jb
, XX
, cond_jump_flag
} },
860 { "jbH", { Jb
, XX
, cond_jump_flag
} },
861 { "jaeH", { Jb
, XX
, cond_jump_flag
} },
862 { "jeH", { Jb
, XX
, cond_jump_flag
} },
863 { "jneH", { Jb
, XX
, cond_jump_flag
} },
864 { "jbeH", { Jb
, XX
, cond_jump_flag
} },
865 { "jaH", { Jb
, XX
, cond_jump_flag
} },
867 { "jsH", { Jb
, XX
, cond_jump_flag
} },
868 { "jnsH", { Jb
, XX
, cond_jump_flag
} },
869 { "jpH", { Jb
, XX
, cond_jump_flag
} },
870 { "jnpH", { Jb
, XX
, cond_jump_flag
} },
871 { "jlH", { Jb
, XX
, cond_jump_flag
} },
872 { "jgeH", { Jb
, XX
, cond_jump_flag
} },
873 { "jleH", { Jb
, XX
, cond_jump_flag
} },
874 { "jgH", { Jb
, XX
, cond_jump_flag
} },
880 { "testB", { Eb
, Gb
} },
881 { "testS", { Ev
, Gv
} },
882 { "xchgB", { Eb
, Gb
} },
883 { "xchgS", { Ev
, Gv
} },
885 { "movB", { Eb
, Gb
} },
886 { "movS", { Ev
, Gv
} },
887 { "movB", { Gb
, Eb
} },
888 { "movS", { Gv
, Ev
} },
889 { "movD", { Sv
, Sw
} },
890 { "leaS", { Gv
, M
} },
891 { "movD", { Sw
, Sv
} },
895 { "xchgS", { RMeCX
, eAX
} },
896 { "xchgS", { RMeDX
, eAX
} },
897 { "xchgS", { RMeBX
, eAX
} },
898 { "xchgS", { RMeSP
, eAX
} },
899 { "xchgS", { RMeBP
, eAX
} },
900 { "xchgS", { RMeSI
, eAX
} },
901 { "xchgS", { RMeDI
, eAX
} },
903 { "cW{t||t|}R", { XX
} },
904 { "cR{t||t|}O", { XX
} },
905 { "Jcall{T|}", { Ap
} },
906 { "(bad)", { XX
} }, /* fwait */
907 { "pushfT", { XX
} },
909 { "sahf{|}", { XX
} },
910 { "lahf{|}", { XX
} },
912 { "movB", { AL
, Ob
} },
913 { "movS", { eAX
, Ov
} },
914 { "movB", { Ob
, AL
} },
915 { "movS", { Ov
, eAX
} },
916 { "movs{b||b|}", { Ybr
, Xb
} },
917 { "movs{R||R|}", { Yvr
, Xv
} },
918 { "cmps{b||b|}", { Xb
, Yb
} },
919 { "cmps{R||R|}", { Xv
, Yv
} },
921 { "testB", { AL
, Ib
} },
922 { "testS", { eAX
, Iv
} },
923 { "stosB", { Ybr
, AL
} },
924 { "stosS", { Yvr
, eAX
} },
925 { "lodsB", { ALr
, Xb
} },
926 { "lodsS", { eAXr
, Xv
} },
927 { "scasB", { AL
, Yb
} },
928 { "scasS", { eAX
, Yv
} },
930 { "movB", { RMAL
, Ib
} },
931 { "movB", { RMCL
, Ib
} },
932 { "movB", { RMDL
, Ib
} },
933 { "movB", { RMBL
, Ib
} },
934 { "movB", { RMAH
, Ib
} },
935 { "movB", { RMCH
, Ib
} },
936 { "movB", { RMDH
, Ib
} },
937 { "movB", { RMBH
, Ib
} },
939 { "movS", { RMeAX
, Iv64
} },
940 { "movS", { RMeCX
, Iv64
} },
941 { "movS", { RMeDX
, Iv64
} },
942 { "movS", { RMeBX
, Iv64
} },
943 { "movS", { RMeSP
, Iv64
} },
944 { "movS", { RMeBP
, Iv64
} },
945 { "movS", { RMeSI
, Iv64
} },
946 { "movS", { RMeDI
, Iv64
} },
952 { "les{S|}", { Gv
, Mp
} },
953 { "ldsS", { Gv
, Mp
} },
957 { "enterT", { Iw
, Ib
} },
958 { "leaveT", { XX
} },
963 { "into{|}", { XX
} },
970 { "aam{|}", { sIb
} },
971 { "aad{|}", { sIb
} },
973 { "xlat", { DSBX
} },
984 { "loopneFH", { Jb
, XX
, loop_jcxz_flag
} },
985 { "loopeFH", { Jb
, XX
, loop_jcxz_flag
} },
986 { "loopFH", { Jb
, XX
, loop_jcxz_flag
} },
987 { "jEcxzH", { Jb
, XX
, loop_jcxz_flag
} },
988 { "inB", { AL
, Ib
} },
989 { "inG", { zAX
, Ib
} },
990 { "outB", { Ib
, AL
} },
991 { "outG", { Ib
, zAX
} },
995 { "Jjmp{T|}", { Ap
} },
997 { "inB", { AL
, indirDX
} },
998 { "inG", { zAX
, indirDX
} },
999 { "outB", { indirDX
, AL
} },
1000 { "outG", { indirDX
, zAX
} },
1002 { "(bad)", { XX
} }, /* lock prefix */
1003 { "icebp", { XX
} },
1004 { "(bad)", { XX
} }, /* repne */
1005 { "(bad)", { XX
} }, /* repz */
1021 static const struct dis386 dis386_twobyte
[] = {
1025 { "larS", { Gv
, Ew
} },
1026 { "lslS", { Gv
, Ew
} },
1027 { "(bad)", { XX
} },
1028 { "syscall", { XX
} },
1030 { "sysretP", { XX
} },
1033 { "wbinvd", { XX
} },
1034 { "(bad)", { XX
} },
1036 { "(bad)", { XX
} },
1038 { "femms", { XX
} },
1039 { "", { MX
, EM
, OPSUF
} }, /* See OP_3DNowSuffix. */
1044 { "movlpX", { EXq
, XM
, { SIMD_Fixup
, 'h' } } },
1045 { "unpcklpX", { XM
, EXq
} },
1046 { "unpckhpX", { XM
, EXq
} },
1048 { "movhpX", { EXq
, XM
, { SIMD_Fixup
, 'l' } } },
1051 { "(bad)", { XX
} },
1052 { "(bad)", { XX
} },
1053 { "(bad)", { XX
} },
1054 { "(bad)", { XX
} },
1055 { "(bad)", { XX
} },
1056 { "(bad)", { XX
} },
1059 { "movZ", { Rm
, Cm
} },
1060 { "movZ", { Rm
, Dm
} },
1061 { "movZ", { Cm
, Rm
} },
1062 { "movZ", { Dm
, Rm
} },
1063 { "movL", { Rd
, Td
} },
1064 { "(bad)", { XX
} },
1065 { "movL", { Td
, Rd
} },
1066 { "(bad)", { XX
} },
1068 { "movapX", { XM
, EXx
} },
1069 { "movapX", { EXx
, XM
} },
1077 { "wrmsr", { XX
} },
1078 { "rdtsc", { XX
} },
1079 { "rdmsr", { XX
} },
1080 { "rdpmc", { XX
} },
1081 { "sysenter", { XX
} },
1082 { "sysexit", { XX
} },
1083 { "(bad)", { XX
} },
1084 { "(bad)", { XX
} },
1087 { "(bad)", { XX
} },
1089 { "(bad)", { XX
} },
1090 { "(bad)", { XX
} },
1091 { "(bad)", { XX
} },
1092 { "(bad)", { XX
} },
1093 { "(bad)", { XX
} },
1095 { "cmovo", { Gv
, Ev
} },
1096 { "cmovno", { Gv
, Ev
} },
1097 { "cmovb", { Gv
, Ev
} },
1098 { "cmovae", { Gv
, Ev
} },
1099 { "cmove", { Gv
, Ev
} },
1100 { "cmovne", { Gv
, Ev
} },
1101 { "cmovbe", { Gv
, Ev
} },
1102 { "cmova", { Gv
, Ev
} },
1104 { "cmovs", { Gv
, Ev
} },
1105 { "cmovns", { Gv
, Ev
} },
1106 { "cmovp", { Gv
, Ev
} },
1107 { "cmovnp", { Gv
, Ev
} },
1108 { "cmovl", { Gv
, Ev
} },
1109 { "cmovge", { Gv
, Ev
} },
1110 { "cmovle", { Gv
, Ev
} },
1111 { "cmovg", { Gv
, Ev
} },
1113 { "movmskpX", { Gdq
, XS
} },
1117 { "andpX", { XM
, EXx
} },
1118 { "andnpX", { XM
, EXx
} },
1119 { "orpX", { XM
, EXx
} },
1120 { "xorpX", { XM
, EXx
} },
1134 { "packsswb", { MX
, EM
} },
1135 { "pcmpgtb", { MX
, EM
} },
1136 { "pcmpgtw", { MX
, EM
} },
1137 { "pcmpgtd", { MX
, EM
} },
1138 { "packuswb", { MX
, EM
} },
1140 { "punpckhbw", { MX
, EM
} },
1141 { "punpckhwd", { MX
, EM
} },
1142 { "punpckhdq", { MX
, EM
} },
1143 { "packssdw", { MX
, EM
} },
1146 { "movd", { MX
, Edq
} },
1153 { "pcmpeqb", { MX
, EM
} },
1154 { "pcmpeqw", { MX
, EM
} },
1155 { "pcmpeqd", { MX
, EM
} },
1160 { "(bad)", { XX
} },
1161 { "(bad)", { XX
} },
1167 { "joH", { Jv
, XX
, cond_jump_flag
} },
1168 { "jnoH", { Jv
, XX
, cond_jump_flag
} },
1169 { "jbH", { Jv
, XX
, cond_jump_flag
} },
1170 { "jaeH", { Jv
, XX
, cond_jump_flag
} },
1171 { "jeH", { Jv
, XX
, cond_jump_flag
} },
1172 { "jneH", { Jv
, XX
, cond_jump_flag
} },
1173 { "jbeH", { Jv
, XX
, cond_jump_flag
} },
1174 { "jaH", { Jv
, XX
, cond_jump_flag
} },
1176 { "jsH", { Jv
, XX
, cond_jump_flag
} },
1177 { "jnsH", { Jv
, XX
, cond_jump_flag
} },
1178 { "jpH", { Jv
, XX
, cond_jump_flag
} },
1179 { "jnpH", { Jv
, XX
, cond_jump_flag
} },
1180 { "jlH", { Jv
, XX
, cond_jump_flag
} },
1181 { "jgeH", { Jv
, XX
, cond_jump_flag
} },
1182 { "jleH", { Jv
, XX
, cond_jump_flag
} },
1183 { "jgH", { Jv
, XX
, cond_jump_flag
} },
1186 { "setno", { Eb
} },
1188 { "setae", { Eb
} },
1190 { "setne", { Eb
} },
1191 { "setbe", { Eb
} },
1195 { "setns", { Eb
} },
1197 { "setnp", { Eb
} },
1199 { "setge", { Eb
} },
1200 { "setle", { Eb
} },
1203 { "pushT", { fs
} },
1205 { "cpuid", { XX
} },
1206 { "btS", { Ev
, Gv
} },
1207 { "shldS", { Ev
, Gv
, Ib
} },
1208 { "shldS", { Ev
, Gv
, CL
} },
1212 { "pushT", { gs
} },
1215 { "btsS", { Ev
, Gv
} },
1216 { "shrdS", { Ev
, Gv
, Ib
} },
1217 { "shrdS", { Ev
, Gv
, CL
} },
1219 { "imulS", { Gv
, Ev
} },
1221 { "cmpxchgB", { Eb
, Gb
} },
1222 { "cmpxchgS", { Ev
, Gv
} },
1223 { "lssS", { Gv
, Mp
} },
1224 { "btrS", { Ev
, Gv
} },
1225 { "lfsS", { Gv
, Mp
} },
1226 { "lgsS", { Gv
, Mp
} },
1227 { "movz{bR|x|bR|x}", { Gv
, Eb
} },
1228 { "movz{wR|x|wR|x}", { Gv
, Ew
} }, /* yes, there really is movzww ! */
1233 { "btcS", { Ev
, Gv
} },
1234 { "bsfS", { Gv
, Ev
} },
1236 { "movs{bR|x|bR|x}", { Gv
, Eb
} },
1237 { "movs{wR|x|wR|x}", { Gv
, Ew
} }, /* yes, there really is movsww ! */
1239 { "xaddB", { Eb
, Gb
} },
1240 { "xaddS", { Ev
, Gv
} },
1242 { "movntiS", { Ev
, Gv
} },
1243 { "pinsrw", { MX
, Edqw
, Ib
} },
1244 { "pextrw", { Gdq
, MS
, Ib
} },
1245 { "shufpX", { XM
, EXx
, Ib
} },
1248 { "bswap", { RMeAX
} },
1249 { "bswap", { RMeCX
} },
1250 { "bswap", { RMeDX
} },
1251 { "bswap", { RMeBX
} },
1252 { "bswap", { RMeSP
} },
1253 { "bswap", { RMeBP
} },
1254 { "bswap", { RMeSI
} },
1255 { "bswap", { RMeDI
} },
1258 { "psrlw", { MX
, EM
} },
1259 { "psrld", { MX
, EM
} },
1260 { "psrlq", { MX
, EM
} },
1261 { "paddq", { MX
, EM
} },
1262 { "pmullw", { MX
, EM
} },
1264 { "pmovmskb", { Gdq
, MS
} },
1266 { "psubusb", { MX
, EM
} },
1267 { "psubusw", { MX
, EM
} },
1268 { "pminub", { MX
, EM
} },
1269 { "pand", { MX
, EM
} },
1270 { "paddusb", { MX
, EM
} },
1271 { "paddusw", { MX
, EM
} },
1272 { "pmaxub", { MX
, EM
} },
1273 { "pandn", { MX
, EM
} },
1275 { "pavgb", { MX
, EM
} },
1276 { "psraw", { MX
, EM
} },
1277 { "psrad", { MX
, EM
} },
1278 { "pavgw", { MX
, EM
} },
1279 { "pmulhuw", { MX
, EM
} },
1280 { "pmulhw", { MX
, EM
} },
1284 { "psubsb", { MX
, EM
} },
1285 { "psubsw", { MX
, EM
} },
1286 { "pminsw", { MX
, EM
} },
1287 { "por", { MX
, EM
} },
1288 { "paddsb", { MX
, EM
} },
1289 { "paddsw", { MX
, EM
} },
1290 { "pmaxsw", { MX
, EM
} },
1291 { "pxor", { MX
, EM
} },
1294 { "psllw", { MX
, EM
} },
1295 { "pslld", { MX
, EM
} },
1296 { "psllq", { MX
, EM
} },
1297 { "pmuludq", { MX
, EM
} },
1298 { "pmaddwd", { MX
, EM
} },
1299 { "psadbw", { MX
, EM
} },
1302 { "psubb", { MX
, EM
} },
1303 { "psubw", { MX
, EM
} },
1304 { "psubd", { MX
, EM
} },
1305 { "psubq", { MX
, EM
} },
1306 { "paddb", { MX
, EM
} },
1307 { "paddw", { MX
, EM
} },
1308 { "paddd", { MX
, EM
} },
1309 { "(bad)", { XX
} },
1312 static const unsigned char onebyte_has_modrm
[256] = {
1313 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1314 /* ------------------------------- */
1315 /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */
1316 /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */
1317 /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */
1318 /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */
1319 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */
1320 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */
1321 /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */
1322 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */
1323 /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */
1324 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */
1325 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */
1326 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */
1327 /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */
1328 /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */
1329 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */
1330 /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */
1331 /* ------------------------------- */
1332 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1335 static const unsigned char twobyte_has_modrm
[256] = {
1336 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1337 /* ------------------------------- */
1338 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
1339 /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,1, /* 1f */
1340 /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */
1341 /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
1342 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
1343 /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */
1344 /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */
1345 /* 70 */ 1,1,1,1,1,1,1,0,1,1,0,0,1,1,1,1, /* 7f */
1346 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1347 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
1348 /* a0 */ 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1, /* af */
1349 /* b0 */ 1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1, /* bf */
1350 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
1351 /* d0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
1352 /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */
1353 /* f0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */
1354 /* ------------------------------- */
1355 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1358 static const unsigned char twobyte_uses_DATA_prefix
[256] = {
1359 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1360 /* ------------------------------- */
1361 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1362 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
1363 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
1364 /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
1365 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1366 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1367 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1, /* 6f */
1368 /* 70 */ 1,0,0,0,0,0,0,0,1,1,0,0,1,1,1,1, /* 7f */
1369 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1370 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1371 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1372 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1373 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1374 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1375 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1376 /* f0 */ 1,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0 /* ff */
1377 /* ------------------------------- */
1378 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1381 static const unsigned char twobyte_uses_REPNZ_prefix
[256] = {
1382 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1383 /* ------------------------------- */
1384 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1385 /* 10 */ 1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1386 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
1387 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1388 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1389 /* 50 */ 0,1,0,0,0,0,0,0,1,1,1,0,1,1,1,1, /* 5f */
1390 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1391 /* 70 */ 1,0,0,0,0,0,0,0,1,1,0,0,1,1,0,0, /* 7f */
1392 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1393 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1394 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1395 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1396 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1397 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1398 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1399 /* f0 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1400 /* ------------------------------- */
1401 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1404 static const unsigned char twobyte_uses_REPZ_prefix
[256] = {
1405 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1406 /* ------------------------------- */
1407 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1408 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
1409 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
1410 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1411 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1412 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1413 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1, /* 6f */
1414 /* 70 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1, /* 7f */
1415 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1416 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1417 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1418 /* b0 */ 0,0,0,0,0,0,0,0,1,0,0,0,0,1,0,0, /* bf */
1419 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1420 /* d0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1421 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1422 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1423 /* ------------------------------- */
1424 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1427 /* This is used to determine if opcode 0f 38 XX uses DATA prefix. */
1428 static const unsigned char threebyte_0x38_uses_DATA_prefix
[256] = {
1429 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1430 /* ------------------------------- */
1431 /* 00 */ 1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0, /* 0f */
1432 /* 10 */ 1,0,0,0,1,1,0,1,0,0,0,0,1,1,1,0, /* 1f */
1433 /* 20 */ 1,1,1,1,1,1,0,0,1,1,1,1,0,0,0,0, /* 2f */
1434 /* 30 */ 1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1, /* 3f */
1435 /* 40 */ 1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1436 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1437 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1438 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1439 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1440 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1441 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1442 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1443 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1444 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1445 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1446 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1447 /* ------------------------------- */
1448 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1451 /* This is used to determine if opcode 0f 38 XX uses REPNZ prefix. */
1452 static const unsigned char threebyte_0x38_uses_REPNZ_prefix
[256] = {
1453 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1454 /* ------------------------------- */
1455 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1456 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1457 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1458 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1459 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1460 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1461 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1462 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1463 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1464 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1465 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1466 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1467 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1468 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1469 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1470 /* f0 */ 1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1471 /* ------------------------------- */
1472 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1475 /* This is used to determine if opcode 0f 38 XX uses REPZ prefix. */
1476 static const unsigned char threebyte_0x38_uses_REPZ_prefix
[256] = {
1477 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1478 /* ------------------------------- */
1479 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1480 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1481 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1482 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1483 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1484 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1485 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1486 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1487 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1488 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1489 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1490 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1491 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1492 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1493 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1494 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1495 /* ------------------------------- */
1496 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1499 /* This is used to determine if opcode 0f 3a XX uses DATA prefix. */
1500 static const unsigned char threebyte_0x3a_uses_DATA_prefix
[256] = {
1501 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1502 /* ------------------------------- */
1503 /* 00 */ 0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1, /* 0f */
1504 /* 10 */ 0,0,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* 1f */
1505 /* 20 */ 1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1506 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1507 /* 40 */ 1,1,1,0,1,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1508 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1509 /* 60 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1510 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1511 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1512 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1513 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1514 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1515 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1516 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1517 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1518 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1519 /* ------------------------------- */
1520 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1523 /* This is used to determine if opcode 0f 3a XX uses REPNZ prefix. */
1524 static const unsigned char threebyte_0x3a_uses_REPNZ_prefix
[256] = {
1525 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1526 /* ------------------------------- */
1527 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1528 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1529 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1530 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1531 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1532 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1533 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1534 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1535 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1536 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1537 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1538 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1539 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1540 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1541 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1542 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1543 /* ------------------------------- */
1544 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1547 /* This is used to determine if opcode 0f 3a XX uses REPZ prefix. */
1548 static const unsigned char threebyte_0x3a_uses_REPZ_prefix
[256] = {
1549 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1550 /* ------------------------------- */
1551 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1552 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1553 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1554 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1555 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1556 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1557 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1558 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1559 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1560 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1561 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1562 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1563 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1564 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1565 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1566 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1567 /* ------------------------------- */
1568 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1571 static char obuf
[100];
1573 static char scratchbuf
[100];
1574 static unsigned char *start_codep
;
1575 static unsigned char *insn_codep
;
1576 static unsigned char *codep
;
1577 static disassemble_info
*the_info
;
1585 static unsigned char need_modrm
;
1587 /* If we are accessing mod/rm/reg without need_modrm set, then the
1588 values are stale. Hitting this abort likely indicates that you
1589 need to update onebyte_has_modrm or twobyte_has_modrm. */
1590 #define MODRM_CHECK if (!need_modrm) abort ()
1592 static const char * const *names64
;
1593 static const char * const *names32
;
1594 static const char * const *names16
;
1595 static const char * const *names8
;
1596 static const char * const *names8rex
;
1597 static const char * const *names_seg
;
1598 static const char * const *index16
;
1600 static const char * const intel_names64
[] = {
1601 "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
1602 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1604 static const char * const intel_names32
[] = {
1605 "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi",
1606 "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d"
1608 static const char * const intel_names16
[] = {
1609 "ax", "cx", "dx", "bx", "sp", "bp", "si", "di",
1610 "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w"
1612 static const char * const intel_names8
[] = {
1613 "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh",
1615 static const char * const intel_names8rex
[] = {
1616 "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil",
1617 "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b"
1619 static const char * const intel_names_seg
[] = {
1620 "es", "cs", "ss", "ds", "fs", "gs", "?", "?",
1622 static const char * const intel_index16
[] = {
1623 "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx"
1626 static const char * const att_names64
[] = {
1627 "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi",
1628 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
1630 static const char * const att_names32
[] = {
1631 "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi",
1632 "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
1634 static const char * const att_names16
[] = {
1635 "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di",
1636 "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
1638 static const char * const att_names8
[] = {
1639 "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh",
1641 static const char * const att_names8rex
[] = {
1642 "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil",
1643 "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
1645 static const char * const att_names_seg
[] = {
1646 "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?",
1648 static const char * const att_index16
[] = {
1649 "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx"
1652 static const struct dis386 grps
[][8] = {
1655 { "popU", { stackEv
} },
1656 { "(bad)", { XX
} },
1657 { "(bad)", { XX
} },
1658 { "(bad)", { XX
} },
1659 { "(bad)", { XX
} },
1660 { "(bad)", { XX
} },
1661 { "(bad)", { XX
} },
1662 { "(bad)", { XX
} },
1666 { "addA", { Eb
, Ib
} },
1667 { "orA", { Eb
, Ib
} },
1668 { "adcA", { Eb
, Ib
} },
1669 { "sbbA", { Eb
, Ib
} },
1670 { "andA", { Eb
, Ib
} },
1671 { "subA", { Eb
, Ib
} },
1672 { "xorA", { Eb
, Ib
} },
1673 { "cmpA", { Eb
, Ib
} },
1677 { "addQ", { Ev
, Iv
} },
1678 { "orQ", { Ev
, Iv
} },
1679 { "adcQ", { Ev
, Iv
} },
1680 { "sbbQ", { Ev
, Iv
} },
1681 { "andQ", { Ev
, Iv
} },
1682 { "subQ", { Ev
, Iv
} },
1683 { "xorQ", { Ev
, Iv
} },
1684 { "cmpQ", { Ev
, Iv
} },
1688 { "addQ", { Ev
, sIb
} },
1689 { "orQ", { Ev
, sIb
} },
1690 { "adcQ", { Ev
, sIb
} },
1691 { "sbbQ", { Ev
, sIb
} },
1692 { "andQ", { Ev
, sIb
} },
1693 { "subQ", { Ev
, sIb
} },
1694 { "xorQ", { Ev
, sIb
} },
1695 { "cmpQ", { Ev
, sIb
} },
1699 { "rolA", { Eb
, Ib
} },
1700 { "rorA", { Eb
, Ib
} },
1701 { "rclA", { Eb
, Ib
} },
1702 { "rcrA", { Eb
, Ib
} },
1703 { "shlA", { Eb
, Ib
} },
1704 { "shrA", { Eb
, Ib
} },
1705 { "(bad)", { XX
} },
1706 { "sarA", { Eb
, Ib
} },
1710 { "rolQ", { Ev
, Ib
} },
1711 { "rorQ", { Ev
, Ib
} },
1712 { "rclQ", { Ev
, Ib
} },
1713 { "rcrQ", { Ev
, Ib
} },
1714 { "shlQ", { Ev
, Ib
} },
1715 { "shrQ", { Ev
, Ib
} },
1716 { "(bad)", { XX
} },
1717 { "sarQ", { Ev
, Ib
} },
1721 { "rolA", { Eb
, I1
} },
1722 { "rorA", { Eb
, I1
} },
1723 { "rclA", { Eb
, I1
} },
1724 { "rcrA", { Eb
, I1
} },
1725 { "shlA", { Eb
, I1
} },
1726 { "shrA", { Eb
, I1
} },
1727 { "(bad)", { XX
} },
1728 { "sarA", { Eb
, I1
} },
1732 { "rolQ", { Ev
, I1
} },
1733 { "rorQ", { Ev
, I1
} },
1734 { "rclQ", { Ev
, I1
} },
1735 { "rcrQ", { Ev
, I1
} },
1736 { "shlQ", { Ev
, I1
} },
1737 { "shrQ", { Ev
, I1
} },
1738 { "(bad)", { XX
} },
1739 { "sarQ", { Ev
, I1
} },
1743 { "rolA", { Eb
, CL
} },
1744 { "rorA", { Eb
, CL
} },
1745 { "rclA", { Eb
, CL
} },
1746 { "rcrA", { Eb
, CL
} },
1747 { "shlA", { Eb
, CL
} },
1748 { "shrA", { Eb
, CL
} },
1749 { "(bad)", { XX
} },
1750 { "sarA", { Eb
, CL
} },
1754 { "rolQ", { Ev
, CL
} },
1755 { "rorQ", { Ev
, CL
} },
1756 { "rclQ", { Ev
, CL
} },
1757 { "rcrQ", { Ev
, CL
} },
1758 { "shlQ", { Ev
, CL
} },
1759 { "shrQ", { Ev
, CL
} },
1760 { "(bad)", { XX
} },
1761 { "sarQ", { Ev
, CL
} },
1765 { "testA", { Eb
, Ib
} },
1766 { "(bad)", { Eb
} },
1769 { "mulA", { Eb
} }, /* Don't print the implicit %al register, */
1770 { "imulA", { Eb
} }, /* to distinguish these opcodes from other */
1771 { "divA", { Eb
} }, /* mul/imul opcodes. Do the same for div */
1772 { "idivA", { Eb
} }, /* and idiv for consistency. */
1776 { "testQ", { Ev
, Iv
} },
1777 { "(bad)", { XX
} },
1780 { "mulQ", { Ev
} }, /* Don't print the implicit register. */
1781 { "imulQ", { Ev
} },
1783 { "idivQ", { Ev
} },
1789 { "(bad)", { XX
} },
1790 { "(bad)", { XX
} },
1791 { "(bad)", { XX
} },
1792 { "(bad)", { XX
} },
1793 { "(bad)", { XX
} },
1794 { "(bad)", { XX
} },
1800 { "callT", { indirEv
} },
1801 { "JcallT", { indirEp
} },
1802 { "jmpT", { indirEv
} },
1803 { "JjmpT", { indirEp
} },
1804 { "pushU", { stackEv
} },
1805 { "(bad)", { XX
} },
1809 { "sldtD", { Sv
} },
1815 { "(bad)", { XX
} },
1816 { "(bad)", { XX
} },
1820 { "sgdt{Q|IQ||}", { { VMX_Fixup
, 0 } } },
1821 { "sidt{Q|IQ||}", { { PNI_Fixup
, 0 } } },
1822 { "lgdt{Q|Q||}", { M
} },
1823 { "lidt{Q|Q||}", { { SVME_Fixup
, 0 } } },
1824 { "smswD", { Sv
} },
1825 { "(bad)", { XX
} },
1827 { "invlpg", { { INVLPG_Fixup
, w_mode
} } },
1831 { "(bad)", { XX
} },
1832 { "(bad)", { XX
} },
1833 { "(bad)", { XX
} },
1834 { "(bad)", { XX
} },
1835 { "btQ", { Ev
, Ib
} },
1836 { "btsQ", { Ev
, Ib
} },
1837 { "btrQ", { Ev
, Ib
} },
1838 { "btcQ", { Ev
, Ib
} },
1842 { "(bad)", { XX
} },
1843 { "cmpxchg8b", { { CMPXCHG8B_Fixup
, q_mode
} } },
1844 { "(bad)", { XX
} },
1845 { "(bad)", { XX
} },
1846 { "(bad)", { XX
} },
1847 { "(bad)", { XX
} },
1848 { "", { VM
} }, /* See OP_VMX. */
1849 { "vmptrst", { Mq
} },
1853 { "movA", { Eb
, Ib
} },
1854 { "(bad)", { XX
} },
1855 { "(bad)", { XX
} },
1856 { "(bad)", { XX
} },
1857 { "(bad)", { XX
} },
1858 { "(bad)", { XX
} },
1859 { "(bad)", { XX
} },
1860 { "(bad)", { XX
} },
1864 { "movQ", { Ev
, Iv
} },
1865 { "(bad)", { XX
} },
1866 { "(bad)", { XX
} },
1867 { "(bad)", { XX
} },
1868 { "(bad)", { XX
} },
1869 { "(bad)", { XX
} },
1870 { "(bad)", { XX
} },
1871 { "(bad)", { XX
} },
1875 { "(bad)", { XX
} },
1876 { "(bad)", { XX
} },
1877 { "psrlw", { MS
, Ib
} },
1878 { "(bad)", { XX
} },
1879 { "psraw", { MS
, Ib
} },
1880 { "(bad)", { XX
} },
1881 { "psllw", { MS
, Ib
} },
1882 { "(bad)", { XX
} },
1886 { "(bad)", { XX
} },
1887 { "(bad)", { XX
} },
1888 { "psrld", { MS
, Ib
} },
1889 { "(bad)", { XX
} },
1890 { "psrad", { MS
, Ib
} },
1891 { "(bad)", { XX
} },
1892 { "pslld", { MS
, Ib
} },
1893 { "(bad)", { XX
} },
1897 { "(bad)", { XX
} },
1898 { "(bad)", { XX
} },
1899 { "psrlq", { MS
, Ib
} },
1900 { "psrldq", { MS
, Ib
} },
1901 { "(bad)", { XX
} },
1902 { "(bad)", { XX
} },
1903 { "psllq", { MS
, Ib
} },
1904 { "pslldq", { MS
, Ib
} },
1908 { "fxsave", { Ev
} },
1909 { "fxrstor", { Ev
} },
1910 { "ldmxcsr", { Ev
} },
1911 { "stmxcsr", { Ev
} },
1912 { "(bad)", { XX
} },
1913 { "lfence", { { OP_0fae
, 0 } } },
1914 { "mfence", { { OP_0fae
, 0 } } },
1915 { "clflush", { { OP_0fae
, 0 } } },
1919 { "prefetchnta", { Ev
} },
1920 { "prefetcht0", { Ev
} },
1921 { "prefetcht1", { Ev
} },
1922 { "prefetcht2", { Ev
} },
1923 { "(bad)", { XX
} },
1924 { "(bad)", { XX
} },
1925 { "(bad)", { XX
} },
1926 { "(bad)", { XX
} },
1930 { "prefetch", { Eb
} },
1931 { "prefetchw", { Eb
} },
1932 { "(bad)", { XX
} },
1933 { "(bad)", { XX
} },
1934 { "(bad)", { XX
} },
1935 { "(bad)", { XX
} },
1936 { "(bad)", { XX
} },
1937 { "(bad)", { XX
} },
1941 { "xstore-rng", { { OP_0f07
, 0 } } },
1942 { "xcrypt-ecb", { { OP_0f07
, 0 } } },
1943 { "xcrypt-cbc", { { OP_0f07
, 0 } } },
1944 { "xcrypt-ctr", { { OP_0f07
, 0 } } },
1945 { "xcrypt-cfb", { { OP_0f07
, 0 } } },
1946 { "xcrypt-ofb", { { OP_0f07
, 0 } } },
1947 { "(bad)", { { OP_0f07
, 0 } } },
1948 { "(bad)", { { OP_0f07
, 0 } } },
1952 { "montmul", { { OP_0f07
, 0 } } },
1953 { "xsha1", { { OP_0f07
, 0 } } },
1954 { "xsha256", { { OP_0f07
, 0 } } },
1955 { "(bad)", { { OP_0f07
, 0 } } },
1956 { "(bad)", { { OP_0f07
, 0 } } },
1957 { "(bad)", { { OP_0f07
, 0 } } },
1958 { "(bad)", { { OP_0f07
, 0 } } },
1959 { "(bad)", { { OP_0f07
, 0 } } },
1963 static const struct dis386 prefix_user_table
[][4] = {
1966 { "addps", { XM
, EXx
} },
1967 { "addss", { XM
, EXd
} },
1968 { "addpd", { XM
, EXx
} },
1969 { "addsd", { XM
, EXq
} },
1973 { "", { XM
, EXx
, OPSIMD
} }, /* See OP_SIMD_SUFFIX. */
1974 { "", { XM
, EXx
, OPSIMD
} },
1975 { "", { XM
, EXx
, OPSIMD
} },
1976 { "", { XM
, EXx
, OPSIMD
} },
1980 { "cvtpi2ps", { XM
, EMC
} },
1981 { "cvtsi2ssY", { XM
, Ev
} },
1982 { "cvtpi2pd", { XM
, EMC
} },
1983 { "cvtsi2sdY", { XM
, Ev
} },
1987 { "cvtps2pi", { MXC
, EXx
} },
1988 { "cvtss2siY", { Gv
, EXx
} },
1989 { "cvtpd2pi", { MXC
, EXx
} },
1990 { "cvtsd2siY", { Gv
, EXx
} },
1994 { "cvttps2pi", { MXC
, EXx
} },
1995 { "cvttss2siY", { Gv
, EXx
} },
1996 { "cvttpd2pi", { MXC
, EXx
} },
1997 { "cvttsd2siY", { Gv
, EXx
} },
2001 { "divps", { XM
, EXx
} },
2002 { "divss", { XM
, EXx
} },
2003 { "divpd", { XM
, EXx
} },
2004 { "divsd", { XM
, EXx
} },
2008 { "maxps", { XM
, EXx
} },
2009 { "maxss", { XM
, EXx
} },
2010 { "maxpd", { XM
, EXx
} },
2011 { "maxsd", { XM
, EXx
} },
2015 { "minps", { XM
, EXx
} },
2016 { "minss", { XM
, EXx
} },
2017 { "minpd", { XM
, EXx
} },
2018 { "minsd", { XM
, EXx
} },
2022 { "movups", { XM
, EXx
} },
2023 { "movss", { XM
, EXx
} },
2024 { "movupd", { XM
, EXx
} },
2025 { "movsd", { XM
, EXx
} },
2029 { "movups", { EXx
, XM
} },
2030 { "movss", { EXx
, XM
} },
2031 { "movupd", { EXx
, XM
} },
2032 { "movsd", { EXx
, XM
} },
2036 { "mulps", { XM
, EXx
} },
2037 { "mulss", { XM
, EXx
} },
2038 { "mulpd", { XM
, EXx
} },
2039 { "mulsd", { XM
, EXx
} },
2043 { "rcpps", { XM
, EXx
} },
2044 { "rcpss", { XM
, EXx
} },
2045 { "(bad)", { XM
, EXx
} },
2046 { "(bad)", { XM
, EXx
} },
2050 { "rsqrtps",{ XM
, EXx
} },
2051 { "rsqrtss",{ XM
, EXx
} },
2052 { "(bad)", { XM
, EXx
} },
2053 { "(bad)", { XM
, EXx
} },
2057 { "sqrtps", { XM
, EXx
} },
2058 { "sqrtss", { XM
, EXx
} },
2059 { "sqrtpd", { XM
, EXx
} },
2060 { "sqrtsd", { XM
, EXx
} },
2064 { "subps", { XM
, EXx
} },
2065 { "subss", { XM
, EXx
} },
2066 { "subpd", { XM
, EXx
} },
2067 { "subsd", { XM
, EXx
} },
2071 { "(bad)", { XM
, EXx
} },
2072 { "cvtdq2pd", { XM
, EXq
} },
2073 { "cvttpd2dq", { XM
, EXx
} },
2074 { "cvtpd2dq", { XM
, EXx
} },
2078 { "cvtdq2ps", { XM
, EXx
} },
2079 { "cvttps2dq", { XM
, EXx
} },
2080 { "cvtps2dq", { XM
, EXx
} },
2081 { "(bad)", { XM
, EXx
} },
2085 { "cvtps2pd", { XM
, EXq
} },
2086 { "cvtss2sd", { XM
, EXx
} },
2087 { "cvtpd2ps", { XM
, EXx
} },
2088 { "cvtsd2ss", { XM
, EXx
} },
2092 { "maskmovq", { MX
, MS
} },
2093 { "(bad)", { XM
, EXx
} },
2094 { "maskmovdqu", { XM
, XS
} },
2095 { "(bad)", { XM
, EXx
} },
2099 { "movq", { MX
, EM
} },
2100 { "movdqu", { XM
, EXx
} },
2101 { "movdqa", { XM
, EXx
} },
2102 { "(bad)", { XM
, EXx
} },
2106 { "movq", { EM
, MX
} },
2107 { "movdqu", { EXx
, XM
} },
2108 { "movdqa", { EXx
, XM
} },
2109 { "(bad)", { EXx
, XM
} },
2113 { "(bad)", { EXx
, XM
} },
2114 { "movq2dq",{ XM
, MS
} },
2115 { "movq", { EXx
, XM
} },
2116 { "movdq2q",{ MX
, XS
} },
2120 { "pshufw", { MX
, EM
, Ib
} },
2121 { "pshufhw",{ XM
, EXx
, Ib
} },
2122 { "pshufd", { XM
, EXx
, Ib
} },
2123 { "pshuflw",{ XM
, EXx
, Ib
} },
2127 { "movd", { Edq
, MX
} },
2128 { "movq", { XM
, EXx
} },
2129 { "movd", { Edq
, XM
} },
2130 { "(bad)", { Ed
, XM
} },
2134 { "(bad)", { MX
, EXx
} },
2135 { "(bad)", { XM
, EXx
} },
2136 { "punpckhqdq", { XM
, EXx
} },
2137 { "(bad)", { XM
, EXx
} },
2141 { "movntq", { EM
, MX
} },
2142 { "(bad)", { EM
, XM
} },
2143 { "movntdq",{ EM
, XM
} },
2144 { "(bad)", { EM
, XM
} },
2148 { "(bad)", { MX
, EXx
} },
2149 { "(bad)", { XM
, EXx
} },
2150 { "punpcklqdq", { XM
, EXx
} },
2151 { "(bad)", { XM
, EXx
} },
2155 { "(bad)", { MX
, EXx
} },
2156 { "(bad)", { XM
, EXx
} },
2157 { "addsubpd", { XM
, EXx
} },
2158 { "addsubps", { XM
, EXx
} },
2162 { "(bad)", { MX
, EXx
} },
2163 { "(bad)", { XM
, EXx
} },
2164 { "haddpd", { XM
, EXx
} },
2165 { "haddps", { XM
, EXx
} },
2169 { "(bad)", { MX
, EXx
} },
2170 { "(bad)", { XM
, EXx
} },
2171 { "hsubpd", { XM
, EXx
} },
2172 { "hsubps", { XM
, EXx
} },
2176 { "movlpX", { XM
, EXq
, { SIMD_Fixup
, 'h' } } }, /* really only 2 operands */
2177 { "movsldup", { XM
, EXx
} },
2178 { "movlpd", { XM
, EXq
} },
2179 { "movddup", { XM
, EXq
} },
2183 { "movhpX", { XM
, EXq
, { SIMD_Fixup
, 'l' } } },
2184 { "movshdup", { XM
, EXx
} },
2185 { "movhpd", { XM
, EXq
} },
2186 { "(bad)", { XM
, EXq
} },
2190 { "(bad)", { XM
, EXx
} },
2191 { "(bad)", { XM
, EXx
} },
2192 { "(bad)", { XM
, EXx
} },
2193 { "lddqu", { XM
, M
} },
2197 {"movntps", { Ev
, XM
} },
2198 {"movntss", { Ev
, XM
} },
2199 {"movntpd", { Ev
, XM
} },
2200 {"movntsd", { Ev
, XM
} },
2205 {"vmread", { Em
, Gm
} },
2207 {"extrq", { XS
, Ib
, Ib
} },
2208 {"insertq", { XM
, XS
, Ib
, Ib
} },
2213 {"vmwrite", { Gm
, Em
} },
2215 {"extrq", { XM
, XS
} },
2216 {"insertq", { XM
, XS
} },
2221 { "bsrS", { Gv
, Ev
} },
2222 { "lzcntS", { Gv
, Ev
} },
2223 { "bsrS", { Gv
, Ev
} },
2224 { "(bad)", { XX
} },
2229 { "(bad)", { XX
} },
2230 { "popcntS", { Gv
, Ev
} },
2231 { "(bad)", { XX
} },
2232 { "(bad)", { XX
} },
2237 { "xchgS", { { NOP_Fixup1
, eAX_reg
}, { NOP_Fixup2
, eAX_reg
} } },
2238 { "pause", { XX
} },
2239 { "xchgS", { { NOP_Fixup1
, eAX_reg
}, { NOP_Fixup2
, eAX_reg
} } },
2240 { "(bad)", { XX
} },
2245 { "(bad)", { XX
} },
2246 { "(bad)", { XX
} },
2247 { "pblendvb", {XM
, EXx
, XMM0
} },
2248 { "(bad)", { XX
} },
2253 { "(bad)", { XX
} },
2254 { "(bad)", { XX
} },
2255 { "blendvps", {XM
, EXx
, XMM0
} },
2256 { "(bad)", { XX
} },
2261 { "(bad)", { XX
} },
2262 { "(bad)", { XX
} },
2263 { "blendvpd", { XM
, EXx
, XMM0
} },
2264 { "(bad)", { XX
} },
2269 { "(bad)", { XX
} },
2270 { "(bad)", { XX
} },
2271 { "ptest", { XM
, EXx
} },
2272 { "(bad)", { XX
} },
2277 { "(bad)", { XX
} },
2278 { "(bad)", { XX
} },
2279 { "pmovsxbw", { XM
, EXx
} },
2280 { "(bad)", { XX
} },
2285 { "(bad)", { XX
} },
2286 { "(bad)", { XX
} },
2287 { "pmovsxbd", { XM
, EXx
} },
2288 { "(bad)", { XX
} },
2293 { "(bad)", { XX
} },
2294 { "(bad)", { XX
} },
2295 { "pmovsxbq", { XM
, EXx
} },
2296 { "(bad)", { XX
} },
2301 { "(bad)", { XX
} },
2302 { "(bad)", { XX
} },
2303 { "pmovsxwd", { XM
, EXx
} },
2304 { "(bad)", { XX
} },
2309 { "(bad)", { XX
} },
2310 { "(bad)", { XX
} },
2311 { "pmovsxwq", { XM
, EXx
} },
2312 { "(bad)", { XX
} },
2317 { "(bad)", { XX
} },
2318 { "(bad)", { XX
} },
2319 { "pmovsxdq", { XM
, EXx
} },
2320 { "(bad)", { XX
} },
2325 { "(bad)", { XX
} },
2326 { "(bad)", { XX
} },
2327 { "pmuldq", { XM
, EXx
} },
2328 { "(bad)", { XX
} },
2333 { "(bad)", { XX
} },
2334 { "(bad)", { XX
} },
2335 { "pcmpeqq", { XM
, EXx
} },
2336 { "(bad)", { XX
} },
2341 { "(bad)", { XX
} },
2342 { "(bad)", { XX
} },
2343 { "movntdqa", { XM
, EM
} },
2344 { "(bad)", { XX
} },
2349 { "(bad)", { XX
} },
2350 { "(bad)", { XX
} },
2351 { "packusdw", { XM
, EXx
} },
2352 { "(bad)", { XX
} },
2357 { "(bad)", { XX
} },
2358 { "(bad)", { XX
} },
2359 { "pmovzxbw", { XM
, EXx
} },
2360 { "(bad)", { XX
} },
2365 { "(bad)", { XX
} },
2366 { "(bad)", { XX
} },
2367 { "pmovzxbd", { XM
, EXx
} },
2368 { "(bad)", { XX
} },
2373 { "(bad)", { XX
} },
2374 { "(bad)", { XX
} },
2375 { "pmovzxbq", { XM
, EXx
} },
2376 { "(bad)", { XX
} },
2381 { "(bad)", { XX
} },
2382 { "(bad)", { XX
} },
2383 { "pmovzxwd", { XM
, EXx
} },
2384 { "(bad)", { XX
} },
2389 { "(bad)", { XX
} },
2390 { "(bad)", { XX
} },
2391 { "pmovzxwq", { XM
, EXx
} },
2392 { "(bad)", { XX
} },
2397 { "(bad)", { XX
} },
2398 { "(bad)", { XX
} },
2399 { "pmovzxdq", { XM
, EXx
} },
2400 { "(bad)", { XX
} },
2405 { "(bad)", { XX
} },
2406 { "(bad)", { XX
} },
2407 { "pminsb", { XM
, EXx
} },
2408 { "(bad)", { XX
} },
2413 { "(bad)", { XX
} },
2414 { "(bad)", { XX
} },
2415 { "pminsd", { XM
, EXx
} },
2416 { "(bad)", { XX
} },
2421 { "(bad)", { XX
} },
2422 { "(bad)", { XX
} },
2423 { "pminuw", { XM
, EXx
} },
2424 { "(bad)", { XX
} },
2429 { "(bad)", { XX
} },
2430 { "(bad)", { XX
} },
2431 { "pminud", { XM
, EXx
} },
2432 { "(bad)", { XX
} },
2437 { "(bad)", { XX
} },
2438 { "(bad)", { XX
} },
2439 { "pmaxsb", { XM
, EXx
} },
2440 { "(bad)", { XX
} },
2445 { "(bad)", { XX
} },
2446 { "(bad)", { XX
} },
2447 { "pmaxsd", { XM
, EXx
} },
2448 { "(bad)", { XX
} },
2453 { "(bad)", { XX
} },
2454 { "(bad)", { XX
} },
2455 { "pmaxuw", { XM
, EXx
} },
2456 { "(bad)", { XX
} },
2461 { "(bad)", { XX
} },
2462 { "(bad)", { XX
} },
2463 { "pmaxud", { XM
, EXx
} },
2464 { "(bad)", { XX
} },
2469 { "(bad)", { XX
} },
2470 { "(bad)", { XX
} },
2471 { "pmulld", { XM
, EXx
} },
2472 { "(bad)", { XX
} },
2477 { "(bad)", { XX
} },
2478 { "(bad)", { XX
} },
2479 { "phminposuw", { XM
, EXx
} },
2480 { "(bad)", { XX
} },
2485 { "(bad)", { XX
} },
2486 { "(bad)", { XX
} },
2487 { "roundps", { XM
, EXx
, Ib
} },
2488 { "(bad)", { XX
} },
2493 { "(bad)", { XX
} },
2494 { "(bad)", { XX
} },
2495 { "roundpd", { XM
, EXx
, Ib
} },
2496 { "(bad)", { XX
} },
2501 { "(bad)", { XX
} },
2502 { "(bad)", { XX
} },
2503 { "roundss", { XM
, EXx
, Ib
} },
2504 { "(bad)", { XX
} },
2509 { "(bad)", { XX
} },
2510 { "(bad)", { XX
} },
2511 { "roundsd", { XM
, EXx
, Ib
} },
2512 { "(bad)", { XX
} },
2517 { "(bad)", { XX
} },
2518 { "(bad)", { XX
} },
2519 { "blendps", { XM
, EXx
, Ib
} },
2520 { "(bad)", { XX
} },
2525 { "(bad)", { XX
} },
2526 { "(bad)", { XX
} },
2527 { "blendpd", { XM
, EXx
, Ib
} },
2528 { "(bad)", { XX
} },
2533 { "(bad)", { XX
} },
2534 { "(bad)", { XX
} },
2535 { "pblendw", { XM
, EXx
, Ib
} },
2536 { "(bad)", { XX
} },
2541 { "(bad)", { XX
} },
2542 { "(bad)", { XX
} },
2543 { "pextrb", { Edqb
, XM
, Ib
} },
2544 { "(bad)", { XX
} },
2549 { "(bad)", { XX
} },
2550 { "(bad)", { XX
} },
2551 { "pextrw", { Edqw
, XM
, Ib
} },
2552 { "(bad)", { XX
} },
2557 { "(bad)", { XX
} },
2558 { "(bad)", { XX
} },
2559 { "pextrK", { Edq
, XM
, Ib
} },
2560 { "(bad)", { XX
} },
2565 { "(bad)", { XX
} },
2566 { "(bad)", { XX
} },
2567 { "extractps", { Edqd
, XM
, Ib
} },
2568 { "(bad)", { XX
} },
2573 { "(bad)", { XX
} },
2574 { "(bad)", { XX
} },
2575 { "pinsrb", { XM
, Edqb
, Ib
} },
2576 { "(bad)", { XX
} },
2581 { "(bad)", { XX
} },
2582 { "(bad)", { XX
} },
2583 { "insertps", { XM
, EXx
, Ib
} },
2584 { "(bad)", { XX
} },
2589 { "(bad)", { XX
} },
2590 { "(bad)", { XX
} },
2591 { "pinsrK", { XM
, Edq
, Ib
} },
2592 { "(bad)", { XX
} },
2597 { "(bad)", { XX
} },
2598 { "(bad)", { XX
} },
2599 { "dpps", { XM
, EXx
, Ib
} },
2600 { "(bad)", { XX
} },
2605 { "(bad)", { XX
} },
2606 { "(bad)", { XX
} },
2607 { "dppd", { XM
, EXx
, Ib
} },
2608 { "(bad)", { XX
} },
2613 { "(bad)", { XX
} },
2614 { "(bad)", { XX
} },
2615 { "mpsadbw", { XM
, EXx
, Ib
} },
2616 { "(bad)", { XX
} },
2621 { "(bad)", { XX
} },
2622 { "(bad)", { XX
} },
2623 { "pcmpgtq", { XM
, EXx
} },
2624 { "(bad)", { XX
} },
2629 { "(bad)", { XX
} },
2630 { "(bad)", { XX
} },
2631 { "(bad)", { XX
} },
2632 { "crc32", { Gdq
, { CRC32_Fixup
, b_mode
} } },
2637 { "(bad)", { XX
} },
2638 { "(bad)", { XX
} },
2639 { "(bad)", { XX
} },
2640 { "crc32", { Gdq
, { CRC32_Fixup
, v_mode
} } },
2645 { "(bad)", { XX
} },
2646 { "(bad)", { XX
} },
2647 { "pcmpestrm", { XM
, EXx
, Ib
} },
2648 { "(bad)", { XX
} },
2653 { "(bad)", { XX
} },
2654 { "(bad)", { XX
} },
2655 { "pcmpestri", { XM
, EXx
, Ib
} },
2656 { "(bad)", { XX
} },
2661 { "(bad)", { XX
} },
2662 { "(bad)", { XX
} },
2663 { "pcmpistrm", { XM
, EXx
, Ib
} },
2664 { "(bad)", { XX
} },
2669 { "(bad)", { XX
} },
2670 { "(bad)", { XX
} },
2671 { "pcmpistri", { XM
, EXx
, Ib
} },
2672 { "(bad)", { XX
} },
2677 { "ucomiss",{ XM
, EXd
} },
2678 { "(bad)", { XX
} },
2679 { "ucomisd",{ XM
, EXq
} },
2680 { "(bad)", { XX
} },
2685 { "comiss", { XM
, EXd
} },
2686 { "(bad)", { XX
} },
2687 { "comisd", { XM
, EXq
} },
2688 { "(bad)", { XX
} },
2693 { "punpcklbw",{ MX
, EMd
} },
2694 { "(bad)", { XX
} },
2695 { "punpcklbw",{ MX
, EMq
} },
2696 { "(bad)", { XX
} },
2701 { "punpcklwd",{ MX
, EMd
} },
2702 { "(bad)", { XX
} },
2703 { "punpcklwd",{ MX
, EMq
} },
2704 { "(bad)", { XX
} },
2709 { "punpckldq",{ MX
, EMd
} },
2710 { "(bad)", { XX
} },
2711 { "punpckldq",{ MX
, EMq
} },
2712 { "(bad)", { XX
} },
2717 { "(bad)", { XX
} },
2718 { "(bad)", { XX
} },
2719 { "pclmulqdq", { XM
, EXx
, Ib
} },
2720 { "(bad)", { XX
} },
2724 static const struct dis386 x86_64_table
[][2] = {
2726 { "pusha{P|}", { XX
} },
2727 { "(bad)", { XX
} },
2730 { "popa{P|}", { XX
} },
2731 { "(bad)", { XX
} },
2734 { "bound{S|}", { Gv
, Ma
} },
2735 { "(bad)", { XX
} },
2738 { "arpl", { Ew
, Gw
} },
2739 { "movs{||lq|xd}", { Gv
, Ed
} },
2743 static const struct dis386 three_byte_table
[][256] = {
2747 { "pshufb", { MX
, EM
} },
2748 { "phaddw", { MX
, EM
} },
2749 { "phaddd", { MX
, EM
} },
2750 { "phaddsw", { MX
, EM
} },
2751 { "pmaddubsw", { MX
, EM
} },
2752 { "phsubw", { MX
, EM
} },
2753 { "phsubd", { MX
, EM
} },
2754 { "phsubsw", { MX
, EM
} },
2756 { "psignb", { MX
, EM
} },
2757 { "psignw", { MX
, EM
} },
2758 { "psignd", { MX
, EM
} },
2759 { "pmulhrsw", { MX
, EM
} },
2760 { "(bad)", { XX
} },
2761 { "(bad)", { XX
} },
2762 { "(bad)", { XX
} },
2763 { "(bad)", { XX
} },
2766 { "(bad)", { XX
} },
2767 { "(bad)", { XX
} },
2768 { "(bad)", { XX
} },
2771 { "(bad)", { XX
} },
2774 { "(bad)", { XX
} },
2775 { "(bad)", { XX
} },
2776 { "(bad)", { XX
} },
2777 { "(bad)", { XX
} },
2778 { "pabsb", { MX
, EM
} },
2779 { "pabsw", { MX
, EM
} },
2780 { "pabsd", { MX
, EM
} },
2781 { "(bad)", { XX
} },
2789 { "(bad)", { XX
} },
2790 { "(bad)", { XX
} },
2796 { "(bad)", { XX
} },
2797 { "(bad)", { XX
} },
2798 { "(bad)", { XX
} },
2799 { "(bad)", { XX
} },
2807 { "(bad)", { XX
} },
2821 { "(bad)", { XX
} },
2822 { "(bad)", { XX
} },
2823 { "(bad)", { XX
} },
2824 { "(bad)", { XX
} },
2825 { "(bad)", { XX
} },
2826 { "(bad)", { XX
} },
2828 { "(bad)", { XX
} },
2829 { "(bad)", { XX
} },
2830 { "(bad)", { XX
} },
2831 { "(bad)", { XX
} },
2832 { "(bad)", { XX
} },
2833 { "(bad)", { XX
} },
2834 { "(bad)", { XX
} },
2835 { "(bad)", { XX
} },
2837 { "(bad)", { XX
} },
2838 { "(bad)", { XX
} },
2839 { "(bad)", { XX
} },
2840 { "(bad)", { XX
} },
2841 { "(bad)", { XX
} },
2842 { "(bad)", { XX
} },
2843 { "(bad)", { XX
} },
2844 { "(bad)", { XX
} },
2846 { "(bad)", { XX
} },
2847 { "(bad)", { XX
} },
2848 { "(bad)", { XX
} },
2849 { "(bad)", { XX
} },
2850 { "(bad)", { XX
} },
2851 { "(bad)", { XX
} },
2852 { "(bad)", { XX
} },
2853 { "(bad)", { XX
} },
2855 { "(bad)", { XX
} },
2856 { "(bad)", { XX
} },
2857 { "(bad)", { XX
} },
2858 { "(bad)", { XX
} },
2859 { "(bad)", { XX
} },
2860 { "(bad)", { XX
} },
2861 { "(bad)", { XX
} },
2862 { "(bad)", { XX
} },
2864 { "(bad)", { XX
} },
2865 { "(bad)", { XX
} },
2866 { "(bad)", { XX
} },
2867 { "(bad)", { XX
} },
2868 { "(bad)", { XX
} },
2869 { "(bad)", { XX
} },
2870 { "(bad)", { XX
} },
2871 { "(bad)", { XX
} },
2873 { "(bad)", { XX
} },
2874 { "(bad)", { XX
} },
2875 { "(bad)", { XX
} },
2876 { "(bad)", { XX
} },
2877 { "(bad)", { XX
} },
2878 { "(bad)", { XX
} },
2879 { "(bad)", { XX
} },
2880 { "(bad)", { XX
} },
2882 { "(bad)", { XX
} },
2883 { "(bad)", { XX
} },
2884 { "(bad)", { XX
} },
2885 { "(bad)", { XX
} },
2886 { "(bad)", { XX
} },
2887 { "(bad)", { XX
} },
2888 { "(bad)", { XX
} },
2889 { "(bad)", { XX
} },
2891 { "(bad)", { XX
} },
2892 { "(bad)", { XX
} },
2893 { "(bad)", { XX
} },
2894 { "(bad)", { XX
} },
2895 { "(bad)", { XX
} },
2896 { "(bad)", { XX
} },
2897 { "(bad)", { XX
} },
2898 { "(bad)", { XX
} },
2900 { "(bad)", { XX
} },
2901 { "(bad)", { XX
} },
2902 { "(bad)", { XX
} },
2903 { "(bad)", { XX
} },
2904 { "(bad)", { XX
} },
2905 { "(bad)", { XX
} },
2906 { "(bad)", { XX
} },
2907 { "(bad)", { XX
} },
2909 { "(bad)", { XX
} },
2910 { "(bad)", { XX
} },
2911 { "(bad)", { XX
} },
2912 { "(bad)", { XX
} },
2913 { "(bad)", { XX
} },
2914 { "(bad)", { XX
} },
2915 { "(bad)", { XX
} },
2916 { "(bad)", { XX
} },
2918 { "(bad)", { XX
} },
2919 { "(bad)", { XX
} },
2920 { "(bad)", { XX
} },
2921 { "(bad)", { XX
} },
2922 { "(bad)", { XX
} },
2923 { "(bad)", { XX
} },
2924 { "(bad)", { XX
} },
2925 { "(bad)", { XX
} },
2927 { "(bad)", { XX
} },
2928 { "(bad)", { XX
} },
2929 { "(bad)", { XX
} },
2930 { "(bad)", { XX
} },
2931 { "(bad)", { XX
} },
2932 { "(bad)", { XX
} },
2933 { "(bad)", { XX
} },
2934 { "(bad)", { XX
} },
2936 { "(bad)", { XX
} },
2937 { "(bad)", { XX
} },
2938 { "(bad)", { XX
} },
2939 { "(bad)", { XX
} },
2940 { "(bad)", { XX
} },
2941 { "(bad)", { XX
} },
2942 { "(bad)", { XX
} },
2943 { "(bad)", { XX
} },
2945 { "(bad)", { XX
} },
2946 { "(bad)", { XX
} },
2947 { "(bad)", { XX
} },
2948 { "(bad)", { XX
} },
2949 { "(bad)", { XX
} },
2950 { "(bad)", { XX
} },
2951 { "(bad)", { XX
} },
2952 { "(bad)", { XX
} },
2954 { "(bad)", { XX
} },
2955 { "(bad)", { XX
} },
2956 { "(bad)", { XX
} },
2957 { "(bad)", { XX
} },
2958 { "(bad)", { XX
} },
2959 { "(bad)", { XX
} },
2960 { "(bad)", { XX
} },
2961 { "(bad)", { XX
} },
2963 { "(bad)", { XX
} },
2964 { "(bad)", { XX
} },
2965 { "(bad)", { XX
} },
2966 { "(bad)", { XX
} },
2967 { "(bad)", { XX
} },
2968 { "(bad)", { XX
} },
2969 { "(bad)", { XX
} },
2970 { "(bad)", { XX
} },
2972 { "(bad)", { XX
} },
2973 { "(bad)", { XX
} },
2974 { "(bad)", { XX
} },
2975 { "(bad)", { XX
} },
2976 { "(bad)", { XX
} },
2977 { "(bad)", { XX
} },
2978 { "(bad)", { XX
} },
2979 { "(bad)", { XX
} },
2981 { "(bad)", { XX
} },
2982 { "(bad)", { XX
} },
2983 { "(bad)", { XX
} },
2984 { "(bad)", { XX
} },
2985 { "(bad)", { XX
} },
2986 { "(bad)", { XX
} },
2987 { "(bad)", { XX
} },
2988 { "(bad)", { XX
} },
2990 { "(bad)", { XX
} },
2991 { "(bad)", { XX
} },
2992 { "(bad)", { XX
} },
2993 { "(bad)", { XX
} },
2994 { "(bad)", { XX
} },
2995 { "(bad)", { XX
} },
2996 { "(bad)", { XX
} },
2997 { "(bad)", { XX
} },
2999 { "(bad)", { XX
} },
3000 { "(bad)", { XX
} },
3001 { "(bad)", { XX
} },
3002 { "(bad)", { XX
} },
3003 { "(bad)", { XX
} },
3004 { "(bad)", { XX
} },
3005 { "(bad)", { XX
} },
3006 { "(bad)", { XX
} },
3008 { "(bad)", { XX
} },
3009 { "(bad)", { XX
} },
3010 { "(bad)", { XX
} },
3011 { "(bad)", { XX
} },
3012 { "(bad)", { XX
} },
3013 { "(bad)", { XX
} },
3014 { "(bad)", { XX
} },
3015 { "(bad)", { XX
} },
3019 { "(bad)", { XX
} },
3020 { "(bad)", { XX
} },
3021 { "(bad)", { XX
} },
3022 { "(bad)", { XX
} },
3023 { "(bad)", { XX
} },
3024 { "(bad)", { XX
} },
3026 { "(bad)", { XX
} },
3027 { "(bad)", { XX
} },
3028 { "(bad)", { XX
} },
3029 { "(bad)", { XX
} },
3030 { "(bad)", { XX
} },
3031 { "(bad)", { XX
} },
3032 { "(bad)", { XX
} },
3033 { "(bad)", { XX
} },
3038 { "(bad)", { XX
} },
3039 { "(bad)", { XX
} },
3040 { "(bad)", { XX
} },
3041 { "(bad)", { XX
} },
3042 { "(bad)", { XX
} },
3043 { "(bad)", { XX
} },
3044 { "(bad)", { XX
} },
3045 { "(bad)", { XX
} },
3054 { "palignr", { MX
, EM
, Ib
} },
3056 { "(bad)", { XX
} },
3057 { "(bad)", { XX
} },
3058 { "(bad)", { XX
} },
3059 { "(bad)", { XX
} },
3065 { "(bad)", { XX
} },
3066 { "(bad)", { XX
} },
3067 { "(bad)", { XX
} },
3068 { "(bad)", { XX
} },
3069 { "(bad)", { XX
} },
3070 { "(bad)", { XX
} },
3071 { "(bad)", { XX
} },
3072 { "(bad)", { XX
} },
3077 { "(bad)", { XX
} },
3078 { "(bad)", { XX
} },
3079 { "(bad)", { XX
} },
3080 { "(bad)", { XX
} },
3081 { "(bad)", { XX
} },
3083 { "(bad)", { XX
} },
3084 { "(bad)", { XX
} },
3085 { "(bad)", { XX
} },
3086 { "(bad)", { XX
} },
3087 { "(bad)", { XX
} },
3088 { "(bad)", { XX
} },
3089 { "(bad)", { XX
} },
3090 { "(bad)", { XX
} },
3092 { "(bad)", { XX
} },
3093 { "(bad)", { XX
} },
3094 { "(bad)", { XX
} },
3095 { "(bad)", { XX
} },
3096 { "(bad)", { XX
} },
3097 { "(bad)", { XX
} },
3098 { "(bad)", { XX
} },
3099 { "(bad)", { XX
} },
3101 { "(bad)", { XX
} },
3102 { "(bad)", { XX
} },
3103 { "(bad)", { XX
} },
3104 { "(bad)", { XX
} },
3105 { "(bad)", { XX
} },
3106 { "(bad)", { XX
} },
3107 { "(bad)", { XX
} },
3108 { "(bad)", { XX
} },
3113 { "(bad)", { XX
} },
3115 { "(bad)", { XX
} },
3116 { "(bad)", { XX
} },
3117 { "(bad)", { XX
} },
3119 { "(bad)", { XX
} },
3120 { "(bad)", { XX
} },
3121 { "(bad)", { XX
} },
3122 { "(bad)", { XX
} },
3123 { "(bad)", { XX
} },
3124 { "(bad)", { XX
} },
3125 { "(bad)", { XX
} },
3126 { "(bad)", { XX
} },
3128 { "(bad)", { XX
} },
3129 { "(bad)", { XX
} },
3130 { "(bad)", { XX
} },
3131 { "(bad)", { XX
} },
3132 { "(bad)", { XX
} },
3133 { "(bad)", { XX
} },
3134 { "(bad)", { XX
} },
3135 { "(bad)", { XX
} },
3137 { "(bad)", { XX
} },
3138 { "(bad)", { XX
} },
3139 { "(bad)", { XX
} },
3140 { "(bad)", { XX
} },
3141 { "(bad)", { XX
} },
3142 { "(bad)", { XX
} },
3143 { "(bad)", { XX
} },
3144 { "(bad)", { XX
} },
3150 { "(bad)", { XX
} },
3151 { "(bad)", { XX
} },
3152 { "(bad)", { XX
} },
3153 { "(bad)", { XX
} },
3155 { "(bad)", { XX
} },
3156 { "(bad)", { XX
} },
3157 { "(bad)", { XX
} },
3158 { "(bad)", { XX
} },
3159 { "(bad)", { XX
} },
3160 { "(bad)", { XX
} },
3161 { "(bad)", { XX
} },
3162 { "(bad)", { XX
} },
3164 { "(bad)", { XX
} },
3165 { "(bad)", { XX
} },
3166 { "(bad)", { XX
} },
3167 { "(bad)", { XX
} },
3168 { "(bad)", { XX
} },
3169 { "(bad)", { XX
} },
3170 { "(bad)", { XX
} },
3171 { "(bad)", { XX
} },
3173 { "(bad)", { XX
} },
3174 { "(bad)", { XX
} },
3175 { "(bad)", { XX
} },
3176 { "(bad)", { XX
} },
3177 { "(bad)", { XX
} },
3178 { "(bad)", { XX
} },
3179 { "(bad)", { XX
} },
3180 { "(bad)", { XX
} },
3182 { "(bad)", { XX
} },
3183 { "(bad)", { XX
} },
3184 { "(bad)", { XX
} },
3185 { "(bad)", { XX
} },
3186 { "(bad)", { XX
} },
3187 { "(bad)", { XX
} },
3188 { "(bad)", { XX
} },
3189 { "(bad)", { XX
} },
3191 { "(bad)", { XX
} },
3192 { "(bad)", { XX
} },
3193 { "(bad)", { XX
} },
3194 { "(bad)", { XX
} },
3195 { "(bad)", { XX
} },
3196 { "(bad)", { XX
} },
3197 { "(bad)", { XX
} },
3198 { "(bad)", { XX
} },
3200 { "(bad)", { XX
} },
3201 { "(bad)", { XX
} },
3202 { "(bad)", { XX
} },
3203 { "(bad)", { XX
} },
3204 { "(bad)", { XX
} },
3205 { "(bad)", { XX
} },
3206 { "(bad)", { XX
} },
3207 { "(bad)", { XX
} },
3209 { "(bad)", { XX
} },
3210 { "(bad)", { XX
} },
3211 { "(bad)", { XX
} },
3212 { "(bad)", { XX
} },
3213 { "(bad)", { XX
} },
3214 { "(bad)", { XX
} },
3215 { "(bad)", { XX
} },
3216 { "(bad)", { XX
} },
3218 { "(bad)", { XX
} },
3219 { "(bad)", { XX
} },
3220 { "(bad)", { XX
} },
3221 { "(bad)", { XX
} },
3222 { "(bad)", { XX
} },
3223 { "(bad)", { XX
} },
3224 { "(bad)", { XX
} },
3225 { "(bad)", { XX
} },
3227 { "(bad)", { XX
} },
3228 { "(bad)", { XX
} },
3229 { "(bad)", { XX
} },
3230 { "(bad)", { XX
} },
3231 { "(bad)", { XX
} },
3232 { "(bad)", { XX
} },
3233 { "(bad)", { XX
} },
3234 { "(bad)", { XX
} },
3236 { "(bad)", { XX
} },
3237 { "(bad)", { XX
} },
3238 { "(bad)", { XX
} },
3239 { "(bad)", { XX
} },
3240 { "(bad)", { XX
} },
3241 { "(bad)", { XX
} },
3242 { "(bad)", { XX
} },
3243 { "(bad)", { XX
} },
3245 { "(bad)", { XX
} },
3246 { "(bad)", { XX
} },
3247 { "(bad)", { XX
} },
3248 { "(bad)", { XX
} },
3249 { "(bad)", { XX
} },
3250 { "(bad)", { XX
} },
3251 { "(bad)", { XX
} },
3252 { "(bad)", { XX
} },
3254 { "(bad)", { XX
} },
3255 { "(bad)", { XX
} },
3256 { "(bad)", { XX
} },
3257 { "(bad)", { XX
} },
3258 { "(bad)", { XX
} },
3259 { "(bad)", { XX
} },
3260 { "(bad)", { XX
} },
3261 { "(bad)", { XX
} },
3263 { "(bad)", { XX
} },
3264 { "(bad)", { XX
} },
3265 { "(bad)", { XX
} },
3266 { "(bad)", { XX
} },
3267 { "(bad)", { XX
} },
3268 { "(bad)", { XX
} },
3269 { "(bad)", { XX
} },
3270 { "(bad)", { XX
} },
3272 { "(bad)", { XX
} },
3273 { "(bad)", { XX
} },
3274 { "(bad)", { XX
} },
3275 { "(bad)", { XX
} },
3276 { "(bad)", { XX
} },
3277 { "(bad)", { XX
} },
3278 { "(bad)", { XX
} },
3279 { "(bad)", { XX
} },
3281 { "(bad)", { XX
} },
3282 { "(bad)", { XX
} },
3283 { "(bad)", { XX
} },
3284 { "(bad)", { XX
} },
3285 { "(bad)", { XX
} },
3286 { "(bad)", { XX
} },
3287 { "(bad)", { XX
} },
3288 { "(bad)", { XX
} },
3290 { "(bad)", { XX
} },
3291 { "(bad)", { XX
} },
3292 { "(bad)", { XX
} },
3293 { "(bad)", { XX
} },
3294 { "(bad)", { XX
} },
3295 { "(bad)", { XX
} },
3296 { "(bad)", { XX
} },
3297 { "(bad)", { XX
} },
3299 { "(bad)", { XX
} },
3300 { "(bad)", { XX
} },
3301 { "(bad)", { XX
} },
3302 { "(bad)", { XX
} },
3303 { "(bad)", { XX
} },
3304 { "(bad)", { XX
} },
3305 { "(bad)", { XX
} },
3306 { "(bad)", { XX
} },
3308 { "(bad)", { XX
} },
3309 { "(bad)", { XX
} },
3310 { "(bad)", { XX
} },
3311 { "(bad)", { XX
} },
3312 { "(bad)", { XX
} },
3313 { "(bad)", { XX
} },
3314 { "(bad)", { XX
} },
3315 { "(bad)", { XX
} },
3317 { "(bad)", { XX
} },
3318 { "(bad)", { XX
} },
3319 { "(bad)", { XX
} },
3320 { "(bad)", { XX
} },
3321 { "(bad)", { XX
} },
3322 { "(bad)", { XX
} },
3323 { "(bad)", { XX
} },
3324 { "(bad)", { XX
} },
3328 #define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
3340 fetch_data(the_info
, codep
+ 1);
3344 /* REX prefixes family. */
3361 if (address_mode
== mode_64bit
)
3367 prefixes
|= PREFIX_REPZ
;
3370 prefixes
|= PREFIX_REPNZ
;
3373 prefixes
|= PREFIX_LOCK
;
3376 prefixes
|= PREFIX_CS
;
3379 prefixes
|= PREFIX_SS
;
3382 prefixes
|= PREFIX_DS
;
3385 prefixes
|= PREFIX_ES
;
3388 prefixes
|= PREFIX_FS
;
3391 prefixes
|= PREFIX_GS
;
3394 prefixes
|= PREFIX_DATA
;
3397 prefixes
|= PREFIX_ADDR
;
3400 /* fwait is really an instruction. If there are prefixes
3401 before the fwait, they belong to the fwait, *not* to the
3402 following instruction. */
3403 if (prefixes
|| rex
)
3405 prefixes
|= PREFIX_FWAIT
;
3409 prefixes
= PREFIX_FWAIT
;
3414 /* Rex is ignored when followed by another prefix. */
3425 /* Return the name of the prefix byte PREF, or NULL if PREF is not a
3429 prefix_name (int pref
, int sizeflag
)
3431 static const char * const rexes
[16] =
3436 "rex.XB", /* 0x43 */
3438 "rex.RB", /* 0x45 */
3439 "rex.RX", /* 0x46 */
3440 "rex.RXB", /* 0x47 */
3442 "rex.WB", /* 0x49 */
3443 "rex.WX", /* 0x4a */
3444 "rex.WXB", /* 0x4b */
3445 "rex.WR", /* 0x4c */
3446 "rex.WRB", /* 0x4d */
3447 "rex.WRX", /* 0x4e */
3448 "rex.WRXB", /* 0x4f */
3453 /* REX prefixes family. */
3470 return rexes
[pref
- 0x40];
3490 return (sizeflag
& DFLAG
) ? "data16" : "data32";
3492 if (address_mode
== mode_64bit
)
3493 return (sizeflag
& AFLAG
) ? "addr32" : "addr64";
3495 return (sizeflag
& AFLAG
) ? "addr16" : "addr32";
3503 static char op_out
[MAX_OPERANDS
][100];
3504 static int op_ad
, op_index
[MAX_OPERANDS
];
3505 static int two_source_ops
;
3506 static bfd_vma op_address
[MAX_OPERANDS
];
3507 static bfd_vma op_riprel
[MAX_OPERANDS
];
3508 static bfd_vma start_pc
;
3511 * On the 386's of 1988, the maximum length of an instruction is 15 bytes.
3512 * (see topic "Redundant prefixes" in the "Differences from 8086"
3513 * section of the "Virtual 8086 Mode" chapter.)
3514 * 'pc' should be the address of this instruction, it will
3515 * be used to print the target address if this is a relative jump or call
3516 * The function returns the length of this instruction in bytes.
3519 static char intel_syntax
;
3520 static char open_char
;
3521 static char close_char
;
3522 static char separator_char
;
3523 static char scale_char
;
3526 print_insn_i386 (bfd_vma pc
, disassemble_info
*info
)
3530 return print_insn (pc
, info
);
3534 print_insn (bfd_vma pc
, disassemble_info
*info
)
3536 const struct dis386
*dp
;
3538 char *op_txt
[MAX_OPERANDS
];
3540 unsigned char uses_DATA_prefix
, uses_LOCK_prefix
;
3541 unsigned char uses_REPNZ_prefix
, uses_REPZ_prefix
;
3544 struct dis_private priv
;
3547 if (info
->mach
== bfd_mach_x86_64_intel_syntax
3548 || info
->mach
== bfd_mach_x86_64
)
3549 address_mode
= mode_64bit
;
3551 address_mode
= mode_32bit
;
3553 if (intel_syntax
== (char) -1)
3554 intel_syntax
= (info
->mach
== bfd_mach_i386_i386_intel_syntax
3555 || info
->mach
== bfd_mach_x86_64_intel_syntax
);
3557 if (info
->mach
== bfd_mach_i386_i386
3558 || info
->mach
== bfd_mach_x86_64
3559 || info
->mach
== bfd_mach_i386_i386_intel_syntax
3560 || info
->mach
== bfd_mach_x86_64_intel_syntax
)
3561 priv
.orig_sizeflag
= AFLAG
| DFLAG
;
3562 else if (info
->mach
== bfd_mach_i386_i8086
)
3563 priv
.orig_sizeflag
= 0;
3567 for (p
= info
->disassembler_options
; p
!= NULL
; )
3569 if (strncmp (p
, "x86-64", 6) == 0)
3571 address_mode
= mode_64bit
;
3572 priv
.orig_sizeflag
= AFLAG
| DFLAG
;
3574 else if (strncmp (p
, "i386", 4) == 0)
3576 address_mode
= mode_32bit
;
3577 priv
.orig_sizeflag
= AFLAG
| DFLAG
;
3579 else if (strncmp (p
, "i8086", 5) == 0)
3581 address_mode
= mode_16bit
;
3582 priv
.orig_sizeflag
= 0;
3584 else if (strncmp (p
, "intel", 5) == 0)
3588 else if (strncmp (p
, "att", 3) == 0)
3592 else if (strncmp (p
, "addr", 4) == 0)
3594 if (address_mode
== mode_64bit
)
3596 if (p
[4] == '3' && p
[5] == '2')
3597 priv
.orig_sizeflag
&= ~AFLAG
;
3598 else if (p
[4] == '6' && p
[5] == '4')
3599 priv
.orig_sizeflag
|= AFLAG
;
3603 if (p
[4] == '1' && p
[5] == '6')
3604 priv
.orig_sizeflag
&= ~AFLAG
;
3605 else if (p
[4] == '3' && p
[5] == '2')
3606 priv
.orig_sizeflag
|= AFLAG
;
3609 else if (strncmp (p
, "data", 4) == 0)
3611 if (p
[4] == '1' && p
[5] == '6')
3612 priv
.orig_sizeflag
&= ~DFLAG
;
3613 else if (p
[4] == '3' && p
[5] == '2')
3614 priv
.orig_sizeflag
|= DFLAG
;
3616 else if (strncmp (p
, "suffix", 6) == 0)
3617 priv
.orig_sizeflag
|= SUFFIX_ALWAYS
;
3619 p
= strchr (p
, ',');
3626 names64
= intel_names64
;
3627 names32
= intel_names32
;
3628 names16
= intel_names16
;
3629 names8
= intel_names8
;
3630 names8rex
= intel_names8rex
;
3631 names_seg
= intel_names_seg
;
3632 index16
= intel_index16
;
3635 separator_char
= '+';
3640 names64
= att_names64
;
3641 names32
= att_names32
;
3642 names16
= att_names16
;
3643 names8
= att_names8
;
3644 names8rex
= att_names8rex
;
3645 names_seg
= att_names_seg
;
3646 index16
= att_index16
;
3649 separator_char
= ',';
3653 /* The output looks better if we put 7 bytes on a line, since that
3654 puts most long word instructions on a single line. */
3655 info
->bytes_per_line
= 7;
3657 info
->private_data
= &priv
;
3658 priv
.max_fetched
= priv
.the_buffer
;
3659 priv
.insn_start
= pc
;
3662 for (i
= 0; i
< MAX_OPERANDS
; ++i
)
3670 start_codep
= priv
.the_buffer
;
3671 codep
= priv
.the_buffer
;
3673 if (sigsetjmp(priv
.bailout
, 0) != 0)
3677 /* Getting here means we tried for data but didn't get it. That
3678 means we have an incomplete instruction of some sort. Just
3679 print the first byte as a prefix or a .byte pseudo-op. */
3680 if (codep
> priv
.the_buffer
)
3682 name
= prefix_name (priv
.the_buffer
[0], priv
.orig_sizeflag
);
3684 (*info
->fprintf_func
) (info
->stream
, "%s", name
);
3687 /* Just print the first byte as a .byte instruction. */
3688 (*info
->fprintf_func
) (info
->stream
, ".byte 0x%x",
3689 (unsigned int) priv
.the_buffer
[0]);
3702 sizeflag
= priv
.orig_sizeflag
;
3704 fetch_data(info
, codep
+ 1);
3705 two_source_ops
= (*codep
== 0x62) || (*codep
== 0xc8);
3707 if (((prefixes
& PREFIX_FWAIT
)
3708 && ((*codep
< 0xd8) || (*codep
> 0xdf)))
3709 || (rex
&& rex_used
))
3713 /* fwait not followed by floating point instruction, or rex followed
3714 by other prefixes. Print the first prefix. */
3715 name
= prefix_name (priv
.the_buffer
[0], priv
.orig_sizeflag
);
3717 name
= INTERNAL_DISASSEMBLER_ERROR
;
3718 (*info
->fprintf_func
) (info
->stream
, "%s", name
);
3725 unsigned char threebyte
;
3726 fetch_data(info
, codep
+ 2);
3727 threebyte
= *++codep
;
3728 dp
= &dis386_twobyte
[threebyte
];
3729 need_modrm
= twobyte_has_modrm
[*codep
];
3730 uses_DATA_prefix
= twobyte_uses_DATA_prefix
[*codep
];
3731 uses_REPNZ_prefix
= twobyte_uses_REPNZ_prefix
[*codep
];
3732 uses_REPZ_prefix
= twobyte_uses_REPZ_prefix
[*codep
];
3733 uses_LOCK_prefix
= (*codep
& ~0x02) == 0x20;
3735 if (dp
->name
== NULL
&& dp
->op
[0].bytemode
== IS_3BYTE_OPCODE
)
3737 fetch_data(info
, codep
+ 2);
3742 uses_DATA_prefix
= threebyte_0x38_uses_DATA_prefix
[op
];
3743 uses_REPNZ_prefix
= threebyte_0x38_uses_REPNZ_prefix
[op
];
3744 uses_REPZ_prefix
= threebyte_0x38_uses_REPZ_prefix
[op
];
3747 uses_DATA_prefix
= threebyte_0x3a_uses_DATA_prefix
[op
];
3748 uses_REPNZ_prefix
= threebyte_0x3a_uses_REPNZ_prefix
[op
];
3749 uses_REPZ_prefix
= threebyte_0x3a_uses_REPZ_prefix
[op
];
3758 dp
= &dis386
[*codep
];
3759 need_modrm
= onebyte_has_modrm
[*codep
];
3760 uses_DATA_prefix
= 0;
3761 uses_REPNZ_prefix
= 0;
3762 /* pause is 0xf3 0x90. */
3763 uses_REPZ_prefix
= *codep
== 0x90;
3764 uses_LOCK_prefix
= 0;
3768 if (!uses_REPZ_prefix
&& (prefixes
& PREFIX_REPZ
))
3771 used_prefixes
|= PREFIX_REPZ
;
3773 if (!uses_REPNZ_prefix
&& (prefixes
& PREFIX_REPNZ
))
3776 used_prefixes
|= PREFIX_REPNZ
;
3779 if (!uses_LOCK_prefix
&& (prefixes
& PREFIX_LOCK
))
3782 used_prefixes
|= PREFIX_LOCK
;
3785 if (prefixes
& PREFIX_ADDR
)
3788 if (dp
->op
[2].bytemode
!= loop_jcxz_mode
|| intel_syntax
)
3790 if ((sizeflag
& AFLAG
) || address_mode
== mode_64bit
)
3791 oappend ("addr32 ");
3793 oappend ("addr16 ");
3794 used_prefixes
|= PREFIX_ADDR
;
3798 if (!uses_DATA_prefix
&& (prefixes
& PREFIX_DATA
))
3801 if (dp
->op
[2].bytemode
== cond_jump_mode
3802 && dp
->op
[0].bytemode
== v_mode
3805 if (sizeflag
& DFLAG
)
3806 oappend ("data32 ");
3808 oappend ("data16 ");
3809 used_prefixes
|= PREFIX_DATA
;
3813 if (dp
->name
== NULL
&& dp
->op
[0].bytemode
== IS_3BYTE_OPCODE
)
3815 dp
= &three_byte_table
[dp
->op
[1].bytemode
][op
];
3816 modrm
.mod
= (*codep
>> 6) & 3;
3817 modrm
.reg
= (*codep
>> 3) & 7;
3818 modrm
.rm
= *codep
& 7;
3820 else if (need_modrm
)
3822 fetch_data(info
, codep
+ 1);
3823 modrm
.mod
= (*codep
>> 6) & 3;
3824 modrm
.reg
= (*codep
>> 3) & 7;
3825 modrm
.rm
= *codep
& 7;
3828 if (dp
->name
== NULL
&& dp
->op
[0].bytemode
== FLOATCODE
)
3835 if (dp
->name
== NULL
)
3837 switch (dp
->op
[0].bytemode
)
3840 dp
= &grps
[dp
->op
[1].bytemode
][modrm
.reg
];
3843 case USE_PREFIX_USER_TABLE
:
3845 used_prefixes
|= (prefixes
& PREFIX_REPZ
);
3846 if (prefixes
& PREFIX_REPZ
)
3850 /* We should check PREFIX_REPNZ and PREFIX_REPZ
3851 before PREFIX_DATA. */
3852 used_prefixes
|= (prefixes
& PREFIX_REPNZ
);
3853 if (prefixes
& PREFIX_REPNZ
)
3857 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3858 if (prefixes
& PREFIX_DATA
)
3862 dp
= &prefix_user_table
[dp
->op
[1].bytemode
][index
];
3865 case X86_64_SPECIAL
:
3866 index
= address_mode
== mode_64bit
? 1 : 0;
3867 dp
= &x86_64_table
[dp
->op
[1].bytemode
][index
];
3871 oappend (INTERNAL_DISASSEMBLER_ERROR
);
3876 if (putop (dp
->name
, sizeflag
) == 0)
3878 for (i
= 0; i
< MAX_OPERANDS
; ++i
)
3881 op_ad
= MAX_OPERANDS
- 1 - i
;
3883 (*dp
->op
[i
].rtn
) (dp
->op
[i
].bytemode
, sizeflag
);
3888 /* See if any prefixes were not used. If so, print the first one
3889 separately. If we don't do this, we'll wind up printing an
3890 instruction stream which does not precisely correspond to the
3891 bytes we are disassembling. */
3892 if ((prefixes
& ~used_prefixes
) != 0)
3896 name
= prefix_name (priv
.the_buffer
[0], priv
.orig_sizeflag
);
3898 name
= INTERNAL_DISASSEMBLER_ERROR
;
3899 (*info
->fprintf_func
) (info
->stream
, "%s", name
);
3902 if (rex
& ~rex_used
)
3905 name
= prefix_name (rex
| 0x40, priv
.orig_sizeflag
);
3907 name
= INTERNAL_DISASSEMBLER_ERROR
;
3908 (*info
->fprintf_func
) (info
->stream
, "%s ", name
);
3911 obufp
= obuf
+ strlen (obuf
);
3912 for (i
= strlen (obuf
); i
< 6; i
++)
3915 (*info
->fprintf_func
) (info
->stream
, "%s", obuf
);
3917 /* The enter and bound instructions are printed with operands in the same
3918 order as the intel book; everything else is printed in reverse order. */
3919 if (intel_syntax
|| two_source_ops
)
3923 for (i
= 0; i
< MAX_OPERANDS
; ++i
)
3924 op_txt
[i
] = op_out
[i
];
3926 for (i
= 0; i
< (MAX_OPERANDS
>> 1); ++i
)
3928 op_ad
= op_index
[i
];
3929 op_index
[i
] = op_index
[MAX_OPERANDS
- 1 - i
];
3930 op_index
[MAX_OPERANDS
- 1 - i
] = op_ad
;
3931 riprel
= op_riprel
[i
];
3932 op_riprel
[i
] = op_riprel
[MAX_OPERANDS
- 1 - i
];
3933 op_riprel
[MAX_OPERANDS
- 1 - i
] = riprel
;
3938 for (i
= 0; i
< MAX_OPERANDS
; ++i
)
3939 op_txt
[MAX_OPERANDS
- 1 - i
] = op_out
[i
];
3943 for (i
= 0; i
< MAX_OPERANDS
; ++i
)
3947 (*info
->fprintf_func
) (info
->stream
, ",");
3948 if (op_index
[i
] != -1 && !op_riprel
[i
])
3949 (*info
->print_address_func
) ((bfd_vma
) op_address
[op_index
[i
]], info
);
3951 (*info
->fprintf_func
) (info
->stream
, "%s", op_txt
[i
]);
3955 for (i
= 0; i
< MAX_OPERANDS
; i
++)
3956 if (op_index
[i
] != -1 && op_riprel
[i
])
3958 (*info
->fprintf_func
) (info
->stream
, " # ");
3959 (*info
->print_address_func
) ((bfd_vma
) (start_pc
+ codep
- start_codep
3960 + op_address
[op_index
[i
]]), info
);
3963 return codep
- priv
.the_buffer
;
3966 static const char *float_mem
[] = {
4041 static const unsigned char float_mem_mode
[] = {
4116 #define ST { OP_ST, 0 }
4117 #define STi { OP_STi, 0 }
4119 #define FGRPd9_2 NULL, { { NULL, 0 } }
4120 #define FGRPd9_4 NULL, { { NULL, 1 } }
4121 #define FGRPd9_5 NULL, { { NULL, 2 } }
4122 #define FGRPd9_6 NULL, { { NULL, 3 } }
4123 #define FGRPd9_7 NULL, { { NULL, 4 } }
4124 #define FGRPda_5 NULL, { { NULL, 5 } }
4125 #define FGRPdb_4 NULL, { { NULL, 6 } }
4126 #define FGRPde_3 NULL, { { NULL, 7 } }
4127 #define FGRPdf_4 NULL, { { NULL, 8 } }
4129 static const struct dis386 float_reg
[][8] = {
4132 { "fadd", { ST
, STi
} },
4133 { "fmul", { ST
, STi
} },
4134 { "fcom", { STi
} },
4135 { "fcomp", { STi
} },
4136 { "fsub", { ST
, STi
} },
4137 { "fsubr", { ST
, STi
} },
4138 { "fdiv", { ST
, STi
} },
4139 { "fdivr", { ST
, STi
} },
4144 { "fxch", { STi
} },
4146 { "(bad)", { XX
} },
4154 { "fcmovb", { ST
, STi
} },
4155 { "fcmove", { ST
, STi
} },
4156 { "fcmovbe",{ ST
, STi
} },
4157 { "fcmovu", { ST
, STi
} },
4158 { "(bad)", { XX
} },
4160 { "(bad)", { XX
} },
4161 { "(bad)", { XX
} },
4165 { "fcmovnb",{ ST
, STi
} },
4166 { "fcmovne",{ ST
, STi
} },
4167 { "fcmovnbe",{ ST
, STi
} },
4168 { "fcmovnu",{ ST
, STi
} },
4170 { "fucomi", { ST
, STi
} },
4171 { "fcomi", { ST
, STi
} },
4172 { "(bad)", { XX
} },
4176 { "fadd", { STi
, ST
} },
4177 { "fmul", { STi
, ST
} },
4178 { "(bad)", { XX
} },
4179 { "(bad)", { XX
} },
4181 { "fsub", { STi
, ST
} },
4182 { "fsubr", { STi
, ST
} },
4183 { "fdiv", { STi
, ST
} },
4184 { "fdivr", { STi
, ST
} },
4186 { "fsubr", { STi
, ST
} },
4187 { "fsub", { STi
, ST
} },
4188 { "fdivr", { STi
, ST
} },
4189 { "fdiv", { STi
, ST
} },
4194 { "ffree", { STi
} },
4195 { "(bad)", { XX
} },
4197 { "fstp", { STi
} },
4198 { "fucom", { STi
} },
4199 { "fucomp", { STi
} },
4200 { "(bad)", { XX
} },
4201 { "(bad)", { XX
} },
4205 { "faddp", { STi
, ST
} },
4206 { "fmulp", { STi
, ST
} },
4207 { "(bad)", { XX
} },
4210 { "fsubp", { STi
, ST
} },
4211 { "fsubrp", { STi
, ST
} },
4212 { "fdivp", { STi
, ST
} },
4213 { "fdivrp", { STi
, ST
} },
4215 { "fsubrp", { STi
, ST
} },
4216 { "fsubp", { STi
, ST
} },
4217 { "fdivrp", { STi
, ST
} },
4218 { "fdivp", { STi
, ST
} },
4223 { "ffreep", { STi
} },
4224 { "(bad)", { XX
} },
4225 { "(bad)", { XX
} },
4226 { "(bad)", { XX
} },
4228 { "fucomip", { ST
, STi
} },
4229 { "fcomip", { ST
, STi
} },
4230 { "(bad)", { XX
} },
4234 static const char *fgrps
[][8] = {
4237 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4242 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
4247 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
4252 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
4257 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
4262 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4267 "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
4268 "fNsetpm(287 only)","(bad)","(bad)","(bad)",
4273 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4278 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4283 dofloat (int sizeflag
)
4285 const struct dis386
*dp
;
4286 unsigned char floatop
;
4288 floatop
= codep
[-1];
4292 int fp_indx
= (floatop
- 0xd8) * 8 + modrm
.reg
;
4294 putop (float_mem
[fp_indx
], sizeflag
);
4297 OP_E (float_mem_mode
[fp_indx
], sizeflag
);
4300 /* Skip mod/rm byte. */
4304 dp
= &float_reg
[floatop
- 0xd8][modrm
.reg
];
4305 if (dp
->name
== NULL
)
4307 putop (fgrps
[dp
->op
[0].bytemode
][modrm
.rm
], sizeflag
);
4309 /* Instruction fnstsw is only one with strange arg. */
4310 if (floatop
== 0xdf && codep
[-1] == 0xe0)
4311 pstrcpy (op_out
[0], sizeof(op_out
[0]), names16
[0]);
4315 putop (dp
->name
, sizeflag
);
4320 (*dp
->op
[0].rtn
) (dp
->op
[0].bytemode
, sizeflag
);
4325 (*dp
->op
[1].rtn
) (dp
->op
[1].bytemode
, sizeflag
);
4330 OP_ST (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
4332 oappend ("%st" + intel_syntax
);
4336 OP_STi (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
4338 snprintf (scratchbuf
, sizeof(scratchbuf
), "%%st(%d)", modrm
.rm
);
4339 oappend (scratchbuf
+ intel_syntax
);
4342 /* Capital letters in template are macros. */
4344 putop (const char *template, int sizeflag
)
4349 for (p
= template; *p
; p
++)
4360 if (address_mode
== mode_64bit
)
4368 /* Alternative not valid. */
4369 pstrcpy (obuf
, sizeof(obuf
), "(bad)");
4373 else if (*p
== '\0')
4394 if (modrm
.mod
!= 3 || (sizeflag
& SUFFIX_ALWAYS
))
4400 if (sizeflag
& SUFFIX_ALWAYS
)
4404 if (intel_syntax
&& !alt
)
4406 if ((prefixes
& PREFIX_DATA
) || (sizeflag
& SUFFIX_ALWAYS
))
4408 if (sizeflag
& DFLAG
)
4409 *obufp
++ = intel_syntax
? 'd' : 'l';
4411 *obufp
++ = intel_syntax
? 'w' : 's';
4412 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4416 if (intel_syntax
|| !(sizeflag
& SUFFIX_ALWAYS
))
4423 else if (sizeflag
& DFLAG
)
4424 *obufp
++ = intel_syntax
? 'd' : 'l';
4427 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4432 case 'E': /* For jcxz/jecxz */
4433 if (address_mode
== mode_64bit
)
4435 if (sizeflag
& AFLAG
)
4441 if (sizeflag
& AFLAG
)
4443 used_prefixes
|= (prefixes
& PREFIX_ADDR
);
4448 if ((prefixes
& PREFIX_ADDR
) || (sizeflag
& SUFFIX_ALWAYS
))
4450 if (sizeflag
& AFLAG
)
4451 *obufp
++ = address_mode
== mode_64bit
? 'q' : 'l';
4453 *obufp
++ = address_mode
== mode_64bit
? 'l' : 'w';
4454 used_prefixes
|= (prefixes
& PREFIX_ADDR
);
4458 if (intel_syntax
|| (obufp
[-1] != 's' && !(sizeflag
& SUFFIX_ALWAYS
)))
4460 if ((rex
& REX_W
) || (sizeflag
& DFLAG
))
4465 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4470 if ((prefixes
& (PREFIX_CS
| PREFIX_DS
)) == PREFIX_CS
4471 || (prefixes
& (PREFIX_CS
| PREFIX_DS
)) == PREFIX_DS
)
4473 used_prefixes
|= prefixes
& (PREFIX_CS
| PREFIX_DS
);
4476 if (prefixes
& PREFIX_DS
)
4497 if (address_mode
== mode_64bit
&& (sizeflag
& SUFFIX_ALWAYS
))
4506 if (sizeflag
& SUFFIX_ALWAYS
)
4510 if ((prefixes
& PREFIX_FWAIT
) == 0)
4513 used_prefixes
|= PREFIX_FWAIT
;
4519 else if (intel_syntax
&& (sizeflag
& DFLAG
))
4524 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4529 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
4538 if ((prefixes
& PREFIX_DATA
)
4540 || (sizeflag
& SUFFIX_ALWAYS
))
4547 if (sizeflag
& DFLAG
)
4552 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4558 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
4560 if (modrm
.mod
!= 3 || (sizeflag
& SUFFIX_ALWAYS
))
4566 if (intel_syntax
&& !alt
)
4569 if (modrm
.mod
!= 3 || (sizeflag
& SUFFIX_ALWAYS
))
4575 if (sizeflag
& DFLAG
)
4576 *obufp
++ = intel_syntax
? 'd' : 'l';
4580 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4587 else if (sizeflag
& DFLAG
)
4596 if (intel_syntax
&& !p
[1]
4597 && ((rex
& REX_W
) || (sizeflag
& DFLAG
)))
4600 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4605 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
4607 if (sizeflag
& SUFFIX_ALWAYS
)
4615 if (sizeflag
& SUFFIX_ALWAYS
)
4621 if (sizeflag
& DFLAG
)
4625 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4630 if (prefixes
& PREFIX_DATA
)
4634 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4645 /* implicit operand size 'l' for i386 or 'q' for x86-64 */
4647 /* operand size flag for cwtl, cbtw */
4656 else if (sizeflag
& DFLAG
)
4661 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4671 oappend (const char *s
)
4674 obufp
+= strlen (s
);
4680 if (prefixes
& PREFIX_CS
)
4682 used_prefixes
|= PREFIX_CS
;
4683 oappend ("%cs:" + intel_syntax
);
4685 if (prefixes
& PREFIX_DS
)
4687 used_prefixes
|= PREFIX_DS
;
4688 oappend ("%ds:" + intel_syntax
);
4690 if (prefixes
& PREFIX_SS
)
4692 used_prefixes
|= PREFIX_SS
;
4693 oappend ("%ss:" + intel_syntax
);
4695 if (prefixes
& PREFIX_ES
)
4697 used_prefixes
|= PREFIX_ES
;
4698 oappend ("%es:" + intel_syntax
);
4700 if (prefixes
& PREFIX_FS
)
4702 used_prefixes
|= PREFIX_FS
;
4703 oappend ("%fs:" + intel_syntax
);
4705 if (prefixes
& PREFIX_GS
)
4707 used_prefixes
|= PREFIX_GS
;
4708 oappend ("%gs:" + intel_syntax
);
4713 OP_indirE (int bytemode
, int sizeflag
)
4717 OP_E (bytemode
, sizeflag
);
4721 print_operand_value (char *buf
, size_t bufsize
, int hex
, bfd_vma disp
)
4723 if (address_mode
== mode_64bit
)
4731 snprintf_vma (tmp
, sizeof(tmp
), disp
);
4732 for (i
= 0; tmp
[i
] == '0' && tmp
[i
+ 1]; i
++) {
4734 pstrcpy (buf
+ 2, bufsize
- 2, tmp
+ i
);
4738 bfd_signed_vma v
= disp
;
4745 /* Check for possible overflow on 0x8000000000000000. */
4748 pstrcpy (buf
, bufsize
, "9223372036854775808");
4754 pstrcpy (buf
, bufsize
, "0");
4762 tmp
[28 - i
] = (v
% 10) + '0';
4766 pstrcpy (buf
, bufsize
, tmp
+ 29 - i
);
4772 snprintf (buf
, bufsize
, "0x%x", (unsigned int) disp
);
4774 snprintf (buf
, bufsize
, "%d", (int) disp
);
4778 /* Put DISP in BUF as signed hex number. */
4781 print_displacement (char *buf
, bfd_vma disp
)
4783 bfd_signed_vma val
= disp
;
4792 /* Check for possible overflow. */
4795 switch (address_mode
)
4798 strcpy (buf
+ j
, "0x8000000000000000");
4801 strcpy (buf
+ j
, "0x80000000");
4804 strcpy (buf
+ j
, "0x8000");
4814 snprintf_vma (tmp
, sizeof(tmp
), val
);
4815 for (i
= 0; tmp
[i
] == '0'; i
++)
4819 strcpy (buf
+ j
, tmp
+ i
);
4823 intel_operand_size (int bytemode
, int sizeflag
)
4829 oappend ("BYTE PTR ");
4833 oappend ("WORD PTR ");
4836 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
4838 oappend ("QWORD PTR ");
4839 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4847 oappend ("QWORD PTR ");
4848 else if ((sizeflag
& DFLAG
) || bytemode
== dq_mode
)
4849 oappend ("DWORD PTR ");
4851 oappend ("WORD PTR ");
4852 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4855 if ((rex
& REX_W
) || (sizeflag
& DFLAG
))
4857 oappend ("WORD PTR ");
4859 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4863 oappend ("DWORD PTR ");
4866 oappend ("QWORD PTR ");
4869 if (address_mode
== mode_64bit
)
4870 oappend ("QWORD PTR ");
4872 oappend ("DWORD PTR ");
4875 if (sizeflag
& DFLAG
)
4876 oappend ("FWORD PTR ");
4878 oappend ("DWORD PTR ");
4879 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4882 oappend ("TBYTE PTR ");
4885 oappend ("XMMWORD PTR ");
4888 oappend ("OWORD PTR ");
4896 OP_E (int bytemode
, int sizeflag
)
4905 /* Skip mod/rm byte. */
4916 oappend (names8rex
[modrm
.rm
+ add
]);
4918 oappend (names8
[modrm
.rm
+ add
]);
4921 oappend (names16
[modrm
.rm
+ add
]);
4924 oappend (names32
[modrm
.rm
+ add
]);
4927 oappend (names64
[modrm
.rm
+ add
]);
4930 if (address_mode
== mode_64bit
)
4931 oappend (names64
[modrm
.rm
+ add
]);
4933 oappend (names32
[modrm
.rm
+ add
]);
4936 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
4938 oappend (names64
[modrm
.rm
+ add
]);
4939 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4951 oappend (names64
[modrm
.rm
+ add
]);
4952 else if ((sizeflag
& DFLAG
) || bytemode
!= v_mode
)
4953 oappend (names32
[modrm
.rm
+ add
]);
4955 oappend (names16
[modrm
.rm
+ add
]);
4956 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4961 oappend (INTERNAL_DISASSEMBLER_ERROR
);
4969 intel_operand_size (bytemode
, sizeflag
);
4972 if ((sizeflag
& AFLAG
) || address_mode
== mode_64bit
)
4974 /* 32/64 bit address mode */
4989 fetch_data(the_info
, codep
+ 1);
4990 index
= (*codep
>> 3) & 7;
4991 if (address_mode
== mode_64bit
|| index
!= 0x4)
4992 /* When INDEX == 0x4 in 32 bit mode, SCALE is ignored. */
4993 scale
= (*codep
>> 6) & 3;
5005 if ((base
& 7) == 5)
5008 if (address_mode
== mode_64bit
&& !havesib
)
5014 fetch_data (the_info
, codep
+ 1);
5016 if ((disp
& 0x80) != 0)
5024 havedisp
= havebase
|| (havesib
&& (index
!= 4 || scale
!= 0));
5027 if (modrm
.mod
!= 0 || (base
& 7) == 5)
5029 if (havedisp
|| riprel
)
5030 print_displacement (scratchbuf
, disp
);
5032 print_operand_value (scratchbuf
, sizeof(scratchbuf
), 1, disp
);
5033 oappend (scratchbuf
);
5041 if (havedisp
|| (intel_syntax
&& riprel
))
5043 *obufp
++ = open_char
;
5044 if (intel_syntax
&& riprel
)
5051 oappend (address_mode
== mode_64bit
&& (sizeflag
& AFLAG
)
5052 ? names64
[base
] : names32
[base
]);
5057 if (!intel_syntax
|| havebase
)
5059 *obufp
++ = separator_char
;
5062 oappend (address_mode
== mode_64bit
&& (sizeflag
& AFLAG
)
5063 ? names64
[index
] : names32
[index
]);
5065 if (scale
!= 0 || (!intel_syntax
&& index
!= 4))
5067 *obufp
++ = scale_char
;
5069 snprintf (scratchbuf
, sizeof(scratchbuf
), "%d", 1 << scale
);
5070 oappend (scratchbuf
);
5074 && (disp
|| modrm
.mod
!= 0 || (base
& 7) == 5))
5076 if ((bfd_signed_vma
) disp
>= 0)
5081 else if (modrm
.mod
!= 1)
5085 disp
= - (bfd_signed_vma
) disp
;
5088 print_displacement (scratchbuf
, disp
);
5089 oappend (scratchbuf
);
5092 *obufp
++ = close_char
;
5095 else if (intel_syntax
)
5097 if (modrm
.mod
!= 0 || (base
& 7) == 5)
5099 if (prefixes
& (PREFIX_CS
| PREFIX_SS
| PREFIX_DS
5100 | PREFIX_ES
| PREFIX_FS
| PREFIX_GS
))
5104 oappend (names_seg
[ds_reg
- es_reg
]);
5107 print_operand_value (scratchbuf
, sizeof(scratchbuf
), 1, disp
);
5108 oappend (scratchbuf
);
5113 { /* 16 bit address mode */
5120 if ((disp
& 0x8000) != 0)
5125 fetch_data(the_info
, codep
+ 1);
5127 if ((disp
& 0x80) != 0)
5132 if ((disp
& 0x8000) != 0)
5138 if (modrm
.mod
!= 0 || modrm
.rm
== 6)
5140 print_displacement (scratchbuf
, disp
);
5141 oappend (scratchbuf
);
5144 if (modrm
.mod
!= 0 || modrm
.rm
!= 6)
5146 *obufp
++ = open_char
;
5148 oappend (index16
[modrm
.rm
]);
5150 && (disp
|| modrm
.mod
!= 0 || modrm
.rm
== 6))
5152 if ((bfd_signed_vma
) disp
>= 0)
5157 else if (modrm
.mod
!= 1)
5161 disp
= - (bfd_signed_vma
) disp
;
5164 print_displacement (scratchbuf
, disp
);
5165 oappend (scratchbuf
);
5168 *obufp
++ = close_char
;
5171 else if (intel_syntax
)
5173 if (prefixes
& (PREFIX_CS
| PREFIX_SS
| PREFIX_DS
5174 | PREFIX_ES
| PREFIX_FS
| PREFIX_GS
))
5178 oappend (names_seg
[ds_reg
- es_reg
]);
5181 print_operand_value (scratchbuf
, sizeof(scratchbuf
), 1,
5183 oappend (scratchbuf
);
5189 OP_G (int bytemode
, int sizeflag
)
5200 oappend (names8rex
[modrm
.reg
+ add
]);
5202 oappend (names8
[modrm
.reg
+ add
]);
5205 oappend (names16
[modrm
.reg
+ add
]);
5208 oappend (names32
[modrm
.reg
+ add
]);
5211 oappend (names64
[modrm
.reg
+ add
]);
5220 oappend (names64
[modrm
.reg
+ add
]);
5221 else if ((sizeflag
& DFLAG
) || bytemode
!= v_mode
)
5222 oappend (names32
[modrm
.reg
+ add
]);
5224 oappend (names16
[modrm
.reg
+ add
]);
5225 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5228 if (address_mode
== mode_64bit
)
5229 oappend (names64
[modrm
.reg
+ add
]);
5231 oappend (names32
[modrm
.reg
+ add
]);
5234 oappend (INTERNAL_DISASSEMBLER_ERROR
);
5247 fetch_data(the_info
, codep
+ 8);
5248 a
= *codep
++ & 0xff;
5249 a
|= (*codep
++ & 0xff) << 8;
5250 a
|= (*codep
++ & 0xff) << 16;
5251 a
|= (*codep
++ & 0xff) << 24;
5252 b
= *codep
++ & 0xff;
5253 b
|= (*codep
++ & 0xff) << 8;
5254 b
|= (*codep
++ & 0xff) << 16;
5255 b
|= (*codep
++ & 0xff) << 24;
5256 x
= a
+ ((bfd_vma
) b
<< 32);
5264 static bfd_signed_vma
5267 bfd_signed_vma x
= 0;
5269 fetch_data(the_info
, codep
+ 4);
5270 x
= *codep
++ & (bfd_signed_vma
) 0xff;
5271 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 8;
5272 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 16;
5273 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 24;
5277 static bfd_signed_vma
5280 bfd_signed_vma x
= 0;
5282 fetch_data(the_info
, codep
+ 4);
5283 x
= *codep
++ & (bfd_signed_vma
) 0xff;
5284 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 8;
5285 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 16;
5286 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 24;
5288 x
= (x
^ ((bfd_signed_vma
) 1 << 31)) - ((bfd_signed_vma
) 1 << 31);
5298 fetch_data(the_info
, codep
+ 2);
5299 x
= *codep
++ & 0xff;
5300 x
|= (*codep
++ & 0xff) << 8;
5305 set_op (bfd_vma op
, int riprel
)
5307 op_index
[op_ad
] = op_ad
;
5308 if (address_mode
== mode_64bit
)
5310 op_address
[op_ad
] = op
;
5311 op_riprel
[op_ad
] = riprel
;
5315 /* Mask to get a 32-bit address. */
5316 op_address
[op_ad
] = op
& 0xffffffff;
5317 op_riprel
[op_ad
] = riprel
& 0xffffffff;
5322 OP_REG (int code
, int sizeflag
)
5332 case ax_reg
: case cx_reg
: case dx_reg
: case bx_reg
:
5333 case sp_reg
: case bp_reg
: case si_reg
: case di_reg
:
5334 s
= names16
[code
- ax_reg
+ add
];
5336 case es_reg
: case ss_reg
: case cs_reg
:
5337 case ds_reg
: case fs_reg
: case gs_reg
:
5338 s
= names_seg
[code
- es_reg
+ add
];
5340 case al_reg
: case ah_reg
: case cl_reg
: case ch_reg
:
5341 case dl_reg
: case dh_reg
: case bl_reg
: case bh_reg
:
5344 s
= names8rex
[code
- al_reg
+ add
];
5346 s
= names8
[code
- al_reg
];
5348 case rAX_reg
: case rCX_reg
: case rDX_reg
: case rBX_reg
:
5349 case rSP_reg
: case rBP_reg
: case rSI_reg
: case rDI_reg
:
5350 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
5352 s
= names64
[code
- rAX_reg
+ add
];
5355 code
+= eAX_reg
- rAX_reg
;
5357 case eAX_reg
: case eCX_reg
: case eDX_reg
: case eBX_reg
:
5358 case eSP_reg
: case eBP_reg
: case eSI_reg
: case eDI_reg
:
5361 s
= names64
[code
- eAX_reg
+ add
];
5362 else if (sizeflag
& DFLAG
)
5363 s
= names32
[code
- eAX_reg
+ add
];
5365 s
= names16
[code
- eAX_reg
+ add
];
5366 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5369 s
= INTERNAL_DISASSEMBLER_ERROR
;
5376 OP_IMREG (int code
, int sizeflag
)
5388 case ax_reg
: case cx_reg
: case dx_reg
: case bx_reg
:
5389 case sp_reg
: case bp_reg
: case si_reg
: case di_reg
:
5390 s
= names16
[code
- ax_reg
];
5392 case es_reg
: case ss_reg
: case cs_reg
:
5393 case ds_reg
: case fs_reg
: case gs_reg
:
5394 s
= names_seg
[code
- es_reg
];
5396 case al_reg
: case ah_reg
: case cl_reg
: case ch_reg
:
5397 case dl_reg
: case dh_reg
: case bl_reg
: case bh_reg
:
5400 s
= names8rex
[code
- al_reg
];
5402 s
= names8
[code
- al_reg
];
5404 case eAX_reg
: case eCX_reg
: case eDX_reg
: case eBX_reg
:
5405 case eSP_reg
: case eBP_reg
: case eSI_reg
: case eDI_reg
:
5408 s
= names64
[code
- eAX_reg
];
5409 else if (sizeflag
& DFLAG
)
5410 s
= names32
[code
- eAX_reg
];
5412 s
= names16
[code
- eAX_reg
];
5413 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5416 if ((rex
& REX_W
) || (sizeflag
& DFLAG
))
5421 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5424 s
= INTERNAL_DISASSEMBLER_ERROR
;
5431 OP_I (int bytemode
, int sizeflag
)
5434 bfd_signed_vma mask
= -1;
5439 fetch_data(the_info
, codep
+ 1);
5444 if (address_mode
== mode_64bit
)
5454 else if (sizeflag
& DFLAG
)
5464 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5475 oappend (INTERNAL_DISASSEMBLER_ERROR
);
5480 scratchbuf
[0] = '$';
5481 print_operand_value (scratchbuf
+ 1, sizeof(scratchbuf
) - 1, 1, op
);
5482 oappend (scratchbuf
+ intel_syntax
);
5483 scratchbuf
[0] = '\0';
5487 OP_I64 (int bytemode
, int sizeflag
)
5490 bfd_signed_vma mask
= -1;
5492 if (address_mode
!= mode_64bit
)
5494 OP_I (bytemode
, sizeflag
);
5501 fetch_data(the_info
, codep
+ 1);
5509 else if (sizeflag
& DFLAG
)
5519 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5526 oappend (INTERNAL_DISASSEMBLER_ERROR
);
5531 scratchbuf
[0] = '$';
5532 print_operand_value (scratchbuf
+ 1, sizeof(scratchbuf
) - 1, 1, op
);
5533 oappend (scratchbuf
+ intel_syntax
);
5534 scratchbuf
[0] = '\0';
5538 OP_sI (int bytemode
, int sizeflag
)
5545 fetch_data(the_info
, codep
+ 1);
5547 if ((op
& 0x80) != 0)
5554 else if (sizeflag
& DFLAG
)
5561 if ((op
& 0x8000) != 0)
5564 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5568 if ((op
& 0x8000) != 0)
5572 oappend (INTERNAL_DISASSEMBLER_ERROR
);
5576 scratchbuf
[0] = '$';
5577 print_operand_value (scratchbuf
+ 1, sizeof(scratchbuf
) - 1, 1, op
);
5578 oappend (scratchbuf
+ intel_syntax
);
5582 OP_J (int bytemode
, int sizeflag
)
5586 bfd_vma segment
= 0;
5591 fetch_data(the_info
, codep
+ 1);
5593 if ((disp
& 0x80) != 0)
5597 if ((sizeflag
& DFLAG
) || (rex
& REX_W
))
5602 if ((disp
& 0x8000) != 0)
5604 /* In 16bit mode, address is wrapped around at 64k within
5605 the same segment. Otherwise, a data16 prefix on a jump
5606 instruction means that the pc is masked to 16 bits after
5607 the displacement is added! */
5609 if ((prefixes
& PREFIX_DATA
) == 0)
5610 segment
= ((start_pc
+ codep
- start_codep
)
5611 & ~((bfd_vma
) 0xffff));
5613 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5616 oappend (INTERNAL_DISASSEMBLER_ERROR
);
5619 disp
= ((start_pc
+ codep
- start_codep
+ disp
) & mask
) | segment
;
5621 print_operand_value (scratchbuf
, sizeof(scratchbuf
), 1, disp
);
5622 oappend (scratchbuf
);
5626 OP_SEG (int bytemode
, int sizeflag
)
5628 if (bytemode
== w_mode
)
5629 oappend (names_seg
[modrm
.reg
]);
5631 OP_E (modrm
.mod
== 3 ? bytemode
: w_mode
, sizeflag
);
5635 OP_DIR (int dummy ATTRIBUTE_UNUSED
, int sizeflag
)
5639 if (sizeflag
& DFLAG
)
5649 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5651 snprintf (scratchbuf
, sizeof(scratchbuf
), "0x%x:0x%x", seg
, offset
);
5653 snprintf (scratchbuf
, sizeof(scratchbuf
), "$0x%x,$0x%x", seg
, offset
);
5654 oappend (scratchbuf
);
5658 OP_OFF (int bytemode
, int sizeflag
)
5662 if (intel_syntax
&& (sizeflag
& SUFFIX_ALWAYS
))
5663 intel_operand_size (bytemode
, sizeflag
);
5666 if ((sizeflag
& AFLAG
) || address_mode
== mode_64bit
)
5673 if (!(prefixes
& (PREFIX_CS
| PREFIX_SS
| PREFIX_DS
5674 | PREFIX_ES
| PREFIX_FS
| PREFIX_GS
)))
5676 oappend (names_seg
[ds_reg
- es_reg
]);
5680 print_operand_value (scratchbuf
, sizeof(scratchbuf
), 1, off
);
5681 oappend (scratchbuf
);
5685 OP_OFF64 (int bytemode
, int sizeflag
)
5689 if (address_mode
!= mode_64bit
5690 || (prefixes
& PREFIX_ADDR
))
5692 OP_OFF (bytemode
, sizeflag
);
5696 if (intel_syntax
&& (sizeflag
& SUFFIX_ALWAYS
))
5697 intel_operand_size (bytemode
, sizeflag
);
5704 if (!(prefixes
& (PREFIX_CS
| PREFIX_SS
| PREFIX_DS
5705 | PREFIX_ES
| PREFIX_FS
| PREFIX_GS
)))
5707 oappend (names_seg
[ds_reg
- es_reg
]);
5711 print_operand_value (scratchbuf
, sizeof(scratchbuf
), 1, off
);
5712 oappend (scratchbuf
);
5716 ptr_reg (int code
, int sizeflag
)
5720 *obufp
++ = open_char
;
5721 used_prefixes
|= (prefixes
& PREFIX_ADDR
);
5722 if (address_mode
== mode_64bit
)
5724 if (!(sizeflag
& AFLAG
))
5725 s
= names32
[code
- eAX_reg
];
5727 s
= names64
[code
- eAX_reg
];
5729 else if (sizeflag
& AFLAG
)
5730 s
= names32
[code
- eAX_reg
];
5732 s
= names16
[code
- eAX_reg
];
5734 *obufp
++ = close_char
;
5739 OP_ESreg (int code
, int sizeflag
)
5745 case 0x6d: /* insw/insl */
5746 intel_operand_size (z_mode
, sizeflag
);
5748 case 0xa5: /* movsw/movsl/movsq */
5749 case 0xa7: /* cmpsw/cmpsl/cmpsq */
5750 case 0xab: /* stosw/stosl */
5751 case 0xaf: /* scasw/scasl */
5752 intel_operand_size (v_mode
, sizeflag
);
5755 intel_operand_size (b_mode
, sizeflag
);
5758 oappend ("%es:" + intel_syntax
);
5759 ptr_reg (code
, sizeflag
);
5763 OP_DSreg (int code
, int sizeflag
)
5769 case 0x6f: /* outsw/outsl */
5770 intel_operand_size (z_mode
, sizeflag
);
5772 case 0xa5: /* movsw/movsl/movsq */
5773 case 0xa7: /* cmpsw/cmpsl/cmpsq */
5774 case 0xad: /* lodsw/lodsl/lodsq */
5775 intel_operand_size (v_mode
, sizeflag
);
5778 intel_operand_size (b_mode
, sizeflag
);
5788 prefixes
|= PREFIX_DS
;
5790 ptr_reg (code
, sizeflag
);
5794 OP_C (int dummy ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
5802 else if (address_mode
!= mode_64bit
&& (prefixes
& PREFIX_LOCK
))
5804 used_prefixes
|= PREFIX_LOCK
;
5807 snprintf (scratchbuf
, sizeof(scratchbuf
), "%%cr%d", modrm
.reg
+ add
);
5808 oappend (scratchbuf
+ intel_syntax
);
5812 OP_D (int dummy ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
5819 snprintf (scratchbuf
, sizeof(scratchbuf
), "db%d", modrm
.reg
+ add
);
5821 snprintf (scratchbuf
, sizeof(scratchbuf
), "%%db%d", modrm
.reg
+ add
);
5822 oappend (scratchbuf
);
5826 OP_T (int dummy ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
5828 snprintf (scratchbuf
, sizeof(scratchbuf
), "%%tr%d", modrm
.reg
);
5829 oappend (scratchbuf
+ intel_syntax
);
5833 OP_R (int bytemode
, int sizeflag
)
5836 OP_E (bytemode
, sizeflag
);
5842 OP_MMX (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
5844 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5845 if (prefixes
& PREFIX_DATA
)
5851 snprintf (scratchbuf
, sizeof(scratchbuf
), "%%xmm%d", modrm
.reg
+ add
);
5854 snprintf (scratchbuf
, sizeof(scratchbuf
), "%%mm%d", modrm
.reg
);
5855 oappend (scratchbuf
+ intel_syntax
);
5859 OP_XMM (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
5865 snprintf (scratchbuf
, sizeof(scratchbuf
), "%%xmm%d", modrm
.reg
+ add
);
5866 oappend (scratchbuf
+ intel_syntax
);
5870 OP_EM (int bytemode
, int sizeflag
)
5874 if (intel_syntax
&& bytemode
== v_mode
)
5876 bytemode
= (prefixes
& PREFIX_DATA
) ? x_mode
: q_mode
;
5877 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5879 OP_E (bytemode
, sizeflag
);
5883 /* Skip mod/rm byte. */
5886 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5887 if (prefixes
& PREFIX_DATA
)
5894 snprintf (scratchbuf
, sizeof(scratchbuf
), "%%xmm%d", modrm
.rm
+ add
);
5897 snprintf (scratchbuf
, sizeof(scratchbuf
), "%%mm%d", modrm
.rm
);
5898 oappend (scratchbuf
+ intel_syntax
);
5901 /* cvt* are the only instructions in sse2 which have
5902 both SSE and MMX operands and also have 0x66 prefix
5903 in their opcode. 0x66 was originally used to differentiate
5904 between SSE and MMX instruction(operands). So we have to handle the
5905 cvt* separately using OP_EMC and OP_MXC */
5907 OP_EMC (int bytemode
, int sizeflag
)
5911 if (intel_syntax
&& bytemode
== v_mode
)
5913 bytemode
= (prefixes
& PREFIX_DATA
) ? x_mode
: q_mode
;
5914 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5916 OP_E (bytemode
, sizeflag
);
5920 /* Skip mod/rm byte. */
5923 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5924 snprintf (scratchbuf
, sizeof(scratchbuf
), "%%mm%d", modrm
.rm
);
5925 oappend (scratchbuf
+ intel_syntax
);
5929 OP_MXC (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
5931 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5932 snprintf (scratchbuf
, sizeof(scratchbuf
), "%%mm%d", modrm
.reg
);
5933 oappend (scratchbuf
+ intel_syntax
);
5937 OP_EX (int bytemode
, int sizeflag
)
5942 OP_E (bytemode
, sizeflag
);
5949 /* Skip mod/rm byte. */
5952 snprintf (scratchbuf
, sizeof(scratchbuf
), "%%xmm%d", modrm
.rm
+ add
);
5953 oappend (scratchbuf
+ intel_syntax
);
5957 OP_MS (int bytemode
, int sizeflag
)
5960 OP_EM (bytemode
, sizeflag
);
5966 OP_XS (int bytemode
, int sizeflag
)
5969 OP_EX (bytemode
, sizeflag
);
5975 OP_M (int bytemode
, int sizeflag
)
5978 /* bad bound,lea,lds,les,lfs,lgs,lss,cmpxchg8b,vmptrst modrm */
5981 OP_E (bytemode
, sizeflag
);
5985 OP_0f07 (int bytemode
, int sizeflag
)
5987 if (modrm
.mod
!= 3 || modrm
.rm
!= 0)
5990 OP_E (bytemode
, sizeflag
);
5994 OP_0fae (int bytemode
, int sizeflag
)
5999 strcpy (obuf
+ strlen (obuf
) - sizeof ("clflush") + 1, "sfence");
6001 if (modrm
.reg
< 5 || modrm
.rm
!= 0)
6003 BadOp (); /* bad sfence, mfence, or lfence */
6007 else if (modrm
.reg
!= 7)
6009 BadOp (); /* bad clflush */
6013 OP_E (bytemode
, sizeflag
);
6016 /* NOP is an alias of "xchg %ax,%ax" in 16bit mode, "xchg %eax,%eax" in
6017 32bit mode and "xchg %rax,%rax" in 64bit mode. */
6020 NOP_Fixup1 (int bytemode
, int sizeflag
)
6022 if ((prefixes
& PREFIX_DATA
) != 0
6025 && address_mode
== mode_64bit
))
6026 OP_REG (bytemode
, sizeflag
);
6028 strcpy (obuf
, "nop");
6032 NOP_Fixup2 (int bytemode
, int sizeflag
)
6034 if ((prefixes
& PREFIX_DATA
) != 0
6037 && address_mode
== mode_64bit
))
6038 OP_IMREG (bytemode
, sizeflag
);
6041 static const char *Suffix3DNow
[] = {
6042 /* 00 */ NULL
, NULL
, NULL
, NULL
,
6043 /* 04 */ NULL
, NULL
, NULL
, NULL
,
6044 /* 08 */ NULL
, NULL
, NULL
, NULL
,
6045 /* 0C */ "pi2fw", "pi2fd", NULL
, NULL
,
6046 /* 10 */ NULL
, NULL
, NULL
, NULL
,
6047 /* 14 */ NULL
, NULL
, NULL
, NULL
,
6048 /* 18 */ NULL
, NULL
, NULL
, NULL
,
6049 /* 1C */ "pf2iw", "pf2id", NULL
, NULL
,
6050 /* 20 */ NULL
, NULL
, NULL
, NULL
,
6051 /* 24 */ NULL
, NULL
, NULL
, NULL
,
6052 /* 28 */ NULL
, NULL
, NULL
, NULL
,
6053 /* 2C */ NULL
, NULL
, NULL
, NULL
,
6054 /* 30 */ NULL
, NULL
, NULL
, NULL
,
6055 /* 34 */ NULL
, NULL
, NULL
, NULL
,
6056 /* 38 */ NULL
, NULL
, NULL
, NULL
,
6057 /* 3C */ NULL
, NULL
, NULL
, NULL
,
6058 /* 40 */ NULL
, NULL
, NULL
, NULL
,
6059 /* 44 */ NULL
, NULL
, NULL
, NULL
,
6060 /* 48 */ NULL
, NULL
, NULL
, NULL
,
6061 /* 4C */ NULL
, NULL
, NULL
, NULL
,
6062 /* 50 */ NULL
, NULL
, NULL
, NULL
,
6063 /* 54 */ NULL
, NULL
, NULL
, NULL
,
6064 /* 58 */ NULL
, NULL
, NULL
, NULL
,
6065 /* 5C */ NULL
, NULL
, NULL
, NULL
,
6066 /* 60 */ NULL
, NULL
, NULL
, NULL
,
6067 /* 64 */ NULL
, NULL
, NULL
, NULL
,
6068 /* 68 */ NULL
, NULL
, NULL
, NULL
,
6069 /* 6C */ NULL
, NULL
, NULL
, NULL
,
6070 /* 70 */ NULL
, NULL
, NULL
, NULL
,
6071 /* 74 */ NULL
, NULL
, NULL
, NULL
,
6072 /* 78 */ NULL
, NULL
, NULL
, NULL
,
6073 /* 7C */ NULL
, NULL
, NULL
, NULL
,
6074 /* 80 */ NULL
, NULL
, NULL
, NULL
,
6075 /* 84 */ NULL
, NULL
, NULL
, NULL
,
6076 /* 88 */ NULL
, NULL
, "pfnacc", NULL
,
6077 /* 8C */ NULL
, NULL
, "pfpnacc", NULL
,
6078 /* 90 */ "pfcmpge", NULL
, NULL
, NULL
,
6079 /* 94 */ "pfmin", NULL
, "pfrcp", "pfrsqrt",
6080 /* 98 */ NULL
, NULL
, "pfsub", NULL
,
6081 /* 9C */ NULL
, NULL
, "pfadd", NULL
,
6082 /* A0 */ "pfcmpgt", NULL
, NULL
, NULL
,
6083 /* A4 */ "pfmax", NULL
, "pfrcpit1", "pfrsqit1",
6084 /* A8 */ NULL
, NULL
, "pfsubr", NULL
,
6085 /* AC */ NULL
, NULL
, "pfacc", NULL
,
6086 /* B0 */ "pfcmpeq", NULL
, NULL
, NULL
,
6087 /* B4 */ "pfmul", NULL
, "pfrcpit2", "pmulhrw",
6088 /* B8 */ NULL
, NULL
, NULL
, "pswapd",
6089 /* BC */ NULL
, NULL
, NULL
, "pavgusb",
6090 /* C0 */ NULL
, NULL
, NULL
, NULL
,
6091 /* C4 */ NULL
, NULL
, NULL
, NULL
,
6092 /* C8 */ NULL
, NULL
, NULL
, NULL
,
6093 /* CC */ NULL
, NULL
, NULL
, NULL
,
6094 /* D0 */ NULL
, NULL
, NULL
, NULL
,
6095 /* D4 */ NULL
, NULL
, NULL
, NULL
,
6096 /* D8 */ NULL
, NULL
, NULL
, NULL
,
6097 /* DC */ NULL
, NULL
, NULL
, NULL
,
6098 /* E0 */ NULL
, NULL
, NULL
, NULL
,
6099 /* E4 */ NULL
, NULL
, NULL
, NULL
,
6100 /* E8 */ NULL
, NULL
, NULL
, NULL
,
6101 /* EC */ NULL
, NULL
, NULL
, NULL
,
6102 /* F0 */ NULL
, NULL
, NULL
, NULL
,
6103 /* F4 */ NULL
, NULL
, NULL
, NULL
,
6104 /* F8 */ NULL
, NULL
, NULL
, NULL
,
6105 /* FC */ NULL
, NULL
, NULL
, NULL
,
6109 OP_3DNowSuffix (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
6111 const char *mnemonic
;
6113 fetch_data(the_info
, codep
+ 1);
6114 /* AMD 3DNow! instructions are specified by an opcode suffix in the
6115 place where an 8-bit immediate would normally go. ie. the last
6116 byte of the instruction. */
6117 obufp
= obuf
+ strlen (obuf
);
6118 mnemonic
= Suffix3DNow
[*codep
++ & 0xff];
6123 /* Since a variable sized modrm/sib chunk is between the start
6124 of the opcode (0x0f0f) and the opcode suffix, we need to do
6125 all the modrm processing first, and don't know until now that
6126 we have a bad opcode. This necessitates some cleaning up. */
6127 op_out
[0][0] = '\0';
6128 op_out
[1][0] = '\0';
6133 static const char *simd_cmp_op
[] = {
6145 OP_SIMD_Suffix (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
6147 unsigned int cmp_type
;
6149 fetch_data(the_info
, codep
+ 1);
6150 obufp
= obuf
+ strlen (obuf
);
6151 cmp_type
= *codep
++ & 0xff;
6154 char suffix1
= 'p', suffix2
= 's';
6155 used_prefixes
|= (prefixes
& PREFIX_REPZ
);
6156 if (prefixes
& PREFIX_REPZ
)
6160 used_prefixes
|= (prefixes
& PREFIX_DATA
);
6161 if (prefixes
& PREFIX_DATA
)
6165 used_prefixes
|= (prefixes
& PREFIX_REPNZ
);
6166 if (prefixes
& PREFIX_REPNZ
)
6167 suffix1
= 's', suffix2
= 'd';
6170 snprintf (scratchbuf
, sizeof(scratchbuf
), "cmp%s%c%c",
6171 simd_cmp_op
[cmp_type
], suffix1
, suffix2
);
6172 used_prefixes
|= (prefixes
& PREFIX_REPZ
);
6173 oappend (scratchbuf
);
6177 /* We have a bad extension byte. Clean up. */
6178 op_out
[0][0] = '\0';
6179 op_out
[1][0] = '\0';
6185 SIMD_Fixup (int extrachar
, int sizeflag ATTRIBUTE_UNUSED
)
6187 /* Change movlps/movhps to movhlps/movlhps for 2 register operand
6188 forms of these instructions. */
6191 char *p
= obuf
+ strlen (obuf
);
6194 *(p
- 1) = *(p
- 2);
6195 *(p
- 2) = *(p
- 3);
6196 *(p
- 3) = extrachar
;
6201 PNI_Fixup (int extrachar ATTRIBUTE_UNUSED
, int sizeflag
)
6203 if (modrm
.mod
== 3 && modrm
.reg
== 1 && modrm
.rm
<= 1)
6205 /* Override "sidt". */
6206 size_t olen
= strlen (obuf
);
6207 char *p
= obuf
+ olen
- 4;
6208 const char * const *names
= (address_mode
== mode_64bit
6209 ? names64
: names32
);
6211 /* We might have a suffix when disassembling with -Msuffix. */
6215 /* Remove "addr16/addr32" if we aren't in Intel mode. */
6217 && (prefixes
& PREFIX_ADDR
)
6220 && strncmp (p
- 7, "addr", 4) == 0
6221 && (strncmp (p
- 3, "16", 2) == 0
6222 || strncmp (p
- 3, "32", 2) == 0))
6227 /* mwait %eax,%ecx */
6228 strcpy (p
, "mwait");
6230 strcpy (op_out
[0], names
[0]);
6234 /* monitor %eax,%ecx,%edx" */
6235 strcpy (p
, "monitor");
6238 const char * const *op1_names
;
6239 if (!(prefixes
& PREFIX_ADDR
))
6240 op1_names
= (address_mode
== mode_16bit
6244 op1_names
= (address_mode
!= mode_32bit
6245 ? names32
: names16
);
6246 used_prefixes
|= PREFIX_ADDR
;
6248 strcpy (op_out
[0], op1_names
[0]);
6249 strcpy (op_out
[2], names
[2]);
6254 strcpy (op_out
[1], names
[1]);
6265 SVME_Fixup (int bytemode
, int sizeflag
)
6297 OP_M (bytemode
, sizeflag
);
6300 /* Override "lidt". */
6301 p
= obuf
+ strlen (obuf
) - 4;
6302 /* We might have a suffix. */
6306 if (!(prefixes
& PREFIX_ADDR
))
6311 used_prefixes
|= PREFIX_ADDR
;
6315 strcpy (op_out
[1], names32
[1]);
6321 *obufp
++ = open_char
;
6322 if (address_mode
== mode_64bit
|| (sizeflag
& AFLAG
))
6326 strcpy (obufp
, alt
);
6327 obufp
+= strlen (alt
);
6328 *obufp
++ = close_char
;
6335 INVLPG_Fixup (int bytemode
, int sizeflag
)
6348 OP_M (bytemode
, sizeflag
);
6351 /* Override "invlpg". */
6352 strcpy (obuf
+ strlen (obuf
) - 6, alt
);
6359 /* Throw away prefixes and 1st. opcode byte. */
6360 codep
= insn_codep
+ 1;
6365 VMX_Fixup (int extrachar ATTRIBUTE_UNUSED
, int sizeflag
)
6372 /* Override "sgdt". */
6373 char *p
= obuf
+ strlen (obuf
) - 4;
6375 /* We might have a suffix when disassembling with -Msuffix. */
6382 strcpy (p
, "vmcall");
6385 strcpy (p
, "vmlaunch");
6388 strcpy (p
, "vmresume");
6391 strcpy (p
, "vmxoff");
6402 OP_VMX (int bytemode
, int sizeflag
)
6404 used_prefixes
|= (prefixes
& (PREFIX_DATA
| PREFIX_REPZ
));
6405 if (prefixes
& PREFIX_DATA
)
6406 strcpy (obuf
, "vmclear");
6407 else if (prefixes
& PREFIX_REPZ
)
6408 strcpy (obuf
, "vmxon");
6410 strcpy (obuf
, "vmptrld");
6411 OP_E (bytemode
, sizeflag
);
6415 REP_Fixup (int bytemode
, int sizeflag
)
6417 /* The 0xf3 prefix should be displayed as "rep" for ins, outs, movs,
6421 if (prefixes
& PREFIX_REPZ
)
6422 switch (*insn_codep
)
6424 case 0x6e: /* outsb */
6425 case 0x6f: /* outsw/outsl */
6426 case 0xa4: /* movsb */
6427 case 0xa5: /* movsw/movsl/movsq */
6433 case 0xaa: /* stosb */
6434 case 0xab: /* stosw/stosl/stosq */
6435 case 0xac: /* lodsb */
6436 case 0xad: /* lodsw/lodsl/lodsq */
6437 if (!intel_syntax
&& (sizeflag
& SUFFIX_ALWAYS
))
6442 case 0x6c: /* insb */
6443 case 0x6d: /* insl/insw */
6459 olen
= strlen (obuf
);
6460 p
= obuf
+ olen
- ilen
- 1 - 4;
6461 /* Handle "repz [addr16|addr32]". */
6462 if ((prefixes
& PREFIX_ADDR
))
6465 memmove (p
+ 3, p
+ 4, olen
- (p
+ 3 - obuf
));
6473 OP_IMREG (bytemode
, sizeflag
);
6476 OP_ESreg (bytemode
, sizeflag
);
6479 OP_DSreg (bytemode
, sizeflag
);
6488 CMPXCHG8B_Fixup (int bytemode
, int sizeflag
)
6493 /* Change cmpxchg8b to cmpxchg16b. */
6494 char *p
= obuf
+ strlen (obuf
) - 2;
6498 OP_M (bytemode
, sizeflag
);
6502 XMM_Fixup (int reg
, int sizeflag ATTRIBUTE_UNUSED
)
6504 snprintf (scratchbuf
, sizeof(scratchbuf
), "%%xmm%d", reg
);
6505 oappend (scratchbuf
+ intel_syntax
);
6509 CRC32_Fixup (int bytemode
, int sizeflag
)
6511 /* Add proper suffix to "crc32". */
6512 char *p
= obuf
+ strlen (obuf
);
6529 else if (sizeflag
& DFLAG
)
6533 used_prefixes
|= (prefixes
& PREFIX_DATA
);
6536 oappend (INTERNAL_DISASSEMBLER_ERROR
);
6545 /* Skip mod/rm byte. */
6550 add
= (rex
& REX_B
) ? 8 : 0;
6551 if (bytemode
== b_mode
)
6555 oappend (names8rex
[modrm
.rm
+ add
]);
6557 oappend (names8
[modrm
.rm
+ add
]);
6563 oappend (names64
[modrm
.rm
+ add
]);
6564 else if ((prefixes
& PREFIX_DATA
))
6565 oappend (names16
[modrm
.rm
+ add
]);
6567 oappend (names32
[modrm
.rm
+ add
]);
6571 OP_E (bytemode
, sizeflag
);