hw/mips/gt64xxx: Simplify ISD MemoryRegion read/write handlers
[qemu/ar7.git] / linux-user / sparc / cpu_loop.c
blob02532f198df83c5cd83b9f0bc7bea63e82c03c8c
1 /*
2 * qemu user cpu loop
4 * Copyright (c) 2003-2008 Fabrice Bellard
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see <http://www.gnu.org/licenses/>.
20 #include "qemu/osdep.h"
21 #include "qemu-common.h"
22 #include "qemu.h"
23 #include "cpu_loop-common.h"
25 #define SPARC64_STACK_BIAS 2047
27 //#define DEBUG_WIN
29 /* WARNING: dealing with register windows _is_ complicated. More info
30 can be found at http://www.sics.se/~psm/sparcstack.html */
31 static inline int get_reg_index(CPUSPARCState *env, int cwp, int index)
33 index = (index + cwp * 16) % (16 * env->nwindows);
34 /* wrap handling : if cwp is on the last window, then we use the
35 registers 'after' the end */
36 if (index < 8 && env->cwp == env->nwindows - 1)
37 index += 16 * env->nwindows;
38 return index;
41 /* save the register window 'cwp1' */
42 static inline void save_window_offset(CPUSPARCState *env, int cwp1)
44 unsigned int i;
45 abi_ulong sp_ptr;
47 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
48 #ifdef TARGET_SPARC64
49 if (sp_ptr & 3)
50 sp_ptr += SPARC64_STACK_BIAS;
51 #endif
52 #if defined(DEBUG_WIN)
53 printf("win_overflow: sp_ptr=0x" TARGET_ABI_FMT_lx " save_cwp=%d\n",
54 sp_ptr, cwp1);
55 #endif
56 for(i = 0; i < 16; i++) {
57 /* FIXME - what to do if put_user() fails? */
58 put_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
59 sp_ptr += sizeof(abi_ulong);
63 static void save_window(CPUSPARCState *env)
65 #ifndef TARGET_SPARC64
66 unsigned int new_wim;
67 new_wim = ((env->wim >> 1) | (env->wim << (env->nwindows - 1))) &
68 ((1LL << env->nwindows) - 1);
69 save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
70 env->wim = new_wim;
71 #else
73 * cansave is zero if the spill trap handler is triggered by `save` and
74 * nonzero if triggered by a `flushw`
76 save_window_offset(env, cpu_cwp_dec(env, env->cwp - env->cansave - 2));
77 env->cansave++;
78 env->canrestore--;
79 #endif
82 static void restore_window(CPUSPARCState *env)
84 #ifndef TARGET_SPARC64
85 unsigned int new_wim;
86 #endif
87 unsigned int i, cwp1;
88 abi_ulong sp_ptr;
90 #ifndef TARGET_SPARC64
91 new_wim = ((env->wim << 1) | (env->wim >> (env->nwindows - 1))) &
92 ((1LL << env->nwindows) - 1);
93 #endif
95 /* restore the invalid window */
96 cwp1 = cpu_cwp_inc(env, env->cwp + 1);
97 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
98 #ifdef TARGET_SPARC64
99 if (sp_ptr & 3)
100 sp_ptr += SPARC64_STACK_BIAS;
101 #endif
102 #if defined(DEBUG_WIN)
103 printf("win_underflow: sp_ptr=0x" TARGET_ABI_FMT_lx " load_cwp=%d\n",
104 sp_ptr, cwp1);
105 #endif
106 for(i = 0; i < 16; i++) {
107 /* FIXME - what to do if get_user() fails? */
108 get_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
109 sp_ptr += sizeof(abi_ulong);
111 #ifdef TARGET_SPARC64
112 env->canrestore++;
113 if (env->cleanwin < env->nwindows - 1)
114 env->cleanwin++;
115 env->cansave--;
116 #else
117 env->wim = new_wim;
118 #endif
121 static void flush_windows(CPUSPARCState *env)
123 int offset, cwp1;
125 offset = 1;
126 for(;;) {
127 /* if restore would invoke restore_window(), then we can stop */
128 cwp1 = cpu_cwp_inc(env, env->cwp + offset);
129 #ifndef TARGET_SPARC64
130 if (env->wim & (1 << cwp1))
131 break;
132 #else
133 if (env->canrestore == 0)
134 break;
135 env->cansave++;
136 env->canrestore--;
137 #endif
138 save_window_offset(env, cwp1);
139 offset++;
141 cwp1 = cpu_cwp_inc(env, env->cwp + 1);
142 #ifndef TARGET_SPARC64
143 /* set wim so that restore will reload the registers */
144 env->wim = 1 << cwp1;
145 #endif
146 #if defined(DEBUG_WIN)
147 printf("flush_windows: nb=%d\n", offset - 1);
148 #endif
151 void cpu_loop (CPUSPARCState *env)
153 CPUState *cs = env_cpu(env);
154 int trapnr;
155 abi_long ret;
156 target_siginfo_t info;
158 while (1) {
159 cpu_exec_start(cs);
160 trapnr = cpu_exec(cs);
161 cpu_exec_end(cs);
162 process_queued_cpu_work(cs);
164 /* Compute PSR before exposing state. */
165 if (env->cc_op != CC_OP_FLAGS) {
166 cpu_get_psr(env);
169 switch (trapnr) {
170 #ifndef TARGET_SPARC64
171 case 0x88:
172 case 0x90:
173 #else
174 case 0x110:
175 case 0x16d:
176 #endif
177 ret = do_syscall (env, env->gregs[1],
178 env->regwptr[0], env->regwptr[1],
179 env->regwptr[2], env->regwptr[3],
180 env->regwptr[4], env->regwptr[5],
181 0, 0);
182 if (ret == -TARGET_ERESTARTSYS || ret == -TARGET_QEMU_ESIGRETURN) {
183 break;
185 if ((abi_ulong)ret >= (abi_ulong)(-515)) {
186 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
187 env->xcc |= PSR_CARRY;
188 #else
189 env->psr |= PSR_CARRY;
190 #endif
191 ret = -ret;
192 } else {
193 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
194 env->xcc &= ~PSR_CARRY;
195 #else
196 env->psr &= ~PSR_CARRY;
197 #endif
199 env->regwptr[0] = ret;
200 /* next instruction */
201 env->pc = env->npc;
202 env->npc = env->npc + 4;
203 break;
204 case 0x83: /* flush windows */
205 #ifdef TARGET_ABI32
206 case 0x103:
207 #endif
208 flush_windows(env);
209 /* next instruction */
210 env->pc = env->npc;
211 env->npc = env->npc + 4;
212 break;
213 #ifndef TARGET_SPARC64
214 case TT_WIN_OVF: /* window overflow */
215 save_window(env);
216 break;
217 case TT_WIN_UNF: /* window underflow */
218 restore_window(env);
219 break;
220 case TT_TFAULT:
221 case TT_DFAULT:
223 info.si_signo = TARGET_SIGSEGV;
224 info.si_errno = 0;
225 /* XXX: check env->error_code */
226 info.si_code = TARGET_SEGV_MAPERR;
227 info._sifields._sigfault._addr = env->mmuregs[4];
228 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
230 break;
231 #else
232 case TT_SPILL: /* window overflow */
233 save_window(env);
234 break;
235 case TT_FILL: /* window underflow */
236 restore_window(env);
237 break;
238 case TT_TFAULT:
239 case TT_DFAULT:
241 info.si_signo = TARGET_SIGSEGV;
242 info.si_errno = 0;
243 /* XXX: check env->error_code */
244 info.si_code = TARGET_SEGV_MAPERR;
245 if (trapnr == TT_DFAULT)
246 info._sifields._sigfault._addr = env->dmmu.mmuregs[4];
247 else
248 info._sifields._sigfault._addr = cpu_tsptr(env)->tpc;
249 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
251 break;
252 #ifndef TARGET_ABI32
253 case 0x16e:
254 flush_windows(env);
255 sparc64_get_context(env);
256 break;
257 case 0x16f:
258 flush_windows(env);
259 sparc64_set_context(env);
260 break;
261 #endif
262 #endif
263 case EXCP_INTERRUPT:
264 /* just indicate that signals should be handled asap */
265 break;
266 case TT_ILL_INSN:
268 info.si_signo = TARGET_SIGILL;
269 info.si_errno = 0;
270 info.si_code = TARGET_ILL_ILLOPC;
271 info._sifields._sigfault._addr = env->pc;
272 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
274 break;
275 case EXCP_DEBUG:
276 info.si_signo = TARGET_SIGTRAP;
277 info.si_errno = 0;
278 info.si_code = TARGET_TRAP_BRKPT;
279 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
280 break;
281 case EXCP_ATOMIC:
282 cpu_exec_step_atomic(cs);
283 break;
284 default:
285 fprintf(stderr, "Unhandled trap: 0x%x\n", trapnr);
286 cpu_dump_state(cs, stderr, 0);
287 exit(EXIT_FAILURE);
289 process_pending_signals (env);
293 void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs)
295 int i;
296 env->pc = regs->pc;
297 env->npc = regs->npc;
298 env->y = regs->y;
299 for(i = 0; i < 8; i++)
300 env->gregs[i] = regs->u_regs[i];
301 for(i = 0; i < 8; i++)
302 env->regwptr[i] = regs->u_regs[i + 8];