hw/xtensa_pic.c

   1 /*
   2  * Copyright (c) 2011, Max Filippov, Open Source and Linux Lab.
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are met:
   7  *     * Redistributions of source code must retain the above copyright
   8  *       notice, this list of conditions and the following disclaimer.
   9  *     * Redistributions in binary form must reproduce the above copyright
  10  *       notice, this list of conditions and the following disclaimer in the
  11  *       documentation and/or other materials provided with the distribution.
  12  *     * Neither the name of the Open Source and Linux Lab nor the
  13  *       names of its contributors may be used to endorse or promote products
  14  *       derived from this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  17  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  19  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
  20  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  21  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  22  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  23  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  24  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  25  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  26  */
  27
  28 #include "hw.h"
  29 #include "pc.h"
  30 #include "qemu-log.h"
  31 #include "qemu-timer.h"
  32
  33 /* Stub functions for hardware that doesn't exist.  */
  34 void pic_info(Monitor *mon)
  35 {
  36 }
  37
  38 void irq_info(Monitor *mon)
  39 {
  40 }
  41
  42 void xtensa_advance_ccount(CPUState *env, uint32_t d)
  43 {
  44     uint32_t old_ccount = env->sregs[CCOUNT];
  45
  46     env->sregs[CCOUNT] += d;
  47
  48     if (xtensa_option_enabled(env->config, XTENSA_OPTION_TIMER_INTERRUPT)) {
  49         int i;
  50         for (i = 0; i < env->config->nccompare; ++i) {
  51             if (env->sregs[CCOMPARE + i] - old_ccount <= d) {
  52                 xtensa_timer_irq(env, i, 1);
  53             }
  54         }
  55     }
  56 }
  57
  58 void check_interrupts(CPUState *env)
  59 {
  60     int minlevel = xtensa_get_cintlevel(env);
  61     uint32_t int_set_enabled = env->sregs[INTSET] & env->sregs[INTENABLE];
  62     int level;
  63
  64     /* If the CPU is halted advance CCOUNT according to the vm_clock time
  65      * elapsed since the moment when it was advanced last time.
  66      */
  67     if (env->halted) {
  68         int64_t now = qemu_get_clock_ns(vm_clock);
  69
  70         xtensa_advance_ccount(env,
  71                 muldiv64(now - env->halt_clock,
  72                     env->config->clock_freq_khz, 1000000));
  73         env->halt_clock = now;
  74     }
  75     for (level = env->config->nlevel; level > minlevel; --level) {
  76         if (env->config->level_mask[level] & int_set_enabled) {
  77             env->pending_irq_level = level;
  78             cpu_interrupt(env, CPU_INTERRUPT_HARD);
  79             qemu_log_mask(CPU_LOG_INT,
  80                     "%s level = %d, cintlevel = %d, "
  81                     "pc = %08x, a0 = %08x, ps = %08x, "
  82                     "intset = %08x, intenable = %08x, "
  83                     "ccount = %08x\n",
  84                     __func__, level, xtensa_get_cintlevel(env),
  85                     env->pc, env->regs[0], env->sregs[PS],
  86                     env->sregs[INTSET], env->sregs[INTENABLE],
  87                     env->sregs[CCOUNT]);
  88             return;
  89         }
  90     }
  91     env->pending_irq_level = 0;
  92     cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
  93 }
  94
  95 static void xtensa_set_irq(void *opaque, int irq, int active)
  96 {
  97     CPUState *env = opaque;
  98
  99     if (irq >= env->config->ninterrupt) {
 100         qemu_log("%s: bad IRQ %d\n", __func__, irq);
 101     } else {
 102         uint32_t irq_bit = 1 << irq;
 103
 104         if (active) {
 105             env->sregs[INTSET] |= irq_bit;
 106         } else if (env->config->interrupt[irq].inttype == INTTYPE_LEVEL) {
 107             env->sregs[INTSET] &= ~irq_bit;
 108         }
 109
 110         check_interrupts(env);
 111     }
 112 }
 113
 114 void xtensa_timer_irq(CPUState *env, uint32_t id, uint32_t active)
 115 {
 116     qemu_set_irq(env->irq_inputs[env->config->timerint[id]], active);
 117 }
 118
 119 static void xtensa_ccompare_cb(void *opaque)
 120 {
 121     CPUState *env = opaque;
 122     xtensa_advance_ccount(env, env->wake_ccount - env->sregs[CCOUNT]);
 123 }
 124
 125 void xtensa_irq_init(CPUState *env)
 126 {
 127     env->irq_inputs = (void **)qemu_allocate_irqs(
 128             xtensa_set_irq, env, env->config->ninterrupt);
 129     if (xtensa_option_enabled(env->config, XTENSA_OPTION_TIMER_INTERRUPT) &&
 130             env->config->nccompare > 0) {
 131         env->ccompare_timer =
 132             qemu_new_timer_ns(vm_clock, &xtensa_ccompare_cb, env);
 133     }
 134 }