hw/spapr.h

   1 #if !defined(__HW_SPAPR_H__)
   2 #define __HW_SPAPR_H__
   3
   4 #include "dma.h"
   5 #include "hw/xics.h"
   6
   7 struct VIOsPAPRBus;
   8 struct sPAPRPHBState;
   9 struct icp_state;
  10
  11 typedef struct sPAPREnvironment {
  12     struct VIOsPAPRBus *vio_bus;
  13     QLIST_HEAD(, sPAPRPHBState) phbs;
  14     struct icp_state *icp;
  15
  16     target_phys_addr_t ram_limit;
  17     void *htab;
  18     long htab_size;
  19     target_phys_addr_t fdt_addr, rtas_addr;
  20     long rtas_size;
  21     void *fdt_skel;
  22     target_ulong entry_point;
  23     int next_irq;
  24     int rtc_offset;
  25     char *cpu_model;
  26     bool has_graphics;
  27 } sPAPREnvironment;
  28
  29 #define H_SUCCESS         0
  30 #define H_BUSY            1        /* Hardware busy -- retry later */
  31 #define H_CLOSED          2        /* Resource closed */
  32 #define H_NOT_AVAILABLE   3
  33 #define H_CONSTRAINED     4        /* Resource request constrained to max allowed */
  34 #define H_PARTIAL         5
  35 #define H_IN_PROGRESS     14       /* Kind of like busy */
  36 #define H_PAGE_REGISTERED 15
  37 #define H_PARTIAL_STORE   16
  38 #define H_PENDING         17       /* returned from H_POLL_PENDING */
  39 #define H_CONTINUE        18       /* Returned from H_Join on success */
  40 #define H_LONG_BUSY_START_RANGE         9900  /* Start of long busy range */
  41 #define H_LONG_BUSY_ORDER_1_MSEC        9900  /* Long busy, hint that 1msec \
  42                                                  is a good time to retry */
  43 #define H_LONG_BUSY_ORDER_10_MSEC       9901  /* Long busy, hint that 10msec \
  44                                                  is a good time to retry */
  45 #define H_LONG_BUSY_ORDER_100_MSEC      9902  /* Long busy, hint that 100msec \
  46                                                  is a good time to retry */
  47 #define H_LONG_BUSY_ORDER_1_SEC         9903  /* Long busy, hint that 1sec \
  48                                                  is a good time to retry */
  49 #define H_LONG_BUSY_ORDER_10_SEC        9904  /* Long busy, hint that 10sec \
  50                                                  is a good time to retry */
  51 #define H_LONG_BUSY_ORDER_100_SEC       9905  /* Long busy, hint that 100sec \
  52                                                  is a good time to retry */
  53 #define H_LONG_BUSY_END_RANGE           9905  /* End of long busy range */
  54 #define H_HARDWARE        -1       /* Hardware error */
  55 #define H_FUNCTION        -2       /* Function not supported */
  56 #define H_PRIVILEGE       -3       /* Caller not privileged */
  57 #define H_PARAMETER       -4       /* Parameter invalid, out-of-range or conflicting */
  58 #define H_BAD_MODE        -5       /* Illegal msr value */
  59 #define H_PTEG_FULL       -6       /* PTEG is full */
  60 #define H_NOT_FOUND       -7       /* PTE was not found" */
  61 #define H_RESERVED_DABR   -8       /* DABR address is reserved by the hypervisor on this processor" */
  62 #define H_NO_MEM          -9
  63 #define H_AUTHORITY       -10
  64 #define H_PERMISSION      -11
  65 #define H_DROPPED         -12
  66 #define H_SOURCE_PARM     -13
  67 #define H_DEST_PARM       -14
  68 #define H_REMOTE_PARM     -15
  69 #define H_RESOURCE        -16
  70 #define H_ADAPTER_PARM    -17
  71 #define H_RH_PARM         -18
  72 #define H_RCQ_PARM        -19
  73 #define H_SCQ_PARM        -20
  74 #define H_EQ_PARM         -21
  75 #define H_RT_PARM         -22
  76 #define H_ST_PARM         -23
  77 #define H_SIGT_PARM       -24
  78 #define H_TOKEN_PARM      -25
  79 #define H_MLENGTH_PARM    -27
  80 #define H_MEM_PARM        -28
  81 #define H_MEM_ACCESS_PARM -29
  82 #define H_ATTR_PARM       -30
  83 #define H_PORT_PARM       -31
  84 #define H_MCG_PARM        -32
  85 #define H_VL_PARM         -33
  86 #define H_TSIZE_PARM      -34
  87 #define H_TRACE_PARM      -35
  88
  89 #define H_MASK_PARM       -37
  90 #define H_MCG_FULL        -38
  91 #define H_ALIAS_EXIST     -39
  92 #define H_P_COUNTER       -40
  93 #define H_TABLE_FULL      -41
  94 #define H_ALT_TABLE       -42
  95 #define H_MR_CONDITION    -43
  96 #define H_NOT_ENOUGH_RESOURCES -44
  97 #define H_R_STATE         -45
  98 #define H_RESCINDEND      -46
  99 #define H_MULTI_THREADS_ACTIVE -9005
 100
 101
 102 /* Long Busy is a condition that can be returned by the firmware
 103  * when a call cannot be completed now, but the identical call
 104  * should be retried later.  This prevents calls blocking in the
 105  * firmware for long periods of time.  Annoyingly the firmware can return
 106  * a range of return codes, hinting at how long we should wait before
 107  * retrying.  If you don't care for the hint, the macro below is a good
 108  * way to check for the long_busy return codes
 109  */
 110 #define H_IS_LONG_BUSY(x)  ((x >= H_LONG_BUSY_START_RANGE) \
 111                             && (x <= H_LONG_BUSY_END_RANGE))
 112
 113 /* Flags */
 114 #define H_LARGE_PAGE      (1ULL<<(63-16))
 115 #define H_EXACT           (1ULL<<(63-24))       /* Use exact PTE or return H_PTEG_FULL */
 116 #define H_R_XLATE         (1ULL<<(63-25))       /* include a valid logical page num in the pte if the valid bit is set */
 117 #define H_READ_4          (1ULL<<(63-26))       /* Return 4 PTEs */
 118 #define H_PAGE_STATE_CHANGE (1ULL<<(63-28))
 119 #define H_PAGE_UNUSED     ((1ULL<<(63-29)) | (1ULL<<(63-30)))
 120 #define H_PAGE_SET_UNUSED (H_PAGE_STATE_CHANGE | H_PAGE_UNUSED)
 121 #define H_PAGE_SET_LOANED (H_PAGE_SET_UNUSED | (1ULL<<(63-31)))
 122 #define H_PAGE_SET_ACTIVE H_PAGE_STATE_CHANGE
 123 #define H_AVPN            (1ULL<<(63-32))       /* An avpn is provided as a sanity test */
 124 #define H_ANDCOND         (1ULL<<(63-33))
 125 #define H_ICACHE_INVALIDATE (1ULL<<(63-40))     /* icbi, etc.  (ignored for IO pages) */
 126 #define H_ICACHE_SYNCHRONIZE (1ULL<<(63-41))    /* dcbst, icbi, etc (ignored for IO pages */
 127 #define H_ZERO_PAGE       (1ULL<<(63-48))       /* zero the page before mapping (ignored for IO pages) */
 128 #define H_COPY_PAGE       (1ULL<<(63-49))
 129 #define H_N               (1ULL<<(63-61))
 130 #define H_PP1             (1ULL<<(63-62))
 131 #define H_PP2             (1ULL<<(63-63))
 132
 133 /* VASI States */
 134 #define H_VASI_INVALID    0
 135 #define H_VASI_ENABLED    1
 136 #define H_VASI_ABORTED    2
 137 #define H_VASI_SUSPENDING 3
 138 #define H_VASI_SUSPENDED  4
 139 #define H_VASI_RESUMED    5
 140 #define H_VASI_COMPLETED  6
 141
 142 /* DABRX flags */
 143 #define H_DABRX_HYPERVISOR (1ULL<<(63-61))
 144 #define H_DABRX_KERNEL     (1ULL<<(63-62))
 145 #define H_DABRX_USER       (1ULL<<(63-63))
 146
 147 /* Each control block has to be on a 4K boundary */
 148 #define H_CB_ALIGNMENT     4096
 149
 150 /* pSeries hypervisor opcodes */
 151 #define H_REMOVE                0x04
 152 #define H_ENTER                 0x08
 153 #define H_READ                  0x0c
 154 #define H_CLEAR_MOD             0x10
 155 #define H_CLEAR_REF             0x14
 156 #define H_PROTECT               0x18
 157 #define H_GET_TCE               0x1c
 158 #define H_PUT_TCE               0x20
 159 #define H_SET_SPRG0             0x24
 160 #define H_SET_DABR              0x28
 161 #define H_PAGE_INIT             0x2c
 162 #define H_SET_ASR               0x30
 163 #define H_ASR_ON                0x34
 164 #define H_ASR_OFF               0x38
 165 #define H_LOGICAL_CI_LOAD       0x3c
 166 #define H_LOGICAL_CI_STORE      0x40
 167 #define H_LOGICAL_CACHE_LOAD    0x44
 168 #define H_LOGICAL_CACHE_STORE   0x48
 169 #define H_LOGICAL_ICBI          0x4c
 170 #define H_LOGICAL_DCBF          0x50
 171 #define H_GET_TERM_CHAR         0x54
 172 #define H_PUT_TERM_CHAR         0x58
 173 #define H_REAL_TO_LOGICAL       0x5c
 174 #define H_HYPERVISOR_DATA       0x60
 175 #define H_EOI                   0x64
 176 #define H_CPPR                  0x68
 177 #define H_IPI                   0x6c
 178 #define H_IPOLL                 0x70
 179 #define H_XIRR                  0x74
 180 #define H_PERFMON               0x7c
 181 #define H_MIGRATE_DMA           0x78
 182 #define H_REGISTER_VPA          0xDC
 183 #define H_CEDE                  0xE0
 184 #define H_CONFER                0xE4
 185 #define H_PROD                  0xE8
 186 #define H_GET_PPP               0xEC
 187 #define H_SET_PPP               0xF0
 188 #define H_PURR                  0xF4
 189 #define H_PIC                   0xF8
 190 #define H_REG_CRQ               0xFC
 191 #define H_FREE_CRQ              0x100
 192 #define H_VIO_SIGNAL            0x104
 193 #define H_SEND_CRQ              0x108
 194 #define H_COPY_RDMA             0x110
 195 #define H_REGISTER_LOGICAL_LAN  0x114
 196 #define H_FREE_LOGICAL_LAN      0x118
 197 #define H_ADD_LOGICAL_LAN_BUFFER 0x11C
 198 #define H_SEND_LOGICAL_LAN      0x120
 199 #define H_BULK_REMOVE           0x124
 200 #define H_MULTICAST_CTRL        0x130
 201 #define H_SET_XDABR             0x134
 202 #define H_STUFF_TCE             0x138
 203 #define H_PUT_TCE_INDIRECT      0x13C
 204 #define H_CHANGE_LOGICAL_LAN_MAC 0x14C
 205 #define H_VTERM_PARTNER_INFO    0x150
 206 #define H_REGISTER_VTERM        0x154
 207 #define H_FREE_VTERM            0x158
 208 #define H_RESET_EVENTS          0x15C
 209 #define H_ALLOC_RESOURCE        0x160
 210 #define H_FREE_RESOURCE         0x164
 211 #define H_MODIFY_QP             0x168
 212 #define H_QUERY_QP              0x16C
 213 #define H_REREGISTER_PMR        0x170
 214 #define H_REGISTER_SMR          0x174
 215 #define H_QUERY_MR              0x178
 216 #define H_QUERY_MW              0x17C
 217 #define H_QUERY_HCA             0x180
 218 #define H_QUERY_PORT            0x184
 219 #define H_MODIFY_PORT           0x188
 220 #define H_DEFINE_AQP1           0x18C
 221 #define H_GET_TRACE_BUFFER      0x190
 222 #define H_DEFINE_AQP0           0x194
 223 #define H_RESIZE_MR             0x198
 224 #define H_ATTACH_MCQP           0x19C
 225 #define H_DETACH_MCQP           0x1A0
 226 #define H_CREATE_RPT            0x1A4
 227 #define H_REMOVE_RPT            0x1A8
 228 #define H_REGISTER_RPAGES       0x1AC
 229 #define H_DISABLE_AND_GETC      0x1B0
 230 #define H_ERROR_DATA            0x1B4
 231 #define H_GET_HCA_INFO          0x1B8
 232 #define H_GET_PERF_COUNT        0x1BC
 233 #define H_MANAGE_TRACE          0x1C0
 234 #define H_FREE_LOGICAL_LAN_BUFFER 0x1D4
 235 #define H_QUERY_INT_STATE       0x1E4
 236 #define H_POLL_PENDING          0x1D8
 237 #define H_ILLAN_ATTRIBUTES      0x244
 238 #define H_MODIFY_HEA_QP         0x250
 239 #define H_QUERY_HEA_QP          0x254
 240 #define H_QUERY_HEA             0x258
 241 #define H_QUERY_HEA_PORT        0x25C
 242 #define H_MODIFY_HEA_PORT       0x260
 243 #define H_REG_BCMC              0x264
 244 #define H_DEREG_BCMC            0x268
 245 #define H_REGISTER_HEA_RPAGES   0x26C
 246 #define H_DISABLE_AND_GET_HEA   0x270
 247 #define H_GET_HEA_INFO          0x274
 248 #define H_ALLOC_HEA_RESOURCE    0x278
 249 #define H_ADD_CONN              0x284
 250 #define H_DEL_CONN              0x288
 251 #define H_JOIN                  0x298
 252 #define H_VASI_STATE            0x2A4
 253 #define H_ENABLE_CRQ            0x2B0
 254 #define H_GET_EM_PARMS          0x2B8
 255 #define H_SET_MPP               0x2D0
 256 #define H_GET_MPP               0x2D4
 257 #define MAX_HCALL_OPCODE        H_GET_MPP
 258
 259 /* The hcalls above are standardized in PAPR and implemented by pHyp
 260  * as well.
 261  *
 262  * We also need some hcalls which are specific to qemu / KVM-on-POWER.
 263  * So far we just need one for H_RTAS, but in future we'll need more
 264  * for extensions like virtio.  We put those into the 0xf000-0xfffc
 265  * range which is reserved by PAPR for "platform-specific" hcalls.
 266  */
 267 #define KVMPPC_HCALL_BASE       0xf000
 268 #define KVMPPC_H_RTAS           (KVMPPC_HCALL_BASE + 0x0)
 269 #define KVMPPC_H_LOGICAL_MEMOP  (KVMPPC_HCALL_BASE + 0x1)
 270 #define KVMPPC_HCALL_MAX        KVMPPC_H_LOGICAL_MEMOP
 271
 272 extern sPAPREnvironment *spapr;
 273
 274 /*#define DEBUG_SPAPR_HCALLS*/
 275
 276 #ifdef DEBUG_SPAPR_HCALLS
 277 #define hcall_dprintf(fmt, ...) \
 278     do { fprintf(stderr, "%s: " fmt, __func__, ## __VA_ARGS__); } while (0)
 279 #else
 280 #define hcall_dprintf(fmt, ...) \
 281     do { } while (0)
 282 #endif
 283
 284 typedef target_ulong (*spapr_hcall_fn)(CPUPPCState *env, sPAPREnvironment *spapr,
 285                                        target_ulong opcode,
 286                                        target_ulong *args);
 287
 288 void spapr_register_hypercall(target_ulong opcode, spapr_hcall_fn fn);
 289 target_ulong spapr_hypercall(CPUPPCState *env, target_ulong opcode,
 290                              target_ulong *args);
 291
 292 int spapr_allocate_irq(int hint, enum xics_irq_type type);
 293 int spapr_allocate_irq_block(int num, enum xics_irq_type type);
 294
 295 static inline int spapr_allocate_msi(int hint)
 296 {
 297     return spapr_allocate_irq(hint, XICS_MSI);
 298 }
 299
 300 static inline int spapr_allocate_lsi(int hint)
 301 {
 302     return spapr_allocate_irq(hint, XICS_LSI);
 303 }
 304
 305 static inline uint32_t rtas_ld(target_ulong phys, int n)
 306 {
 307     return ldl_be_phys(phys + 4*n);
 308 }
 309
 310 static inline void rtas_st(target_ulong phys, int n, uint32_t val)
 311 {
 312     stl_be_phys(phys + 4*n, val);
 313 }
 314
 315 typedef void (*spapr_rtas_fn)(sPAPREnvironment *spapr, uint32_t token,
 316                               uint32_t nargs, target_ulong args,
 317                               uint32_t nret, target_ulong rets);
 318 void spapr_rtas_register(const char *name, spapr_rtas_fn fn);
 319 target_ulong spapr_rtas_call(sPAPREnvironment *spapr,
 320                              uint32_t token, uint32_t nargs, target_ulong args,
 321                              uint32_t nret, target_ulong rets);
 322 int spapr_rtas_device_tree_setup(void *fdt, target_phys_addr_t rtas_addr,
 323                                  target_phys_addr_t rtas_size);
 324
 325 #define SPAPR_TCE_PAGE_SHIFT   12
 326 #define SPAPR_TCE_PAGE_SIZE    (1ULL << SPAPR_TCE_PAGE_SHIFT)
 327 #define SPAPR_TCE_PAGE_MASK    (SPAPR_TCE_PAGE_SIZE - 1)
 328
 329 typedef struct sPAPRTCE {
 330     uint64_t tce;
 331 } sPAPRTCE;
 332
 333 #define SPAPR_VIO_BASE_LIOBN    0x00000000
 334 #define SPAPR_PCI_BASE_LIOBN    0x80000000
 335
 336 void spapr_iommu_init(void);
 337 DMAContext *spapr_tce_new_dma_context(uint32_t liobn, size_t window_size);
 338 void spapr_tce_free(DMAContext *dma);
 339 int spapr_dma_dt(void *fdt, int node_off, const char *propname,
 340                  uint32_t liobn, uint64_t window, uint32_t size);
 341 int spapr_tcet_dma_dt(void *fdt, int node_off, const char *propname,
 342                       DMAContext *dma);
 343
 344 #endif /* !defined (__HW_SPAPR_H__) */