hw/ppc440_bamboo.c

   1 /*
   2  * QEMU PowerPC 440 Bamboo board emulation
   3  *
   4  * Copyright 2007 IBM Corporation.
   5  * Authors:
   6  *      Jerone Young <jyoung5@us.ibm.com>
   7  *      Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
   8  *      Hollis Blanchard <hollisb@us.ibm.com>
   9  *
  10  * This work is licensed under the GNU GPL license version 2 or later.
  11  *
  12  */
  13
  14 #include "config.h"
  15 #include "qemu-common.h"
  16 #include "net.h"
  17 #include "hw.h"
  18 #include "pci.h"
  19 #include "boards.h"
  20 #include "kvm.h"
  21 #include "kvm_ppc.h"
  22 #include "device_tree.h"
  23 #include "loader.h"
  24 #include "elf.h"
  25 #include "exec-memory.h"
  26 #include "pc.h"
  27 #include "ppc.h"
  28 #include "ppc405.h"
  29 #include "sysemu.h"
  30 #include "sysbus.h"
  31
  32 #define BINARY_DEVICE_TREE_FILE "bamboo.dtb"
  33
  34 /* from u-boot */
  35 #define KERNEL_ADDR  0x1000000
  36 #define FDT_ADDR     0x1800000
  37 #define RAMDISK_ADDR 0x1900000
  38
  39 #define PPC440EP_PCI_CONFIG     0xeec00000
  40 #define PPC440EP_PCI_INTACK     0xeed00000
  41 #define PPC440EP_PCI_SPECIAL    0xeed00000
  42 #define PPC440EP_PCI_REGS       0xef400000
  43 #define PPC440EP_PCI_IO         0xe8000000
  44 #define PPC440EP_PCI_IOLEN      0x00010000
  45
  46 #define PPC440EP_SDRAM_NR_BANKS 4
  47
  48 static const unsigned int ppc440ep_sdram_bank_sizes[] = {
  49     256<<20, 128<<20, 64<<20, 32<<20, 16<<20, 8<<20, 0
  50 };
  51
  52 static target_phys_addr_t entry;
  53
  54 static int bamboo_load_device_tree(target_phys_addr_t addr,
  55                                      uint32_t ramsize,
  56                                      target_phys_addr_t initrd_base,
  57                                      target_phys_addr_t initrd_size,
  58                                      const char *kernel_cmdline)
  59 {
  60     int ret = -1;
  61 #ifdef CONFIG_FDT
  62     uint32_t mem_reg_property[] = { 0, 0, ramsize };
  63     char *filename;
  64     int fdt_size;
  65     void *fdt;
  66     uint32_t tb_freq = 400000000;
  67     uint32_t clock_freq = 400000000;
  68
  69     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, BINARY_DEVICE_TREE_FILE);
  70     if (!filename) {
  71         goto out;
  72     }
  73     fdt = load_device_tree(filename, &fdt_size);
  74     g_free(filename);
  75     if (fdt == NULL) {
  76         goto out;
  77     }
  78
  79     /* Manipulate device tree in memory. */
  80
  81     ret = qemu_devtree_setprop(fdt, "/memory", "reg", mem_reg_property,
  82                                sizeof(mem_reg_property));
  83     if (ret < 0)
  84         fprintf(stderr, "couldn't set /memory/reg\n");
  85
  86     ret = qemu_devtree_setprop_cell(fdt, "/chosen", "linux,initrd-start",
  87                                     initrd_base);
  88     if (ret < 0)
  89         fprintf(stderr, "couldn't set /chosen/linux,initrd-start\n");
  90
  91     ret = qemu_devtree_setprop_cell(fdt, "/chosen", "linux,initrd-end",
  92                                     (initrd_base + initrd_size));
  93     if (ret < 0)
  94         fprintf(stderr, "couldn't set /chosen/linux,initrd-end\n");
  95
  96     ret = qemu_devtree_setprop_string(fdt, "/chosen", "bootargs",
  97                                       kernel_cmdline);
  98     if (ret < 0)
  99         fprintf(stderr, "couldn't set /chosen/bootargs\n");
 100
 101     /* Copy data from the host device tree into the guest. Since the guest can
 102      * directly access the timebase without host involvement, we must expose
 103      * the correct frequencies. */
 104     if (kvm_enabled()) {
 105         tb_freq = kvmppc_get_tbfreq();
 106         clock_freq = kvmppc_get_clockfreq();
 107     }
 108
 109     qemu_devtree_setprop_cell(fdt, "/cpus/cpu@0", "clock-frequency",
 110                               clock_freq);
 111     qemu_devtree_setprop_cell(fdt, "/cpus/cpu@0", "timebase-frequency",
 112                               tb_freq);
 113
 114     ret = rom_add_blob_fixed(BINARY_DEVICE_TREE_FILE, fdt, fdt_size, addr);
 115     g_free(fdt);
 116
 117 out:
 118 #endif
 119
 120     return ret;
 121 }
 122
 123 /* Create reset TLB entries for BookE, spanning the 32bit addr space.  */
 124 static void mmubooke_create_initial_mapping(CPUPPCState *env,
 125                                      target_ulong va,
 126                                      target_phys_addr_t pa)
 127 {
 128     ppcemb_tlb_t *tlb = &env->tlb.tlbe[0];
 129
 130     tlb->attr = 0;
 131     tlb->prot = PAGE_VALID | ((PAGE_READ | PAGE_WRITE | PAGE_EXEC) << 4);
 132     tlb->size = 1 << 31; /* up to 0x80000000  */
 133     tlb->EPN = va & TARGET_PAGE_MASK;
 134     tlb->RPN = pa & TARGET_PAGE_MASK;
 135     tlb->PID = 0;
 136
 137     tlb = &env->tlb.tlbe[1];
 138     tlb->attr = 0;
 139     tlb->prot = PAGE_VALID | ((PAGE_READ | PAGE_WRITE | PAGE_EXEC) << 4);
 140     tlb->size = 1 << 31; /* up to 0xffffffff  */
 141     tlb->EPN = 0x80000000 & TARGET_PAGE_MASK;
 142     tlb->RPN = 0x80000000 & TARGET_PAGE_MASK;
 143     tlb->PID = 0;
 144 }
 145
 146 static void main_cpu_reset(void *opaque)
 147 {
 148     PowerPCCPU *cpu = opaque;
 149     CPUPPCState *env = &cpu->env;
 150
 151     cpu_reset(CPU(cpu));
 152     env->gpr[1] = (16<<20) - 8;
 153     env->gpr[3] = FDT_ADDR;
 154     env->nip = entry;
 155
 156     /* Create a mapping for the kernel.  */
 157     mmubooke_create_initial_mapping(env, 0, 0);
 158 }
 159
 160 static void bamboo_init(ram_addr_t ram_size,
 161                         const char *boot_device,
 162                         const char *kernel_filename,
 163                         const char *kernel_cmdline,
 164                         const char *initrd_filename,
 165                         const char *cpu_model)
 166 {
 167     unsigned int pci_irq_nrs[4] = { 28, 27, 26, 25 };
 168     MemoryRegion *address_space_mem = get_system_memory();
 169     MemoryRegion *ram_memories
 170         = g_malloc(PPC440EP_SDRAM_NR_BANKS * sizeof(*ram_memories));
 171     target_phys_addr_t ram_bases[PPC440EP_SDRAM_NR_BANKS];
 172     target_phys_addr_t ram_sizes[PPC440EP_SDRAM_NR_BANKS];
 173     qemu_irq *pic;
 174     qemu_irq *irqs;
 175     PCIBus *pcibus;
 176     PowerPCCPU *cpu;
 177     CPUPPCState *env;
 178     uint64_t elf_entry;
 179     uint64_t elf_lowaddr;
 180     target_phys_addr_t loadaddr = 0;
 181     target_long initrd_size = 0;
 182     DeviceState *dev;
 183     int success;
 184     int i;
 185
 186     /* Setup CPU. */
 187     if (cpu_model == NULL) {
 188         cpu_model = "440EP";
 189     }
 190     cpu = cpu_ppc_init(cpu_model);
 191     if (cpu == NULL) {
 192         fprintf(stderr, "Unable to initialize CPU!\n");
 193         exit(1);
 194     }
 195     env = &cpu->env;
 196
 197     qemu_register_reset(main_cpu_reset, cpu);
 198     ppc_booke_timers_init(env, 400000000, 0);
 199     ppc_dcr_init(env, NULL, NULL);
 200
 201     /* interrupt controller */
 202     irqs = g_malloc0(sizeof(qemu_irq) * PPCUIC_OUTPUT_NB);
 203     irqs[PPCUIC_OUTPUT_INT] = ((qemu_irq *)env->irq_inputs)[PPC40x_INPUT_INT];
 204     irqs[PPCUIC_OUTPUT_CINT] = ((qemu_irq *)env->irq_inputs)[PPC40x_INPUT_CINT];
 205     pic = ppcuic_init(env, irqs, 0x0C0, 0, 1);
 206
 207     /* SDRAM controller */
 208     memset(ram_bases, 0, sizeof(ram_bases));
 209     memset(ram_sizes, 0, sizeof(ram_sizes));
 210     ram_size = ppc4xx_sdram_adjust(ram_size, PPC440EP_SDRAM_NR_BANKS,
 211                                    ram_memories,
 212                                    ram_bases, ram_sizes,
 213                                    ppc440ep_sdram_bank_sizes);
 214     /* XXX 440EP's ECC interrupts are on UIC1, but we've only created UIC0. */
 215     ppc4xx_sdram_init(env, pic[14], PPC440EP_SDRAM_NR_BANKS, ram_memories,
 216                       ram_bases, ram_sizes, 1);
 217
 218     /* PCI */
 219     dev = sysbus_create_varargs(TYPE_PPC4xx_PCI_HOST_BRIDGE,
 220                                 PPC440EP_PCI_CONFIG,
 221                                 pic[pci_irq_nrs[0]], pic[pci_irq_nrs[1]],
 222                                 pic[pci_irq_nrs[2]], pic[pci_irq_nrs[3]],
 223                                 NULL);
 224     pcibus = (PCIBus *)qdev_get_child_bus(dev, "pci.0");
 225     if (!pcibus) {
 226         fprintf(stderr, "couldn't create PCI controller!\n");
 227         exit(1);
 228     }
 229
 230     isa_mmio_init(PPC440EP_PCI_IO, PPC440EP_PCI_IOLEN);
 231
 232     if (serial_hds[0] != NULL) {
 233         serial_mm_init(address_space_mem, 0xef600300, 0, pic[0],
 234                        PPC_SERIAL_MM_BAUDBASE, serial_hds[0],
 235                        DEVICE_BIG_ENDIAN);
 236     }
 237     if (serial_hds[1] != NULL) {
 238         serial_mm_init(address_space_mem, 0xef600400, 0, pic[1],
 239                        PPC_SERIAL_MM_BAUDBASE, serial_hds[1],
 240                        DEVICE_BIG_ENDIAN);
 241     }
 242
 243     if (pcibus) {
 244         /* Register network interfaces. */
 245         for (i = 0; i < nb_nics; i++) {
 246             /* There are no PCI NICs on the Bamboo board, but there are
 247              * PCI slots, so we can pick whatever default model we want. */
 248             pci_nic_init_nofail(&nd_table[i], "e1000", NULL);
 249         }
 250     }
 251
 252     /* Load kernel. */
 253     if (kernel_filename) {
 254         success = load_uimage(kernel_filename, &entry, &loadaddr, NULL);
 255         if (success < 0) {
 256             success = load_elf(kernel_filename, NULL, NULL, &elf_entry,
 257                                &elf_lowaddr, NULL, 1, ELF_MACHINE, 0);
 258             entry = elf_entry;
 259             loadaddr = elf_lowaddr;
 260         }
 261         /* XXX try again as binary */
 262         if (success < 0) {
 263             fprintf(stderr, "qemu: could not load kernel '%s'\n",
 264                     kernel_filename);
 265             exit(1);
 266         }
 267     }
 268
 269     /* Load initrd. */
 270     if (initrd_filename) {
 271         initrd_size = load_image_targphys(initrd_filename, RAMDISK_ADDR,
 272                                           ram_size - RAMDISK_ADDR);
 273
 274         if (initrd_size < 0) {
 275             fprintf(stderr, "qemu: could not load ram disk '%s' at %x\n",
 276                     initrd_filename, RAMDISK_ADDR);
 277             exit(1);
 278         }
 279     }
 280
 281     /* If we're loading a kernel directly, we must load the device tree too. */
 282     if (kernel_filename) {
 283         if (bamboo_load_device_tree(FDT_ADDR, ram_size, RAMDISK_ADDR,
 284                                     initrd_size, kernel_cmdline) < 0) {
 285             fprintf(stderr, "couldn't load device tree\n");
 286             exit(1);
 287         }
 288     }
 289
 290     if (kvm_enabled())
 291         kvmppc_init();
 292 }
 293
 294 static QEMUMachine bamboo_machine = {
 295     .name = "bamboo",
 296     .desc = "bamboo",
 297     .init = bamboo_init,
 298 };
 299
 300 static void bamboo_machine_init(void)
 301 {
 302     qemu_register_machine(&bamboo_machine);
 303 }
 304
 305 machine_init(bamboo_machine_init);