target/openrisc: Replace cpu register array with a function
[qemu/ar7.git] / include / exec / memory_ldst_cached.inc.h
blobfd4bbb40e7c3decd097860ae0c1bd2d7c8f3077d
1 /*
2 * Memory access templates for MemoryRegionCache
4 * Copyright (c) 2018 Red Hat, Inc.
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
20 #define ADDRESS_SPACE_LD_CACHED(size) \
21 glue(glue(address_space_ld, size), glue(ENDIANNESS, _cached))
22 #define ADDRESS_SPACE_LD_CACHED_SLOW(size) \
23 glue(glue(address_space_ld, size), glue(ENDIANNESS, _cached_slow))
24 #define LD_P(size) \
25 glue(glue(ld, size), glue(ENDIANNESS, _p))
27 static inline uint32_t ADDRESS_SPACE_LD_CACHED(l)(MemoryRegionCache *cache,
28 hwaddr addr, MemTxAttrs attrs, MemTxResult *result)
30 assert(addr < cache->len && 4 <= cache->len - addr);
31 if (likely(cache->ptr)) {
32 return LD_P(l)(cache->ptr + addr);
33 } else {
34 return ADDRESS_SPACE_LD_CACHED_SLOW(l)(cache, addr, attrs, result);
38 static inline uint64_t ADDRESS_SPACE_LD_CACHED(q)(MemoryRegionCache *cache,
39 hwaddr addr, MemTxAttrs attrs, MemTxResult *result)
41 assert(addr < cache->len && 8 <= cache->len - addr);
42 if (likely(cache->ptr)) {
43 return LD_P(q)(cache->ptr + addr);
44 } else {
45 return ADDRESS_SPACE_LD_CACHED_SLOW(q)(cache, addr, attrs, result);
49 static inline uint32_t ADDRESS_SPACE_LD_CACHED(uw)(MemoryRegionCache *cache,
50 hwaddr addr, MemTxAttrs attrs, MemTxResult *result)
52 assert(addr < cache->len && 2 <= cache->len - addr);
53 if (likely(cache->ptr)) {
54 return LD_P(uw)(cache->ptr + addr);
55 } else {
56 return ADDRESS_SPACE_LD_CACHED_SLOW(uw)(cache, addr, attrs, result);
60 #undef ADDRESS_SPACE_LD_CACHED
61 #undef ADDRESS_SPACE_LD_CACHED_SLOW
62 #undef LD_P
64 #define ADDRESS_SPACE_ST_CACHED(size) \
65 glue(glue(address_space_st, size), glue(ENDIANNESS, _cached))
66 #define ADDRESS_SPACE_ST_CACHED_SLOW(size) \
67 glue(glue(address_space_st, size), glue(ENDIANNESS, _cached_slow))
68 #define ST_P(size) \
69 glue(glue(st, size), glue(ENDIANNESS, _p))
71 static inline void ADDRESS_SPACE_ST_CACHED(l)(MemoryRegionCache *cache,
72 hwaddr addr, uint32_t val, MemTxAttrs attrs, MemTxResult *result)
74 assert(addr < cache->len && 4 <= cache->len - addr);
75 if (likely(cache->ptr)) {
76 ST_P(l)(cache->ptr + addr, val);
77 } else {
78 ADDRESS_SPACE_ST_CACHED_SLOW(l)(cache, addr, val, attrs, result);
82 static inline void ADDRESS_SPACE_ST_CACHED(w)(MemoryRegionCache *cache,
83 hwaddr addr, uint32_t val, MemTxAttrs attrs, MemTxResult *result)
85 assert(addr < cache->len && 2 <= cache->len - addr);
86 if (likely(cache->ptr)) {
87 ST_P(w)(cache->ptr + addr, val);
88 } else {
89 ADDRESS_SPACE_ST_CACHED_SLOW(w)(cache, addr, val, attrs, result);
93 static inline void ADDRESS_SPACE_ST_CACHED(q)(MemoryRegionCache *cache,
94 hwaddr addr, uint64_t val, MemTxAttrs attrs, MemTxResult *result)
96 assert(addr < cache->len && 8 <= cache->len - addr);
97 if (likely(cache->ptr)) {
98 ST_P(q)(cache->ptr + addr, val);
99 } else {
100 ADDRESS_SPACE_ST_CACHED_SLOW(q)(cache, addr, val, attrs, result);
104 #undef ADDRESS_SPACE_ST_CACHED
105 #undef ADDRESS_SPACE_ST_CACHED_SLOW
106 #undef ST_P
108 #undef ENDIANNESS